TI1 LOG102 Logarithmic and log ratio amplifier Datasheet

Not Recommended For New Designs
LOG102
LOG
102
SBOS211B – DECEMBER 2001– REVISED APRIL 2005
Precision
LOGARITHMIC AND LOG RATIO AMPLIFIER
FEATURES
DESCRIPTION
● EASY-TO-USE COMPLETE LOG RATIO FUNCTION
The LOG102 is a versatile integrated circuit that computes
the logarithm or log ratio of an input current relative to a
reference current.
● OUTPUT AMPLIFIERS FOR SCALING AND
SIGNAL LOSS INDICATION
The LOG102 is tested over a wide dynamic range of input
signals. In log ratio applications, a signal current can be
generated by a photodiode, and a reference current from a
resistor in series with a precision external voltage reference.
● HIGH ACCURACY: 0.15% FSO Total Error Over
6 Decades
● WIDE INPUT DYNAMIC RANGE:
6 Decades, 1nA to 1mA
● LOW QUIESCENT CURRENT: 1.25mA
In the block diagram shown below, A3 and A4 are identical,
uncommitted op amps that can be used for a variety of
functions, such as filtering, offsetting, adding gain or as a
comparator to detect loss of signal.
● SO-14 PACKAGE
The output signal at VLOG OUT is trimmed to 1V per decade of
input current. It can be scaled with an output amplifier, either
A3 or A4.
APPLICATIONS
● ONET, OPTICAL POWER METERS
Low dc offset voltage and temperature drift allow accurate
measurement of low-level signals over a wide environmental
temperature range. The LOG102 is specified over the temperature range, 0°C to +70°C, with operation over –40°C to
+85°C.
● LOG, LOG RATIO COMPUTATION:
Communication, Analytical, Medical, Industrial,
Test, General Instrumentation
● PHOTODIODE SIGNAL COMPRESSION AMP
NOTE: U.S. Patent Pending.
● ANALOG SIGNAL COMPRESSION IN FRONT
OF A/D CONVERTER
● ABSORBANCE MEASUREMENT
● OPTICAL DENSITY MEASUREMENT
R1
VLOG OUT = LOG (I1/I2)
VOUT3 = G • LOG (I1/I2), G = 1 +R2/R1
CC
I2
V+
VLOG OUT
6
I1
5
14
1
Q1
R2
+IN3
–IN3
3
4
Q2
A3
7
VOUT3
A2
A1
12
A4
10
9
11
8
+IN4
VOUT4
A4 can be used
as comparator for
signal loss detect.
GND
–IN4
V–
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
Copyright © 2001-2005, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Not Recommended For New Designs
PIN DESCRIPTION
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage, V+ to V– .................................................................... 36V
Top View
SO
Input Voltage ....................................................... V– (–0.5) to V+ (+0.5V)
Input Current ................................................................................... ±10mA
Output Short-Circuit(2) .............................................................. Continuous
Operating Temperature .................................................... –40°C to +85°C
I1
1
14 I2
Storage Temperature ..................................................... –55°C to +125°C
NC
2
13 NC
Lead Temperature (soldering, 10s) ............................................... +300°C
+IN3
3
12 +IN4
NOTES: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. (2) Short circuit to ground, one amplifier per package.
–IN3
4
Vlog out
5
10 GND
V+
6
9
V–
VOUT3
7
8
VOUT4
Junction Temperature .................................................................... +150°C
ELECTROSTATIC
DISCHARGE SENSITIVITY
LOG102
11 –IN4
NC = No Internal Connection
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PACKAGE/ORDERING INFORMATION(1)
PRODUCT
PACKAGE-LEAD
PACKAGE
DESIGNATOR
PACKAGE
MARKING
LOG102AID
SO -14
D
LOG102A
NOTES: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at
www.ti.com.
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TA = 0°C to +70°C.
At TA = +25°C, VS = ±5V, RL = 10kΩ, unless otherwise noted.
LOG102AID
PARAMETER
CONDITION
MIN
CORE LOG FUNCTION
IIN / VLOG OUT Equation
LOG CONFORMITY ERROR(1)
Initial
over Temperature
GAIN(2)
Initial Value
Gain Error
vs Temperature
INPUT, A1 and A2
Offset Voltage
vs Temperature
vs Power Supply (PSRR)
Input Bias Current
vs Temperature
Voltage Noise
Current Noise
Common-Mode Voltage Range (Positive)
(Negative)
CMRR
OUTPUT, A2 (VLOGOUT)
Output Offset, VOSO, Initial
vs Temperature
Full-Scale Output (FSO)
Short-Circuit Current
2
TYP
MAX
UNITS
±0.3
%
%
%/ °C
%/ °C
VO = log (I1/I2)
1nA to 100µA (5 decades)
1nA to 1mA (6 decades)
1nA to 100µA (5 decades)
1nA to 1mA (6 decades)
0.04
0.15
0.0002
0.002
1nA to 100µA (5 decades)
1nA to 100µA (5 decades)
TMIN to TMAX
1
0.15
0.025
TMIN to TMAX
VS = ±4.5V to ±18V
TMIN to TMAX
f = 10Hz to 10kHz
f = 1kHz
f = 1kHz
±0.3
±2
5
±5
Doubles Every 10°C
3
30
4
(V+) – 2
(V+) – 1.5
(V–) + 2
(V–) + 1.2
90
105
±3
TMIN to TMAX
VS = ±5V Supplies
±1
0.05
(V–) + 1.2
±18
±1.5
50
±55
25
(V+) – 1.5
V/decade
%
%/ °C
mV
µV/°C
µV/V
pA
µVrms
nV/√Hz
fA/√Hz
V
V
dB
mV
µV/°C
V
mA
LOG102
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ELECTRICAL CHARACTERISTICS (Cont.)
Boldface limits apply over the specified temperature range, TA = 0°C to +70°C.
At TA = +25°C, VS = ±5V, RL = 10kΩ, unless otherwise noted.
LOG102AID
PARAMETER
TOTAL
Initial
CONDITION
ERROR(3)(4)
vs Supply
FREQUENCY RESPONSE, core log (5)
BW, 3dB
I2 = 10nA
I2 = 1µA
I2 = 10µA
I2 = 1mA
Step Response
Increasing
I2 = 1µA to 1mA (3 decade)
I2 = 100nA to 1µA (1 decade)
I2 = 10nA to 100nA (1 decade)
Decreasing
I2 = 1mA to 1µA (3 decade)
I2 = 1µA to 100nA (1 decade)
I2 = 100nA to 10nA (1 decade)
POWER SUPPLY
Operating Range
Quiescent Current
MAX
UNITS
±55
±30
±25
±20
±25
±30
±37
±0.15
±0.15
±0.25
±0.2
±0.2
±0.15
±0.25
mV
mV
mV
mV
mV
mV
mV
mV/ °C
mV/ °C
mV/ °C
mV/ °C
mV/ °C
mV/ °C
mV/ °C
mV/ V
mV/ V
mV/ V
mV/ V
mV/ V
mV/ V
mV/ V
CC = 4500pF
CC = 150pF
CC = 150pF
CC = 50pF
0.1
38
40
45
kHz
kHz
kHz
kHz
CC = 150pF
CC = 150pF
CC = 150pF
11
7
110
µs
µs
µs
CC = 150pF
CC = 150pF
CC = 150pF
45
20
550
µs
µs
µs
TMIN to TMAX
VS = ±4.5V to ±18V
±175
±2
10
–10
±0.5
I1 or I2 remains fixed while other varies
min to max
I1 or I2 = 1mA
I1 or I2 = 100µA
I1 or I2 = 10µA
I1 or I2 = 1µA
I1 or I2 = 100nA
I1 or I2 = 10nA
I1 or I2 = 1nA
I1 or I2 = 1mA
I1 or I2 = 100µA
I1 or I2 = 10µA
I1 or I2 = 1µA
I1 or I2 = 100nA
I1 or I2 = 10nA
I1 or I2 = 1nA
I1 or I2 = 1mA
I1 or I2 = 100µA
I1 or I2 = 10µA
I1 or I2 = 1µA
I1 or I2 = 100nA
I1 or I2 = 10nA
I1 or I2 = 1nA
vs Temperature
OP AMPS, A3 AND A4
Input Offset Voltage
vs Temperature
vs Power Supply
Input Bias Current(5)
Input Offset Current
Input Voltage Range
Common-Mode Rejection
Input Noise, f = 0.1Hz to 10Hz
f = 1kHz
Open Loop Voltage Gain
Gain-Bandwidth Product
Slew Rate
Settling Time, 0.01%
Rated Output
Short-Circuit Current
MIN
TYP
±0.4
±0.07
±0.07
±0.07
±0.07
±0.07
±0.4
(V–)
G = 1, 2.5V step
G = 1, 2.5V Step, CL =100pF
VS = 5V, RL = 10kΩ
±750
50
(V+) – 1.5
86
1
28
88
1.4
0.5
16
(V–) + 1.5
–ISC /+ISC
(V+) – 0.9
–36 /+60
VS
IO = 0
TEMPERATURE RANGE
Specified Range, TMIN to TMAX
Operating Range
Storage Range
Thermal Resistance, θJA
SO-14
±4.5
1.25
0
–40
–40
100
µV
µV/ °C
µV/V
nA
nA
V
dB
µVPP
nV/√Hz
dB
MHz
V/µs
µs
V
mA
±18
2
V
mA
70
+85
+125
°C
°C
°C
°C/W
NOTES: (1) Log Conformity Error is peak deviation from the best-fit straight line of VO versus Log (I1 /I2) curve expressed as a percent of peak-to-peak full-scale
(2) Output core log function is trimmed to 1V output per decade change of input current. (3) Worst-case Total Error for any ratio of I1 /I2, is the largest of the two
errors, when I1 and I2 are considered separately. (4) Total I1 + I2 should be kept below 1.1mA on ±5V supply. (5) Bandwidth (3dB) and transient response are a
function of both the compensation capacitor and the level of input current. (6) Positive conventional current flows into input terminals.
LOG102
SBOS211B
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3
Not Recommended For New Designs
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±5V, RL = 10kΩ, unless otherwise noted.
ONE CYCLE OF NORMALIZED TRANSFER FUNCTION
NORMALIZED TRANSFER FUNCTION
3
VOUT = 1V • Log
I1
I2
0.9
Normalized Output Voltage (V)
Normalized Output Voltage (V)
1
2
1
0
–1
–2
–3
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.001
0.01
0.1
1
10
100
1000
1
2
I
Current Ratio, 1
I2
4
3
8
6
10
I
Current Ratio, 1
I2
TOTAL ERROR vs INPUT CURRENT
GAIN ERROR vs TEMPERATURE
0.35
60
0.30
50
40
30
70°C
0°C
0.20
Gain Error (%)
Total Error (mV)
0.25
20
0.15
0.10
0.05
0.00
25°C
10
–0.05
0
–0.10
1nA
10nA
1µA
100nA
10µA
100µA
1mA
–60
–40
–20
Input Current
(I1 or I2)
1000
I1 = 10nA
CC (pF)
I1 = 1µA
I1 = 10µA
I1 = 1mA
I1 = 100µA
10
Values below 2pF
may be ignored.
1
1nA
10nA
100nA
1µA
10µA
100µA
1mA
100k
80
1k
100µA
CC
1nA
1µA
1mA
to 10µA
0
00
CC
=1
I1 = 1nA
CC
10nA
100nA
10nA
pF
0.1
1nA
A
I1 = 1nA
10
10mA
1µ
to
µA
0
1
10nA
F
0p 100µA
=1
10nA
100
1
100µA
100µA
1mA
I1 = 1mA
1µA
10k
100nA
1µA
=
F
1µ
10µA
100µA
1mA
I2
I2
4
60
10µA
I1 = 1nA
I1 = 100nA
100
40
1M
3dB Frequency Response (Hz)
Select CC for I1 min
and I2 max
20
3dB FREQUENCY RESPONSE
MINIMUM VALUE OF COMPENSATION CAPACITOR
10000
0
Temperature (°C)
LOG102
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TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, VS = ±5V, RL = 10kΩ, unless otherwise noted.
LOG CONFORMITY vs VLOGOUT
5
LOG CONFORMITY vs TEMPERATURE
300
4
Log Conformity (m%)
Log Conformity (mV)
70°C
3
2
1
0
25°C
–1
200
6 Decades (1nA to 1mA)
100
5 Decades (1nA to 100µA)
–2
0°C
0
–3
–3
–2
–1
0
1
3
2
0
10
20
VLOGOUT (V)
30
40
50
60
70
Temperature (°C)
TOTAL ERROR vs TEMPERATURE
60
50
Total Error (mV)
1nA
40
1mA
30
20
10
10nA to 100µA
0
0
10
20
30
40
50
60
70
Temperature (°C)
LOG102
SBOS211B
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Not Recommended For New Designs
APPLICATION INFORMATION
R2
10kΩ
The LOG102 is a true logarithmic amplifier that uses the
base-emitter voltage relationship of bipolar transistors to
compute the logarithm, or logarithmic ratio, of a current ratio.
With two uncommitted on-chip operational amplifiers, the
LOG102 provides design flexibility and simplicity.
Figure 1 shows the basic connections required for operation
of the LOG102 with a gain factor. In order to reduce the
influence of lead inductance of power supply lines, it is
recommended that each supply be bypassed with a 10µF
tantalum capacitor in parallel with a 1000pF ceramic capacitor, as shown in Figure 1. Connecting the capacitors as close
to the LOG102 as possible will contribute to noise reduction
as well.
V+
VOUT = G • VLOGOUT
12
VOUT
I1
LOG102
14
9
CC
V–
R2'
10kΩ
V+
FIGURE 2. Bias Current Nulling.
14
3
VLOGOUT
8
(1)
IREF can be derived from an external current source (such as
shown in Figure 3), or it may be derived from a voltage
source with one or more resistors. When a single resistor is
used, the value may be large depending on IREF. If IREF is
10nA and +2.5V is used:
R1
5
11
VLOGOUT = (1V) • log (I1/I2)
4
LOG102
R2
CC
RREF = 2.5V/10nA = 250MΩ
Amplifier A4 not being used.
10µF
V–
IREF
Unused amplifiers should
have positive inputs grounded
and negative inputs tied to
their respective outputs.
2N2905
RREF
INPUT CURRENT RANGE
3.6kΩ
2N2905
+15V
FIGURE 1. Basic Connections with Output Gain Factor of the
LOG102.
6V
IN834
–15V
IREF =
6V
RREF
FIGURE 3. Temperature Compensated Current Source.
To maintain specified accuracy, the input current range of the
LOG102 should be limited from 1nA to 1mA. Input currents
outside of this range may compromise LOG102 performance.
Input currents larger than 1mA result in increased nonlinearity.
An absolute maximum input current rating of 10mA is included
to prevent excessive power dissipation that may damage the
logging transistor.
A voltage divider may be used to reduce the value of the
resistor (as shown in Figure 4). When using this method, one
must consider the possible errors caused by the amplifier’s
input offset voltage. The input offset voltage of amplifier A1
has a maximum value of 1.5mV, making VREF a suggested
value of 100mV.
On ±5V supplies the total input current (I1 + I2) is limited to
1.1mA. Due to compliance issues internal to the LOG102, to
accommodate larger total input currents, supplies should be
increased.
Currents smaller than 1nA will result in increased errors due
the input bias currents of op amps A1 and A2 (typically 5pA).
The input bias currents may be compensated for, as shown in
Figure 2. The input stages of the amplifiers have FET inputs,
with input bias current doubling every 10°C, which makes the
nulling technique shown practical only where the temperature
is fairly stable.
6
10
R1'
> 1MΩ
I2
VOUT
7
10
1000pF
5
VLOGOUT is expressed as:
6
1
9
6
1
When the LOG102 is used to compute logarithms, either I1 or
I2 can be held constant and becomes the reference current to
which the other is compared.
1000pF
I2
R1
1MΩ
SETTING THE REFERENCE CURRENT
10µF
I1
V–
V+
VREF = 100mV
R1
R3
14
+5V
R2
VOS
+
–
IREF
A1
R3 >> R2
FIGURE 4. T Network for Reference Current.
LOG102
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Figure 5 shows a low-level current source using a series
resistor. The low offset op-amp reduces the effect of the
LOG102’s input offset voltage.
V+
NEGATIVE INPUT CURRENTS
The LOG102 will function only with positive input currents
(conventional current flow into pins 1 and 14). In situations
where negative input currents are needed, the circuits in
Figures 6, 7, 8, and 9, may be used.
V+
I1 = 2.5nA to 1mA
REF3025
6
2.5V
5
1
VLOGOUT
1GΩ to 2.5kΩ
LOG102
100kΩ I2 = 2.5nA
1MΩ
+2.5mV
+2.5V
100Ω
5
CC
QA
IIN
14
9
QB
National
LM394
10
V–
D1
D2
OPA335 Chopper Om Amp
–2.5V
OPA703
IOUT
FIGURE 5. Current Source with Offset Compensation.
FREQUENCY RESPONSE
The 3dB frequency response of the LOG102 is a function of
the magnitude of the input current levels and of the value of
the frequency compensation capacitor. See Typical Characteristic Curves for details.
FIGURE 6. Current Inverter/Current Source.
The frequency response curves are shown for constant DC
I1 and I2 with a small signal AC current on one of them.
+5V
The transient response of the LOG102 is different for increasing and decreasing signals. This is due to the fact that
a log amp is a nonlinear gain element and has different gains
at different levels of input signals. Smaller input currents
require greater gain to maintain full dynamic range, and will
slow the frequency response of the LOG102.
1/2 OPA2335
1.5kΩ
1.5kΩ
10nA to 1mA
FREQUENCY COMPENSATION
In an application, highest overall bandwidth can be achieved
by detecting the signal level at VOUT, then switching in
appropriate values of compensation capacitors.
As seen on front page diagram, the voltage output of VLOGOUT
can be scaled by increasing or decreasing the resistor ratio
connected to pins 4 and 7. The gain, G, can be set according
to the following equation:
1/2 OPA2335
BSH203
10nA to 1mA
Pin 1 or Pin 14
LOG102
Photodiode
FIGURE 7. Precision Current Inverter/Current Source.
VOLTAGE INPUTS
The LOG102 gives the best performance with current inputs.
Voltage inputs may be handled directly with series resistors,
but the dynamic input range is limited to approximately three
decades of input voltage by voltage noise and offsets. The
transfer function of equation (14) applies to this configuration.
(2)
LOG102
SBOS211B
Back Bias
+5V
+3.3V
Frequency compensation for the LOG102 is obtained by
connecting a capacitor between pins 5 and 14. The size of
the capacitor is a function of the input currents, as shown in
the Typical Characteristic Curves (Minimum Value of Compensation Capacitor). For any given application, the smallest
value of the capacitor which may be used is determined by
the maximum value of I2 and the minimum value of I1. Larger
values of CC will make the LOG102 more stable, but will
reduce the frequency response.
G = 1 + R2/R1
TLV271 or 1 OPA2335
2
+3.3V
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Not Recommended For New Designs
1.5kΩ
100kΩ
100kΩ
+5V
10nA to 1mA
+3.3V
Back Bias
+5V
1/2 OPA2335
+3.3V
1.5kΩ
1/2 OPA2335
Photodiode
1.5kΩ
100kΩ
100kΩ
LOG102
10nA to 1mA
Pin 1 or Pin 14
FIGURE 8. Precision Current Inverter/Current Source.
DATA COMPRESSION
In many applications the compressive effects of the logarithmic transfer function are useful. For example, a LOG102
preceding a 12-bit Analog-to-Digital (A/D) converter can
produce the dynamic range equivalent to a 20-bit converter.
V+
(–VRB)
6
1
5
VOUT
I1
Signal
LOG102
(–VRB)
I2
REF
14
9
CC
V+
10
I1
6
1
5
VOUT
V–
Sample
–VRB
λ1
NOTES: (1) –VRB, must be 2.5V more positive than V–. Example, for
VRB = –9.5V, V– =12V. (2) Typically, –3.3V bias is used with ±12V supplies.
FIGURE 9. Reverse Biased Photodiode Using Pin 10 on
LOG102.
D1
LOG102
λ 1´
I2
Light
Source
λ1
D2
14
10
9
CC
V–
APPLICATION CIRCUITS
LOG RATIO
One of the more common uses of log ratio amplifiers is
to measure absorbance. A typical application is shown in
Figure 10.
8
Absorbance of the sample is A = logλ1´/ λ1
(3)
If D1 and D2 are matched A ∝ (1V) logI1 / I2
(4)
FIGURE 10. Absorbance Measurement.
LOG102
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INSIDE THE LOG102
also
Using the base-emitter voltage relationship of matched
bipolar transistors, the LOG102 establishes a logarithmic function of input current ratios. Beginning with the
base-emitter voltage defined as
VBE = VT ln
IC
IS
where : VT =
kT
q
R1 + R 2
R1
I1
= log
I2
VOUT = VL
(1)
k = Boltzmann’s constant = 1.381 • 10–23
VOUT =
or
T = Absolute temperature in degrees Kelvin
(9)
(10)
R1 + R 2
I
n VT log 1
R1
I2
(11)
q = Electron charge = 1.602 • 10–19 Coulombs
IC = Collector current
IS = Reverse saturation current
I1
From the circuit in Figure 11, we see that
VL = VBE1 – VBE 2
I1
IS1
– VT2 ln
+
VBE
1
VBE
A2
IS 2
VOUT
2
VOUT = (1V) LOG
I2
I2
Q2
–
A1
I1
I2
I2
(3)
R2
VL
R1
If the transistors are matched and isothermal and
VTI = VT2, then (3) becomes:
FIGURE 11. Simplified Model of Log Amplifier.
 I
I 
VL = VT1 ln 1 – ln 2 
IS 
 IS
(4)
I
VL = VT ln 1 and since
I2
(5)
ln x = 2.3 log10 x
(6)
I
VL = n VT log 1
I2
(7)
where n = 2.3
(8)
It should be noted that the temperature dependance
associated with VT = kT/q is internally compensated on
the LOG102 by making R1 a temperature sensitive resistor with the required positive temperature coefficient.
USING A LARGER REFERENCE VOLTAGE
REDUCES OFFSET ERRORS
Using a larger reference voltage to create the reference
current minimizes errors due to the LOG102’s input offset
voltage. Maintaining an increasing output voltage as a function of increasing photodiode current is also important in
many optical sensing applications. All zeros from the A/D
converter output represent zero or low scale photodiode
current. Inputting the reference current into I1, and designing
IREF such that it is as large or larger than the expected
maximum photodiode current is accomplished using this
requirement. The LOG102 configured with the reference
current connecting I1 and the photodiode current connecting
to I2 is shown in Figure 12. A3 is configured as a level shifter
with inverting gain and is used to scale the photodiode
current directly into the A/D input voltage range.
The wide dynamic range of the LOG102 is useful for measuring
avalanche photodiode current (APD) (see Figure 13).
LOG102
SBOS211B
–
+
I1
(2)
Substituting (1) into (2) yields
VL = VT1 ln
Q1
www.ti.com
9
Not Recommended For New Designs
IREF =
VREF
VOUT = VREF –
R1
R2
R3
• LOG
(
IREF
IPHOTO
)
R3
R2
CC
VLOGOUT
5
IREF
3
VMIN to VMAX
I1
R1
Q1
1
Q2
A3
7
A/D
A2
VREF
A1
R2
4
IPHOTO
I2
R3
14
LOG102
IMIN to IMAX
10
FIGURE 12. Technique for Using Full-Scale Reference Current such that V OUT Increases with Increasing Photodiode Current.
ISHUNT
+15V to +60V
500
Irx = 1µA to 1mA
Receiver
5kΩ
5kΩ
10gbits/sec
+5V
APD
INA168
SOT23-5
I to V
Converter
IOUT = 0.1 • ISHUNT
1
2
IOUT
CC
1.2kΩ
1kΩ
+5V
6
1
5
Q1
4
Q2
A3
7
VOUT = 2.5V to 0V
A2
A1
100µA
3
25kΩ
14
REF3025(1)
2.5V
LOG102
SO-14
10
9
–5V
NOTE: (1) Available Q2 2002.
FIGURE 13. High Side Shunt for Avalanche Photodiode (APD) Measures 3 Decades of APD Current.
10
LOG102
www.ti.com
SBOS211B
Not Recommended For New Designs
DEFINITION OF TERMS
ERRORS RTO AND RTI
As with any transfer function, errors generated by the function itself may be Referred-to-Output (RTO) or Referred-toInput (RTI). In this respect, log amps have a unique property:
TRANSFER FUNCTION
The ideal transfer function is:
VOUT = 1V • logI1/I2
(5)
Figure 14 shows the graphical representation of the transfer
over valid operating range for the LOG102.
Given some error voltage at the log amp’s output, that error
corresponds to a constant percent of the input regardless of
the actual input level.
LOG CONFORMITY
3
I2
2
VOUT (V)
1
10nA
=
A
1n
I2
100nA
=
nA
10
1µA
10µA
100µA
1mA
I1
0
I2
=
A
0n
10
A
A
0µ
A
µA
10
1µ
10
1m
=
=
=
=
I2
I2
I2
I2
Dashed Line = Greater
Supply Voltage Requirement
VOUT = (1V) • LOG
I1
I2
–3
For the LOG102, log conformity is calculated the same as
linearity and is plotted I1 /I2 on a semi-log scale. In many
applications, log conformity is the most important specification. This is true because bias current errors are negligible
(1pA compared to input currents of 1nA and above) and the
scale factor and offset errors may be trimmed to zero or
removed by system calibration. This leaves log conformity as
the major source of error.
Log conformity is defined as the peak deviation from the best
fit straight line of the VOUT versus log (I1/I2) curve. This is
expressed as a percent of ideal full-scale output. Thus, the
nonlinearity error expressed in volts over m decades is:
FIGURE 14. Transfer Function with Varying I 2 and I1.
ACCURACY
VOUT
Accuracy considerations for a log ratio amplifier are somewhat more complicated than for other amplifiers. This is
because the transfer function is nonlinear and has two
inputs, each of which can vary over a wide dynamic range.
The accuracy for any combination of inputs is determined
from the total error specification.
(NONLIN)
= 1V/dec • 2Nm V
where N is the log conformity error, in percent.
INDIVIDUAL ERROR COMPONENTS
The ideal transfer function with current input is:
VOUT = (1V) • log
TOTAL ERROR
The total error is the deviation (expressed in mV) of the
actual output from the ideal output of VOUT = 1V • log(I1/I2).
I2
(maximum
error)(1)
VOUT = (1V) (1 ± ∆K ) log
(5)
It represents the sum of all the individual components of error
normally associated with the log amp when operated in the
current input mode. The worst-case error for any given ratio
of I1/I2 is the largest of the two errors when I1 and I2 are
considered separately; this case is shown in Table I. Temperature can affect total error.
I1
I2
(7)
The actual transfer function with the major components of
error is:
Thus,
VOUT (ACTUAL) = VOUT (IDEAL) ± Total Error.
(6)
I1 – IB1
± 2Nm ± VOS OUT
I2 – IB2
(8)
The individual component of error is:
∆K = gain accuracy (0.3%, typ), as specified in
specification table.
IB1 = bias current of A1 (5pA, typ)
IB2 = bias current of A2 (5pA, typ)
N = log conformity error (0.04%, 0.15%, typ)
0.04% for n = 5, 0.15% for n = 6
I1 (maximum error)(1)
10nA
(30mV)
100nA
(25mV)
1µA
(20mV)
100nA
(25mV)
30mV
25mV
25mV
1µA
(20mV)
30mV
25mV
20mV
10µA
(25mV)
30mV
25mV
25mV
VOS OUT = output offset voltage (1mV, typ)
n = number of decades over which N is specified:
Example: what is the error when
I1 = 1µA and I2 = 100nA
(9)
NOTE: (1) Maximum errors are in parenthesis.
TABLE I. I1 /I2 and Maximum Errors.
LOG102
SBOS211B
www.ti.com
11
Not Recommended For New Designs
≈ 1.003 log
10 –6
10
–7
For the case of voltage inputs, the actual transfer function is
+ 0.004 + 0.003
(10)
= 1.003 (1) + 0.004 + 0.0003
(11)
= 1.0073V
(12)
VOUT
(14)
EOS1
V1
– IB1 ±
R1
R1
= (1V) (1 ± ∆K ) log
± 2Nn ± VOS OUT
E
V2
OS 2
– IB 2 ±
R2
R2
Since the ideal output is 1.000V, the error as a percent of
reading is
0.0073
% error =
• 100% = 0.73%
1
12
(13)
(15)
Where
E
EOS1
and OS2 are considered to be zero for large
R2
R1
values of resistance from external input current sources.
LOG102
www.ti.com
SBOS211B
PACKAGE OPTION ADDENDUM
www.ti.com
12-Feb-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LOG102AID
LIFEBUY
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
0 to 70
LOG102A
LOG102AIDG4
LIFEBUY
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
0 to 70
LOG102A
LOG102AIDR
LIFEBUY
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
0 to 70
LOG102A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
12-Feb-2016
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
LOG102AIDR
Package Package Pins
Type Drawing
SOIC
D
14
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.0
16.4
Pack Materials-Page 1
6.5
B0
(mm)
K0
(mm)
P1
(mm)
9.0
2.1
8.0
W
Pin1
(mm) Quadrant
16.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LOG102AIDR
SOIC
D
14
2500
367.0
367.0
38.0
Pack Materials-Page 2
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