Allegro A2526EL Usb dual power control switch Datasheet

Data Sheet
27447.2*
2526 AND
2536
USB DUAL POWER CONTROL SWITCHES
ENA
1
FLGA
2
FLGB
3
ENB
4
GATE
GATE
CONTROL CONTROL
A2526EM
8
OUTA
7
IN
6
GND
5
OUTB
Dwg. PP-070-2
Note that the A2526EM (DIP) and the
A2526EL (SOIC) are electrically identical and
share a common terminal number assignment.
The A2526EL/M and A2536EL/M are integrated high-side dual
power switches, optimized for self-powered and bus-powered Universal Serial Bus (USB) applications. Few external components are
necessary to satisfy USB requirements. The A2526EL/EM ENABLE
inputs are active high; the A2536EL/EM are active low.
All devices are ideally suited for USB applications. Each switch
channel supplies up to 500 mA as required by USB peripheral devices.
In addition, the switch’s low on-resistance permits achieving the USB
voltage-drop requirements. Fault current is limited to typically
750 mA, satisfying the UL 25 VA safety requirements, and a flag
output is available to indicate a fault condition to the local USB
controller. Momentary voltage drops that may occur on the upstream
port when the switch is enabled in bus-powered applications is eliminated by a “soft start” feature.
Additional features include thermal shutdown to prevent catastrophic
switch failure from high-current loads, undervoltage lockout to ensure
that the device remains OFF unless there is a valid input voltage
present, and 3.3 V and 5 V logic-compatible enable inputs.
These switches are provided in 8-pin mini-DIP (suffix ‘M’) and
8-lead SOIC (suffix ‘L’) packages.
T
C
A
T
N
O
C
ABSOLUTE MAXIMUM RATINGS
Y
R
O
T
C
A
F
Supply Voltage, VIN ..................... 6.0 V
Output Voltage, VOUT .................. 6.0 V
Output Current,
IOUT ................. Internally Limited
ENABLE Voltage Range,
VEN ......................... –0.3 V to 10 V
Fault Flag Voltage, VFLG .............. 8.0 V
Fault Flag Current, IFLG ............. 50 mA
Package Power Dissipation,
PD ................................. See Graph
Operating Temperature Range,
TA .......................... -40°C to +85°C
Junction Temperature, TJ ....... +150°C*
Storage Temperature Range,
TS ........................... -65°C to 150°C
Features
* Fault conditions that produce excessive
junction temperature will activate device
thermal shutdown circuitry. These conditions
can be tolerated but should be avoided.
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
2.7 V to 5.8 V Input
Up to 500 mA Continuous Load Current per Port
140 mΩ Maximum ON-Resistance
1.25 A Maximum Short-Circuit Current Limit
Individual Open-Drain Fault Flag Outputs
125 µA Typical ON-State Supply Current
<1 µA Typical OFF-State Supply Current
Outputs Can be Forced Higher Than Input (off-state)
Thermal Shutdown
2.2 V Typical Undervoltage Lockout
0.6 ms Turn On (soft-start) and Fast Turn Off
A2526 (active-high) Improved Replacement for MIC2526-1
A2536 (active-low) Improved Replacement for MIC2526-2
Applications
USB Hosts and Self-Powered Hubs
USB Bus-Powered Hubs
Hot Plug-In Power Supplies
Battery-Charger Circuits
2526 AND 2536
USB
DUAL POWER CONTROL
SWITCHES
FUNCTIONAL BLOCK DIAGRAM
FLGA
A2536 ONLY
OUTA
GATE
CONTROL
ENA
CHARGE
PUMP
A2536 ONLY
TSD
1.2 V
REF.
UVLO
GATE
CONTROL
OSC
CURRENT
LIMIT
CHARGE
PUMP
ENB
IN
CURRENT
LIMIT
OUTB
FLGB
GND
ENA
1
FLGA
2
FLGB
3
ENB
4
GATE
GATE
CONTROL CONTROL
A2536EM
8
OUTA
7
IN
6
GND
5
OUTB
Dwg. PP-070-3
Note that the A2536EM (DIP) and the
A2536EL (SOIC) are electrically identical and
share a common terminal number assignment.
2
ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS
Dwg. FP-049-1
2.5
2.0
1.5
SUFFIX 'M', RθJA = 60°C/W
1.0
0.5
SUFFIX 'L', RθJA = 108°C/W
0
25
50
75
100
125
AMBIENT TEMPERATURE IN °C
150
Dwg. GP-009-2
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 2000, Allegro MicroSystems, Inc.
2526 AND 2536
USB
DUAL POWER CONTROL
SWITCHES
Electrical Characteristics at TA = 25°C, VIN = 5 V, each output tested separately (unless otherwise noted).
Limits
Parameter
Test Conditions
Min
Typ
Max
Units
Operating Voltage Range
VIN
2.7
–
5.8
V
Switch Resistance
VIN = 5 V, IOUT = 500 mA
–
100
140
mΩ
VIN = 3.3 V, IOUT = 500 mA
–
100
140
mΩ
Output Leakage Current
Each output (output disabled), VIN = 5 V, VOUT = 0
–
<1.0
10
µA
Maximum Load Current
Each output
500
–
–
mA
Short-Circuit Current Limit
Each output (enabled into load), VOUT = 4 V
0.5
0.75
1.25
A
Current-Limit Threshold
Ramped load applied to enabled output, VOUT ≤ 4 V
–
0.9
–
A
ENABLE Input Threshold
Low-to-high transition
–
2.1
2.4
V
High-to-low transition
0.8
1.9
–
V
–
0.2
–
V
–
±0.01
±1.0
µA
–
1.0
–
pF
ENABLE Input Hysteresis
ENABLE Input Current
VEN = 0 V to 5.5 V
ENABLE Input Cap.
Output Turn-On Delay
RL = 10 Ω, CL = 1 µF, 50% VENABLE to 10% VOUT
–
0.5
–
ms
Output Turn-On Rise Time
RL = 10 Ω, CL = 1 µF, 10% VOUT to 90% VOUT
–
0.6
–
ms
Output Turn-Off Delay
RL = 10 Ω, CL = 1 µF, 50% VENABLE to 90% VOUT
–
10
–
µs
Output Turn-Off Fall Time
RL = 10 Ω, CL = 1 µF, 90% VOUT to 10% VOUT
–
25
–
µs
Error Flag Output
Resistance
VIN = 5 V, IL = 10 mA
–
8.0
–
Ω
VIN = 3.3 V, IL = 10 mA
–
10
–
Ω
Error Flag Off Current
VFLG = 5 V
–
0.01
–
µA
Supply Current
Both switches disabled (see note), OUT = open
–
0.2
5.0
µA
Both switches enabled (see note), OUT = open
–
125
160
µA
Increasing VIN
–
2.35
–
V
Decreasing VIN
–
2.2
–
V
Increasing TJ
–
165
–
°C
Decreasing TJ
–
155
–
°C
UVLO Threshold
Over-Temperature
Shutdown Threshold
Note — Disabled is ≤ 0.8 V and enabled is ≥ 2.4 V (active high) for the A2526EL/EM. Disabled is ≥ 0.8VIN and enabled is ≤ 0.8 V
(active low) for the A2536EL/EM.
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3
2526 AND 2536
USB
DUAL POWER CONTROL
SWITCHES
FUNCTIONAL DESCRIPTION
Power switch
Fault Flag (FLG)
The power switch is an N-channel MOSFET with a maximum
on-state resistance of 140 mΩ (VIN = 5 V). Configured as a
high-side switch, the power switch prevents current flow in
either direction if disabled. The drain body diode is disconnected from the source when the switch is OFF allowing the
output voltage to exceed the input voltage without causing
current conduction. The power switch supplies a minimum of
500 mA per switch.
This open drain output is asserted (active low) when an
overcurrent or over temperature condition is encountered. The
output will remain asserted until the overcurrent or over
temperature condition is removed.
Charge pump
An internal charge pump supplies power to the driver circuit
and provides the necessary voltage to pull the gate of the
MOSFET above the source. The charge pump operates from
input voltages as low as 2.7 V. The charge pump is limited to
2.5 µA to establish a controlled turn on time of typically 1 ms.
Driver
Current sense
A sense FET monitors the current supplied to the load. The
sense FET measures current more efficiently than conventional
resistance methods. When an overload or short circuit is
encountered, the current-sense circuitry sends a control signal to
the driver. The driver in turn reduces the gate voltage and
drives the power FET into its saturation region, which switches
the output into a constant-current mode and holds the current
constant while varying the voltage on the load.
Thermal sense
The driver controls the gate voltage of the power switch. To
limit large current surges and reduce the associated electromagnetic interference (EMI) produced, the driver incorporates
circuitry that controls the rise times and fall times of the output
voltage. The rise time is typically 1 ms.
An internal thermal-sense circuit shuts off the power switch
when the junction temperature rises to approximately 165°C.
Hysteresis is built into the thermal sense circuit. After the
device has cooled approximately 10°C, the switch turns back
ON. The switch continues to cycle off and on until the fault is
removed.
ENABLE (EN or EN)
Undervoltage lockout
The logic enable disables the power switch and the bias for the
charge pump, driver, and other circuitry to reduce the supply
current to less than 5 µA maximum when a logic high is present
on EN (A2526) or a logic low is present (A2536). The proper
logic level restores bias to the drive and control circuits and
turns the power ON. The enable input is a compatible with both
TTL and CMOS logic levels.
A voltage-sense circuit monitors the input voltage. When the
input voltage is approximately 2 V, a control signal turns OFF
the power switch.
4
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
2526 AND 2536
USB
DUAL POWER CONTROL
SWITCHES
NO-LOAD SWITCHING PERFORMANCE
VOUT
1 V/
200 µs/
VOUT
1 V/
VENABLE
50 µs/
VENABLE
VOUT
1 V/
50 µs/
VENABLE
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5
2526 AND 2536
USB
DUAL POWER CONTROL
SWITCHES
CAPACITIVE-LOAD SWITCHING PERFORMANCE
VENABLE
VENABLE
VOUT
2 V/
VOUT
2 V/
1 ms/
CL = 50 µF
RL = 100 Ω
1 ms/
CL = 100 µF
RL = 100 Ω
IOUT
500 mA/
IOUT
500 mA/
VFAULT
VFAULT
VENABLE
VOUT
2 V/
1 ms/
CL = 1000 µF
RL = 12 Ω
CURRENT LIMITING
IOUT
500 mA/
VFAULT
6
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
2526 AND 2536
USB
DUAL POWER CONTROL
SWITCHES
OUTPUT SHORT-CIRCUIT PERFORMANCE
VFAULT
VFAULT
VOUT
VOUT
2 µs/
5 ms/
IOUT
4 A/
IOUT
4 A/
15 mΩ
SHORT CIRCUIT
15 mΩ
SHORT CIRCUIT
VFAULT
VFAULT
IOUT
400 mA/
500 ms/
500 ms/
RL = 15 mΩ
THERMAL
SHUTDOWN
THERMAL SHUTDOWN
IOUT
1 A/
15 mΩ
SHORT CIRCUIT
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7
2526 AND 2536
USB
DUAL POWER CONTROL
SWITCHES
APPLICATIONS INFORMATION
Overcurrent
A sense FET is employed for overcurrent conditions. Unlike
current-sense resistors, sense FETs do not increase the series
resistance of the current path. When an overcurrent condition is
detected, the device maintains a constant output current and
reduces the output voltage accordingly. Complete shutdown
occurs only if the fault is present long enough to activate
thermal limiting.
Three possible overload conditions can occur. In the first
condition, the output has been shorted before the device is
enabled or between VIN has been applied. The device senses
the short and immediately switches into a constant-current
output.
In the second condition, the short occurs while the device is
enabled. At the instant the short occurs, very high currents may
flow for a short time before the current-limit circuit can react .
After the current-limit circuit has tripped (reached the
overcurrent trip threshold) the device switches into constantcurrent mode.
In the third condition, the load has been gradually increased
beyond the recommended operating current. The current is
permitted to rise until the current-limit threshold is reached or
until the thermal limit of the device is exceeded. The device is
capable of delivering current up to the current-limit threshold
without damage. Once the threshold has been reached, the
device switches into its constant-current mode.
Fault Flag (FLG)
The FLG open-drain output is asserted (active low) when an
overcurrent or over-temperature condition is encountered. The
output will remain asserted until the overcurrent or overtemperature condition is removed. Connecting a heavy
capacitive load to an enabled device can cause momentary false
over-current reporting from the inrush current flowing through
the device, charging the downstream capacitor. An RC filter
can be connected to the terminal to reduce false overcurrent
reporting. Using low-ESR electrolytic capacitors on the output
lowers the inrush current flow through the device during hotplug events by providing a low impedance energy source,
thereby reducing erroneous overcurrent reporting.
Power dissipation and junction temperature
The low on-resistance of the n-channel MOSFET allows small
surface-mount packages, such as an SOIC, to pass large
currents. The thermal resistance of these packages are high
8
compared to those of power packages; it is good design practice
to check power dissipation and junction temperature. The first
step is to find rDS(on) at the input voltage and operating temperature. Next, calculate the power dissipation using:
PD = rDS(on) x I2
Finally, calculate the junction temperature:
TJ = PD x RθJA + TA
where:
TA = ambient temperature °C
RθJA = thermal resistance (SOIC = 108°C/W, DIP = 60°C/W).
Thermal protection
Thermal protection prevents damage to the IC when heavyoverload or short-circuit faults are present for extended periods
of time. The faults force these devices into constant-current
mode, which causes the voltage across the high-side switch to
increase; under short-circuit conditions, the voltage across the
switch is equal to the input voltage. The increased dissipation
causes the junction temperature to rise to high levels. The
protection circuit senses the junction temperature of the switch
and shuts it OFF. Hysteresis is built into the thermal sense
circuit, and after the device has cooled approximately 20°, the
switch turns back ON. The switch continues to cycle in this
manner until the load fault or input power is removed.
Undervoltage lock-out (UVLO)
An undervoltage lockout ensures that the power switch is in the
OFF state at power up. Whenever the input voltage falls below
approximately 2 V, the power switch will be quickly turned
OFF. This facilitates the design of hot-insertion systems where
it is not possible to turn OFF the power switch before input
power is removed. The UVLO will also keep the switch from
being turned ON until the power supply has reached at least
2 V, even if the switch is enabled. Upon reinsertion, the power
switch will be turned ON, with a controlled rise time to reduce
EMI and voltage overshoots.
Power supply considerations
A 0.1 µF ceramic bypass capacitor between IN and GND, close
to the device, is recommended. Placing a high-value electrolytic capacitor on the output terminals is also desirable when the
output load is heavy. The capacitor reduces power supply
transients that may cause ringing on the input. Also, bypassing
the output with a 0.01 µF to 0.1 µF ceramic capacitor improves
the immunity of the device to short-circuit transients.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
2526 AND 2536
USB
DUAL POWER CONTROL
SWITCHES
TYPICAL APPLICATIONS
5V
UPSTREAM
CONNECTOR
100 mA MAX
+5 V
10 kΩ
FERRITE
BEADS
A2526EM
2
OVERCURRENTB
3
ON/OFFB
4
6
47 µF
OVERCURRENTA
8
DATA
47 µF
5
DATA
5V
UPSTREAM
CONNECTOR
100 mA MAX
1.5 kΩ
10 kΩ
OVERCURRENTB
3
ON/OFFB
4
6
47 µF
2
DATA
USB
PORTA
VBUS
0.1 µF
7
0.1 µF
OVERCURRENTA
8
DATA
5
USB
PORTB
VBUS
47 µF
1
GATE
CONTROL
GROUND
GND
ON/OFFA
GATE
CONTROL
4.7 µF
1 µF
D–
VIN
+
3.3 V
REG
+
USB CONTROLLER
D+
0.1 µF
FERRITE
BEADS
A2526EM
VBUS
USB
PORTB
VBUS
DATA
USB Host Application
Dwg. EP-070-1A
0.1 µF
7
0.1 µF
1
GATE
CONTROL
GROUND
GND
ON/OFFA
GATE
CONTROL
D–
4.7 µF
1 µF
D+
VIN
+
3.3 V
REG
+
USB CONTROLLER
VBUS
USB
PORTA
VBUS
0.1 µF
DATA
Dwg. EP-070-11A
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USB Bus-Powered Hub
9
2526 AND 2536
USB
DUAL POWER CONTROL
SWITCHES
A2526EL and A2536EL
Dimensions in Inches
(for reference only)
8
0.0098
0.0075
0.1574
0.1497
0.020
0.013
0.2440
0.2284
1
0.050
0.050
0.016
0° TO 8°
BSC
0.1968
0.1890
0.0688
0.0532
0.0040 MIN.
Dwg. MA-007-8 in
Dimensions in Millimeters
(controlling dimensions)
8
0.25
0.19
4.00
3.80
0.51
0.33
6.20
5.80
1.27
1
BSC
1.27
0.40
0° TO 8°
5.00
4.80
1.75
1.35
0.10 MIN.
Dwg. MA-007-8 mm
NOTES: 1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor’s option within limits shown.
10
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
2526 AND 2536
USB
DUAL POWER CONTROL
SWITCHES
A2526EM and A2536EM
Dimensions in Inches
(controlling dimensions)
0.014
0.008
8
5
0.430
MAX
0.280
0.240
0.300
BSC
1
0.070
0.045
4
0.005
MIN
0.400
0.355
0.210
MAX
0.015
0.150
0.115
MIN
0.022
0.014
0.100
Dwg. MA-001-8A in
BSC
Dimensions in Millimeters
(for reference only)
0.355
0.204
5
8
10.92
MAX
7.11
6.10
7.62
BSC
4
1
1.77
1.15
0.13
MIN
10.16
9.02
5.33
MAX
0.39
3.81
2.93
MIN
0.558
0.356
NOTES: 1.
2.
3.
4.
2.54
BSC
Dwg. MA-001-8A mm
Leads 1, 4, 5, and 8 may be half leads at vendor’s option.
Lead thickness is measured at seating plane or below.
Lead spacing tolerance is non-cumulative.
Exact body and lead configuration at vendor’s option within limits shown.
www.allegromicro.com
11
2526 AND 2536
USB
DUAL POWER CONTROL
SWITCHES
The products described here are manufactured under one or more
U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to
time, such departures from the detail specifications as may be
required to permit improvements in the performance, reliability, or
manufacturability of its products. Before placing an order, the user is
cautioned to verify that the information being relied upon is current.
Allegro products are not authorized for use as critical components
in life-support devices or systems without express written approval.
The information included herein is believed to be accurate and
reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of
third parties which may result from its use.
12
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
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