LS840 LS841 LS842 LOW NOISE LOW DRIFT LOW CAPACITANCE MONOLITHIC DUAL N-CHANNEL JFET Linear Integrated Systems FEATURES LOW NOISE en= 8nV/√Hz TYP. LOW LEAKAGE IG = 10pA TYP. LOW DRIFT |∆VGS1-2 /∆T|= 5µV/°C max. LOW OFFSET VOLTAGE IVGS1-2I= 2mV TYP. ABSOLUTE MAXIMUM RATINGS NOTE 1 @ 25°C (unless otherwise noted) Maximum Temperatures Storage Temperature Operating Junction Temperature -65° to +150°C +150°C Drain to Source Voltage 60V -IG(f) Gate Forward Current 50mA Maximum Power Dissipation Device Dissipation @ Free Air - Total 3 5 S2 S1 D1 2 G1 Maximum Voltage and Current for Each Transistor NOTE 1 Gate Voltage to Drain or Source 60V -VGSS -VDSO G1 D1 6 D2 G2 1 S1 S2 7 G2 D2 31 X 32 MILS BOTTOM VIEW 400mW @ +125°C ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted) SYMBOL CHARACTERISTICS LS840 LS841 LS842 UNITS 5 10 40 µV/°C |∆VGS1-2 /∆T| max. Drift vs. Temperature CONDITIONS VDG= 20V |VGS1-2| max. Offset Voltage mV VDG= 20V SYMBOL BVGSS CHARACTERISTICS Breakdown Voltage MIN. 60 UNITS V CONDITIONS VDS= 0 ID= 1nA BVGGO Gate-to-Gate Breakdown 60 ID= 200µA TA= -55°C to +125°C 5 10 25 TYP. -- MAX. -- -- ID= 200µA -- V IG= 1nA ID= 0 I S= 0 VDG= 20V VGS= 0 f= 1kHz VDG= 20V ID= 200µA VDG= 20V VGS= 0 TRANSCONDUCTANCE Yfss Full Conduction 1000 4000 µmho Yfs Typical Conduction 500 1000 µmho |Yfs1-2/Yfs| Mismatch -- 3 % 0.6 DRAIN CURRENT IDSS Full Conduction 0.5 2 5 mA |IDSS1-2/IDSS| Mismatch at Full Conduction -- 1 5 % GATE VOLTAGE VGS(off) or VP Pinchoff Voltage 1 2 4.5 V VDS= 20V ID= 1nA VGS Operating Range 0.5 -- 4 V VDS= 20V ID= 200µA VDG= 20V ID= 200µA GATE CURRENT -IG Operating -- 10 50 pA -IG High Temperature -- -- 50 nA VDG= 20V ID= 200µA -IG Reduced VDG -- 5 -- pA VDG= 10V ID= 200µA -IGSS At Full Conduction -- -- 100 pA VDG= 20V VDS= 0 Linear Integrated Systems TA= +125°C 4042 Clipper Court, Fremont, CA 94538 • TEL: (510) 490-9160 • FAX: (510) 353-0261 SYMBOL YOSS CHARACTERISTICS OUTPUT CONDUCTANCE Full Conduction -- -- 10 µmho YOS Operating -- 0.1 1 µmho Differential -- 0.01 0.1 µmho |YOS1-2| MIN. TYP. MAX. UNITS CONDITIONS VDG= 20V VGS= 0 VDG= 20V ID= 200µA COMMON MODE REJECTION CMR -20 log |∆VGS1-2/∆VDS| CMR ∆VDS= 10 to 20V -- 100 -- dB -- 75 -- dB ∆VDS= 5 to 10V ID= 200µA VDS= 20V f= 100Hz VDS= 20V NBW= 1Hz VDS= 20V NBW= 1Hz VGS= 0 RG= 10MΩ NBW= 6Hz ID= 200µA f= 1KHz VDS= 20V ID= 200µA VDG= 20V ID= 200µA ID= 200µA NOISE NF Figure -- -- 0.5 dB en Voltage -- -- 10 nV/√Hz en Voltage -- -- 15 nV/√Hz CISS CAPACITANCE Input -- 4 10 pF CRSS Reverse Transfer -- 1.2 5 pF CDD Drain-to-Drain -- 0.1 -- pF TO-71 P-DIP TO-78 0.320 (8.13) 0.290 (7.37) Six Lead 0.230 DIA. 0.209 0.195 DIA. 0.175 0.030 MAX. 0.150 0.115 6 LEADS 0.500 MIN. 0.019 DIA. 0.016 0.305 0.335 0.335 0.370 MAX. 0.040 0.165 0.185 0.016 0.019 DIM. A MIN. 0.500 0.016 0.021 DIM. B ID= 200µA f= 10Hz SEATING PLANE 0.405 (10.29) MAX. S1 D1 SS G1 1 2 3 4 8 7 6 5 G2 SS D2 S2 0.200 0.100 0.050 5 6 45° 0.046 0.036 7 SOIC 2 3 4 1 5 8 7 6 2 3 4 1 8 0.100 0.029 0.045 0.150 (3.81) 0.158 (4.01) 0.100 45° 0.048 0.028 0.028 0.034 0.188 (4.78) 0.197 (5.00) S1 D1 SS G1 1 2 3 4 8 7 6 5 G2 SS D2 S2 0.228 (5.79) 0.244 (6.20) NOTES: 1. These ratings are limiting values above which the serviceability of any semiconductor may be impaired. Linear Integrated Systems 4042 Clipper Court, Fremont, CA 94538 • TEL: (510) 490-9160 • FAX: (510) 353-0261