ADVANCE INFORMATION Am29LV065M 64 Megabit (8 M x 8-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control DISTINCTIVE CHARACTERISTICS ARCHITECTURAL ADVANTAGES ■ Single power supply operation — 3 volt read, erase, and program operations ■ Enhanced VersatileI/O control — Device generates data output voltages and tolerates data input voltages as determined by the voltage on the VIO pin; operates from 1.65 to 3.6 V ■ Manufactured on 0.23 µm MirrorBit process technology ■ SecSi (Secured Silicon) Sector region — 256-byte sector for permanent, secure identification through an 16-byte random Electronic Serial Number, accessible through a command sequence — May be programmed and locked at the factory or by the customer ■ Flexible sector architecture — One hundred twenty-eight 64 Kbyte sectors ■ Compatibility with JEDEC standards — Provides pinout and software compatibility for single-power supply flash, and superior inadvertent write protection ■ Minimum 100,000 erase cycle guarantee per sector ■ 20-year data retention at 125°C PERFORMANCE CHARACTERISTICS ■ High performance — 90 ns access time — 25 ns page read times — 0.4 s typical sector erase time — 3.0 µs typical write buffer byte programming time: 32-byte write buffer reduces overall programming time for multiple-byte updates — 8-byte read page buffer — 32-byte write buffer ■ Low power consumption (typical values at 3.0 V, 5 MHz) — 30 mA typical active read current — 50 mA typical erase/program current — 1 µA typical standby mode current ■ Package options — 48-pin TSOP — 63-ball FBGA SOFTWARE & HARDWARE FEATURES ■ Software features — Program Suspend & Resume: read other sectors before programming operation is completed — Erase Suspend & Resume: read/program other sectors before an erase operation is completed — Data# polling & toggle bits provide status — Unlock Bypass Program command reduces overall multiple-byte programming time — CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices ■ Hardware features — Sector Group Protection: hardware method of preventing write operations within a sector group — Temporary Sector Unprotect: VID-level method of changing code in locked sectors — ACC (high voltage) pin accelerates programming time for higher throughput during system production — Hardware reset pin (RESET#) resets device — Ready/Busy# pin (RY/BY#) detects program or erase cycle completion This Data Sheet states AMD’s current technical specifications regarding the Products described herein. This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. Publication# 25262 Rev: A Amendment/+1 Issue Date: October 3, 2001 Refer to AMD’s Website (www.amd.com) for the latest information. A D V A N C E I N F O R M A T I O N GENERAL DESCRIPTION The Am29LV065M is a 64 Mbit, 3.0 volt single power supply flash memory devices organized as 8,388,608 bytes. The device has an 8-bit wide data bus, and can be programmed either in the host system or in standard EPROM programmers. An access time of 90, 100, 110, or 120 ns is available. Note that each device has a specific operating voltage range (VCC) and an I/O voltage range (VIO), as specified in the Product Selector Guide and the Ordering Information sections. The device is offered in a 48-pin TSOP or 63-ball FBGA package. Each device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. Each device requires only a single 3.0 volt power supply for both read and write functions. In addition to a V CC input, a high-voltage accelerated program (ACC) input provides shorter programming times through increased current. This feature is intended to facilitate factory throughput during system production, but may also be used in the field if desired. The device is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the device using standard microprocessor write timing. Write cycles also internally latch addresses and data needed for the programming and erase operations. The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory. Device programming and erasure are initiated through command sequences. Once a program or erase operation has begun, the host system need only poll the DQ7 (Data# Polling) or DQ6 (toggle) status bits or monitor the Ready/Busy# (RY/BY#) output to determine whether the operation is complete. To facilitate programming, an Unlock Bypass mode reduces command sequence overhead by requiring only two write cycles to program data instead of four. at its data outputs and the voltages tolerated at its data inputs to the same voltage level that is asserted on the VIO pin. This allows the device to operate in a 1.8 V or 3 V system environment as required. Hardware data protection measures include a low V CC detector that automatically inhibits write operations during power transitions. The hardware sector protection feature disables both program and erase operations in any combination of sectors of memory. This can be achieved in-system or via programming equipment. The Erase Suspend/Erase Resume feature allows the host system to pause an erase operation in a given sector to read or program any other sector and then complete the erase operation. The Program Suspend/Program Resume feature enables the host system to pause a program operation in a given sector to read any other sector and then complete the program operation. The hardware RESET# pin terminates any operation in progress and resets the device, after which it is then ready for a new operation. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the host system to read boot-up firmware from the Flash memory device. The device reduces power consumption in the standby mode when it detects specific voltage levels on CE# and RESET#, or when addresses have been stable for a specified period of time. The SecSi (Secured Silicon) Sector provides a 256 byte area for code or data that can be permanently protected. Once this sector is protected, no further changes within the sector can occur. AMD MirrorBit flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via hot-hole assisted erase. The data is programmed using hot electron injection. The VersatileI/O™ (VIO) control allows the host system to set the voltage levels that the device generates 2 Am29LV065M A D V A N C E I N F O R M A T I O N PRODUCT SELECTOR GUIDE Part Number Am29LV065M VCC = 3.0–3.6 V Speed Option 90R (VIO = 3.0–3.6 V) VCC = 2.7–3.6 V 101 (VIO = 2.7–3.6 V) 112 (VIO = 1.65–3.6 V) 120 (VIO = 1.65–3.6 V) Max. Access Time (ns) 90 100 110 120 Max. CE# Access Time (ns) 90 100 110 120 Max. Page access time (tPACC) 25 30 40 40 Max. OE# Access Time (ns) 25 30 40 40 BLOCK DIAGRAM DQ0–DQ7 RY/BY# VCC Sector Switches VSS VIO Erase Voltage Generator RESET# WE# ACC Input/Output Buffers State Control Command Register PGM Voltage Generator Chip Enable Output Enable Logic CE# OE# VCC Detector A22–A0 Timer Address Latch STB Am29LV065M STB Data Latch Y-Decoder Y-Gating X-Decoder Cell Matrix 3 A D V A N C E I N F O R M A T I O N CONNECTION DIAGRAMS NC A22 A16 A15 A14 A13 A12 A11 A9 A8 WE# RESET# ACC RY/BY# A18 A7 A6 A5 A4 A3 A2 A1 NC NC NC NC A17 VSS A20 A19 A10 DQ7 DQ6 DQ5 DQ4 VCC VIO A21 DQ3 DQ2 DQ1 DQ0 OE# VSS CE# A0 NC NC 4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48-Pin Standard TSOP 48-Pin Reverse TSOP Am29LV065M 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC NC A17 VSS A20 A19 A10 DQ7 DQ6 DQ5 DQ4 VCC VIO A21 DQ3 DQ2 DQ1 DQ0 OE# VSS CE# A0 NC NC NC A22 A16 A15 A14 A13 A12 A11 A9 A8 WE# RESET# ACC RY/BY# A18 A7 A6 A5 A4 A3 A2 A1 NC NC A D V A N C E I N F O R M A T I O N CONNECTION DIAGRAMS 63-Ball FBGA Top View, Balls Facing Down A8 B8 L8 M8 NC* NC* NC* NC* A7 B7 C7 D7 E7 F7 G7 H7 J7 K7 L7 M7 NC* NC* A14 A13 A15 A16 A17 NC A20 VSS NC* NC* C6 D6 E6 F6 G6 H6 J6 K6 A9 A8 A11 A12 A19 A10 DQ6 DQ7 C5 D5 E5 F5 G5 H5 J5 K5 WE# RESET# A22 NC DQ5 NC VCC DQ4 C4 D4 E4 F4 G4 H4 J4 K4 RY/BY# ACC NC NC DQ2 DQ3 VIO A21 C3 D3 E3 F3 G3 H3 J3 K3 A7 A18 A6 A5 DQ0 NC NC DQ1 A2 C2 D2 E2 F2 G2 H2 J2 K2 L2 M2 NC* A3 A4 A2 A1 A0 CE# OE# VSS NC* NC* L1 M1 NC* NC* A1 NC* B1 NC* * Balls are shorted together via the substrate but not connected to the die. Special Handling Instructions for FBGA Package Special handling is required for Flash Memory products in FBGA packages. Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time. Am29LV065M 5 A D V A N C E PIN DESCRIPTION A22–A0 = 23 Address inputs DQ7–DQ0 = 8 Data inputs/outputs CE# = Chip Enable input OE# = Output Enable input WE# = Write Enable input ACC = Acceleration input RESET# = Hardware Reset Pin input RY/BY# = Ready/Busy output VCC = 3.0 volt-only single power supply (see Product Selector Guide for speed options and voltage supply tolerances) I N F O R M A T I O N LOGIC SYMBOL 23 A22–A0 CE# 8 DQ7–DQ0 OE# WE# VIO = Output Buffer power VSS = Device Ground NC = Pin Not Connected Internally 6 ACC RESET# RY/BY# VIO Am29LV065M A D V A N C E I N F O R M A T I O N ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: Am29LV065M U 90R WH I TEMPERATURE RANGE I = Industrial (–40°C to +85°C) PACKAGE TYPE E = 48-Pin Standard Pinout Thin Small Outline Package (TS 048) F = 48-Pin Reverse Pinout Thin Small Outline Package (TSR048) WH = 63-Ball Fine-Pitch Ball Grid Array (FBGA) 0.80 mm pitch, 11 x 12 mm package (FBE063) SPEED OPTION See Product Selector Guide and Valid Combinations SECTOR ARCHITECTURE U = Uniform sector device DEVICE NUMBER/DESCRIPTION Am29LV065M 64 Megabit (8 M x 8-Bit) MirrorBit Uniform Sector Flash Memory with VersatileIO Control 3.0 Volt-only Read, Program, and Erase Valid Combinations for TSOP Package Am29LV065MU90R Am29LV065MU101 Am29LV065MU112 Am29LV065MU120 EI, FI Speed (ns) VIO Range VCC Range 90 3.0–3.6 V 3.0–3.6 V 100 2.7–3.6 V 110 1.65–3.6 V 120 1.65–3.6 V Valid Combinations for Fine-Pitch BGA Package Order Number Package Marking Am29LV065MU90R L065MU90R VCC Speed VIO Range Range (ns) 90 3.0– 3.6 V 100 2.7– 3.6 V 2.7–3.6 V Am29LV065MU101 L065MU01V WHI I Am29LV065MU112 L065MU11V 110 1.65– 3.6 V Am29LV065MU120 L065MU12V 120 1.65– 3.6 V 3.0– 3.6 V 2.7– 3.6 V Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations. Am29LV065M 7 A D V A N C E I N F O R M A T I O N PHYSICAL DIMENSIONS TS 048—48-Pin Standard Thin Small Outline Package Dwg rev AA; 10/99 8 Am29LV065M A D V A N C E I N F O R M A T I O N PHYSICAL DIMENSIONS TSR048—48-Pin Reverse Thin Small Outline Package Dwg rev AA; 10/99 Am29LV065M 9 A D V A N C E I N F O R M A T I O N PHYSICAL DIMENSIONS FBE063—63-Ball Fine-Pitch Ball Grid Array, 12 x 11 mm Package Dwg rev AF; 10/99 10 Am29LV065M A D V A N C E I N F O R M A T I O N REVISION SUMMARY Revision A (August 3, 2001) Revision A+1 (October 3, 2001) Initial release as abbreviated Advance Information data sheet. Global Added 120 ns device, changed 100 ns, VIO = 1.65–2.7 V device to 110 ns, changed 90 ns operating range to 3.0–3.6 V. Physical Dimensions Added section. Trademarks Copyright © 2001 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc. ExpressFlash is a trademark of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. Am29LV065M 11