LINER LTC4098EPDC-TRPBF Usb compatible switching power managers/li-ion chargers with overvoltage protection Datasheet

LTC4098/LTC4098-1
USB Compatible Switching
Power Managers/Li-Ion Chargers
with Overvoltage Protection
DESCRIPTION
FEATURES
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Switching Regulator with Bat-TrackTM Adaptive
Output Control Makes Optimal Use of Limited
Power Available from USB Port to Charge Battery
and Power Application
Overvoltage Protection Guards Against Damage
Bat-Track External Step-Down Switching Regulator
Control Maximizes Efficiency from Automotive,
Firewire and Other High Voltage Input Sources
180mΩ Internal Ideal Diode Plus External Ideal Diode
Controller Seamlessly Provide Low Loss PowerPathTM
when Input Power is Limited or Unavailable
Preset 4.2V Charge Voltage with 0.5% Accuracy
(4.1V for LTC4098-1)
4.1V Float Voltage (LTC4098-1) Improves Battery Life
and High Temperature Safety Margin
Instant-On Operation with Discharged Battery
700mA Maximum Load Current from USB Port
1.5A Maximum Charge Current with Thermal Limiting
Ultra-Thin (0.55mm) 20-Lead 3mm × 4mm QFN
The LTC®4098/LTC4098-1 are high efficiency USB PowerPath controllers and full-featured Li-Ion/Polymer battery
chargers. They seamlessly manage power distribution from
multiple sources including USB, wall adapter, automotive,
Firewire or other high voltage DC/DC converters, and a
Li-Ion/Polymer battery.
The LTC4098/LTC4098-1’s internal switching regulator
automatically limits its input current for USB compatibility.
For automotive and other high voltage applications, the
LTC4098/LTC4098-1 interface with a Linear Technology
external switching regulator to provide a high efficiency
high voltage power path. Both the USB and the optional
high voltage inputs feature Bat-Track optimized charging
to provide maximum power to the application and ease
thermal issues in high power density applications with
input supplies from 5V to as high as 38V.
An overvoltage circuit protects the LTC4098/LTC4098-1
from high voltage damage on the USB/wall adaptor inputs
with an N-channel FET and a resistor.
APPLICATIONS
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The LTC4098/LTC4098-1 are available in the ultra-thin
(0.55mm) 20-lead 3mm × 4mm QFN surface mount
package.
Media Players
GPS
PDAs
Smart Phones
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Bat-Track and PowerPath are trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
TYPICAL APPLICATION
High Efficiency USB/Automotive Battery Charger with Overvoltage Protection
INPUT
AUTOMOTIVE,
FIREWIRE, ETC.
USB Switching Regulator Efficiency
to System Load (PVOUT/PVBUS)
100
LT3653
3.3μH
VBUS
WALL
VC
SW
10μF
6.04k
OVGATE
LTC4098/LTC4098-1
VOUT
OVSENS
TO μC
3
D0-D2
CLPROG
70
3.01k
1k
BAT = 3.3V
50
40
GND BATSENS
10μF
20
10
0.1μF
BAT = 4.2V
60
30
BAT
PROG
80
EFFICIENCY (%)
INPUT
USB
90
SYSTEM
LOAD
+
Li-Ion
40981 TA01a
VBUS = 5V
IBAT = 0mA
10x MODE
0
0.01
0.1
IVOUT (A)
1
40981 TA01b
40981fb
1
LTC4098/LTC4098-1
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
VBUS, WALL (Transient) t < 1ms,
Duty Cycle < 1% .......................................... –0.3V to 7V
VBUS, WALL (Static), BAT, BATSENS,
CHRG, NTC, ................................................. –0.3V to 6V
D0, D1, D2 .........–0.3V to Max (VBUS, VOUT, BAT) + 0.3V
IOVSENS.................................................................±10mA
ICLPROG ....................................................................3mA
IPROG ........................................................................2mA
ICHRG ......................................................................50mA
IVOUT, ISW, IBAT ............................................................2A
IACPR ......................................................................10mA
Operating Temperature Range.................. –40°C to 85°C
Junction Temperature ........................................... 125°C
Storage Temperature Range................... –65°C to 125°C
D2
WALL
ACPR
VC
TOP VIEW
20 19 18 17
OVSENS 1
16 D1
OVGATE 2
15 D0
CLPROG 3
14 SW
21
NTCBIAS 4
13 VBUS
12 VOUT
NTC 5
8
9 10
GND
IDGATE
7
CHRG
11 BAT
PROG
BATSENS 6
PDC PACKAGE
20-LEAD (3mm s 4mm) PLASTIC UTQFN
TJMAX = 125°C, θJA = 43°C/W
EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4098EPDC#PBF
LTC4098EPDC#TRPBF
DDVT
20-Lead (3mm × 4mm) Plastic UTQFN
–40°C to 85°C
LTC4098EPDC-1#PBF
LTC4098EPDC-1#TRPBF
DSZT
20-Lead (3mm × 4mm) Plastic UTQFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, RCLPROG = 3.01k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Power Supply
l
4.35
l
l
l
l
l
92
445
815
0.32
1.6
VBUS
Input Supply Voltage
IVBUS(LIM)
Total Input Current
1x Mode
5x Mode
10x Mode
Low Power Suspend Mode
High Power Suspend Mode
IVBUSQ (Note 4)
Input Quiescent Current
1x Mode
5x Mode
10x Mode
Low Power Suspend Mode
High Power Suspend Mode
6
15
15
0.042
0.042
mA
mA
mA
mA
mA
1x Mode
5x Mode
10x Mode
Low Power Suspend Mode
High Power Suspend Mode
230
1164
2210
11.6
60
mA/mA
mA/mA
mA/mA
mA/mA
mA/mA
hCLPROG (Note 4) Ratio of Measured VBUS Current to
CLPROG Program Current
5.5
97
473
883
0.39
2.05
100
500
1000
0.5
2.5
V
mA
mA
mA
mA
mA
40981fb
2
LTC4098/LTC4098-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, RCLPROG = 3.01k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
IVOUT
VOUT Current Available Before
Discharging Battery
1x Mode, BAT = 3.3V
5x Mode, BAT = 3.3V
10x Mode, BAT = 3.3V
Low Power Suspend Mode
High Power Suspend Mode
VCLPROG
CLPROG Servo Voltage in Current Limit
1x, 5x, 10x Modes
Suspend Modes
VUVLO
VBUS Undervoltage Lockout
Rising Threshold
Falling Threshold
MIN
TYP
0.26
1.6
135
659
1231
0.32
2.04
MAX
UNITS
0.41
2.46
mA
mA
mA
mA
mA
1.188
100
3.95
4.30
4.00
V
mV
4.35
VDUVLO
VBUS to BAT Differential Undervoltage
Lockout
Rising Threshold
Falling Threshold
VOUT
VOUT Voltage
1x, 5x, 10x Modes, 0V < BAT ≤ 4.2V,
IVOUT = 0mA, Battery Charger Off
3.5
BAT + 0.3
4.7
V
USB Suspend Modes, IVOUT = 250μA
4.5
4.6
4.7
V
1.96
2.25
2.65
MHz
fOSC
Switching Frequency
RPMOS
PMOS On-Resistance
RNMOS
NMOS On-Resistance
IPEAK
Peak Inductor Current Clamp
RSUSP
Suspend LDO Output Resistance
200
50
V
V
1x Mode
5x Mode
10x Mode
mV
mV
0.18
Ω
0.30
Ω
1.2
1.7
3
A
A
A
15
Ω
Bat-Track External Switching Regulator Control
VWALL
Absolute WALL Input Threshold
Rising Threshold
Falling Threshold
ΔVWALL
Differential WALL Input Threshold
WALL-BAT Rising Threshold
WALL-BAT Falling Threshold
Regulation Target
4.2
4.3
3.2
4.4
V
V
0
90
30
3.5
BAT + 0.3
V
100
μA
WALL Quiescent Current
45
mV
mV
ACPR High Voltage
IACPR = 0mA
VOUT
V
ACPR Low Voltage
IACPR = 0mA
0
V
Overvoltage Protection
VOVP
Overvoltage Protection Threshold
Rising Threshold, ROVSENS = 6.04k
VOVGATE
OVGATE Output Voltage
Input Below VOVP
Input Above VOVP
tRISE
OVGATE Time to Reach Regulation
COVGATE = 1nF
6.20
6.35
6.50
V
1.88 • VOVSENSE
0
12
V
V
2.2
ms
Battery Charger
VFLOAT
LTC4098 BAT Regulated Output Voltage
LTC4098-1 BAT Regulated Output
Voltage
0°C ≤ TA ≤ 85°C
4.179
4.165
4.200
4.200
4.221
4.235
V
V
0°C ≤ TA ≤ 85°C
4.080
4.066
4.100
4.100
4.121
4.134
V
V
980
192
1030
206
1080
220
mA
mA
ICHG
Constant-Current Mode Charge Current
RPROG = 1k, 10x Mode
RPROG = 5k, 5x, 10x Modes
IBAT
Battery Drain Current
VBUS > VUVLO, PowerPath Switching
Regulator On, Battery Charger Off,
IVOUT = 0μA
3.7
5
μA
VBUS = 0V, IVOUT = 0μA (Ideal Diode
Mode)
25
35
μA
40981fb
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LTC4098/LTC4098-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, RCLPROG = 3.01k, unless otherwise noted.
SYMBOL
PARAMETER
VPROG
PROG Pin Servo Voltage
VPROG,TRKL
PROG Pin Servo Voltage in Trickle
Charge
CONDITIONS
MIN
BAT < VTRKL
TYP
MAX
UNITS
1.000
V
0.100
V
hPROG
Ratio of IBAT to PROG Pin Current
VTRKL
Trickle Charge Threshold Voltage
ΔVTRKL
Trickle Charge Hystersis Voltage
VRECHRG
Recharge Battery Threshold Voltage
Threshold Voltage Relative to VFLOAT
–80
–100
–120
mV
tTERM
Safety Timer Termination Period
Timer Starts When BAT = VFLOAT
3.4
4
4.6
Hour
tBADBAT
Bad Battery Termination Time
BAT < VTRKL
0.43
0.5
0.58
Hour
hC/10
End of Charge Indication Current Ratio
(Note 5)
0.09
0.1
0.11
mA/mA
VCHRG
CHRG Pin Output Low Voltage
ICHRG = 5mA
65
100
mV
ICHRG
CHRG Pin Input Current
BAT = 4.5V, VCHRG = 5V
0
1
μA
RON_CHG
Battery Charger Power FET
On-Resistance (Between VOUT and BAT)
IBAT = 200mA
TLIM
Junction Temperature in ConstantTemperature Mode
1030
BAT Rising
2.7
2.85
mA/mA
3
130
V
mV
0.18
Ω
110
°C
NTC
VCOLD
Cold Temperature Fault Threshold
Voltage
Rising Threshold
Hysteresis
75.0
76.5
1.5
78.0
%NTCBIAS
%NTCBIAS
VHOT
Hot Temperature Fault Threshold
Voltage
Falling Threshold
Hysteresis
33.4
34.9
1.5
36.4
%NTCBIAS
%NTCBIAS
VDIS
NTC Disable Threshold Voltage
Falling Threshold
Hysteresis
0.7
1.7
50
2.7
%NTCBIAS
mV
INTC
NTC Leakage Current
NTC = 5V
–50
50
nA
VFWD
Forward Voltage Detection
IVOUT = 10mA
RDROPOUT
Internal Diode On-Resistance, Dropout
IVOUT = 200mA
IMAX
Diode Current Limit
Ideal Diode
15
mV
0.18
Ω
2
A
Logic (D0, D1, D2)
VIL
Input Low Voltage
VIH
Input High Voltage
IPD
Static Pull-Down Current
0.4
1.2
VPIN = 1V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC4098E/LTC4098E-1 are guaranteed to meet performance
specifications from 0°C to 85°C. Specifications over the – 40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
V
V
2
μA
Note 3: The LTC4098E/LTC4098E-1 include overtemperature protection
that is intended to protect the device during momentary overload
conditions. Junction temperature will exceed 125°C when overtemperature
protection is active. Continuous operation above the specified maximum
operating junction temperature may impair device reliability.
Note 4: Total input current is the sum of quiescent current, IVBUSQ, and
measured current given by VCLPROG/RCLPROG • (hCLPROG + 1)
Note 5: hC/10 is expressed as a fraction of measured full charge current
with a 5k PROG resistor.
40981fb
4
LTC4098/LTC4098-1
TYPICAL PERFORMANCE CHARACTERISTICS
Ideal Diode Resistance
vs Battery Voltage
Ideal Diode V-I Characteristics
1.0
750
INTERNAL IDEAL
DIODE ONLY
0.4
0.2
INTERNAL IDEAL
DIODE
0.15
0.10
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
0.05
0
0.04
0.12
0.16
0.08
FORWARD VOLTAGE (V)
0
2.7
0.20
3.0
700
CURRENT (mA)
RESISTANCE (7)
CURRENT (A)
800
0.20
0.6
0
USB Compliant Load Current
Available Before Discharging Battery
0.25
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
0.8
TA = 25°C unless otherwise noted.
3.6
3.9
3.3
BATTERY VOLTAGE (V)
650
600
550 VBUS = 5V
RCLPROG = 3.01k
5x USB SETTING
500
3.0
3.3
2.7
4.2
3.6
40981 G01
40981 G02
VOUT Voltage vs VOUT Current
(Battery Charger Disabled)
40981 G03
Battery Charge Current vs VOUT
Current (Battery Charger Enabled)
VOUT Voltage vs VOUT Current
(Battery Charger Enabled)
4.50
4.2
3.9
BATTERY VOLTAGE (V)
3.75
700
3.50
450
OUTPUT VOLTAGE (V)
BAT = 3.4V
3.75
3.25
VBUS = 5V
BAT = 3V
RCLPROG = 3.01k
RPROG = 2k
5x USB SETTING
3.00
3.50
VBUS = 5V
5x MODE
3.25
0
200
600
400
OUTPUT CURRENT (mA)
2.75
800
200
600
400
OUTPUT CURRENT (mA)
150
600
CHARGE CURRENT (mA)
CURRENT (mA)
700
110 VBUS = 5V
RCLPROG = 3.01k
1x USB SETTING
100
3.0
3.3
2.7
500
150
125
VBUS = 5V
RPROG = 1k
RCLPROG = 3.01k
400
300
LTC4098
200
LTC4098-1
3.6
3.9
4.2
40981 G07
800
USB Limited Battery Charge
Current vs Battery Voltage
5x USB SETTING,
BATTERY CHARGER SET FOR 1A
0
3.0
3.3
3.6
3.9
2.7
BATTERY VOLTAGE (V)
VBUS = 5V
RPROG = 1k
RCLPROG = 3.01k
100
75
LTC4098
50
LTC4098-1
25
100
BATTERY VOLTAGE (V)
200
600
400
OUTPUT CURRENT (mA)
0
40981 G06
USB Limited Battery Charge
Current vs Battery Voltage
160
120
800
40981 G05
USB Compliant Load Current
Available Before Discharging Battery
130
VBUS = 5V
BAT = 3V
RCLPROG = 3.01k
RPROG = 2k
5x USB SETTING
–50
–300
0
40981 G04
140
200
CHARGE CURRENT (mA)
OUTPUT VOLTAGE (V)
4.00
CHARGE CURRENT (mA)
BAT = 4V
4.25
0
4.2
40981 G08
1x USB SETTING,
BATTERY CHARGER SET FOR 1A
2.7
3.0
3.3
3.6
3.9
BATTERY VOLTAGE (V)
4.2
40981 G09
40981fb
5
LTC4098/LTC4098-1
TYPICAL PERFORMANCE CHARACTERISTICS
Battery Drain Current
vs Battery Voltage
30
TA = 25°C unless otherwise noted.
100
IVOUT = 0μA
25
100
BAT = 3.8V
1x MODE
90
RCLPROG = 3.01k
RPROG = 1k
IVOUT = 0mA
90 LTC4098
5x, 10x MODE
15
10
VBUS = 5V
(SUSPEND MODE)
3.0
70
60
3.3
3.6
3.9
BATTERY VOLTAGE (V)
40
0.01
4.2
0.1
OUTPUT CURRENT (A)
2.5
2.0
OUTPUT VOLTAGE (V)
4.0
10
3.0
0
2.5
2
4
3
VBUS VOLTAGE (V)
5
6
SUSPEND LOW
0
0.5
SUSPEND LOW
0
1.5
2
1
OUTPUT CURRENT (mA)
2.5
100
500
CHARGE CURRENT (mA)
600
60
40
3.4
VOUT (V)
3.5
3.6
40981 G16
0.5
1.5
2
1
OUTPUT CURRENT (mA)
1.003
RPROG = 2k
400
THERMAL REGULATION
300
200
0
–40 –20
0
2.5
Normalized Battery Charger Float
Voltage vs Temperature
100
20
0
40981 G15
Battery Charge Current
vs Temperature
120
3.3
1.0
40981 G14
Automatic Battery Charge
Current Reduction
80
SUSPEND HIGH
1.5
0.5
VBUS = 5V
BAT = 3.3V
RCLPROG = 3.01k
40981 G13
0
3.2
VBUS CURRENT (mA)
4.5
3.5
4.2
VBUS = 5V
BAT = 3.3V
RCLPROG = 3.01k
SUSPEND HIGH
20
3.6
3.9
3.3
BATTERY VOLTAGE (V)
VBUS Current vs VOUT Current
in Suspend
5.0
BAT = 3.8V
IVOUT = 0mA
30
3.0
40981 G12
VOUT Voltage vs VOUT Current
in Suspend
40
VBUS CURRENT (μA)
60
2.7
1
40981 G11
VBUS Current vs VBUS Voltage
(Suspend)
1
1x CHARGING
EFFICIENCY
80
70
40981 G10
50
5x CHARGING
EFFICIENCY
50
0
2.7
80
EFFICIENCY (%)
EFFICIENCY (%)
20
NORMALIZED FLOAT VOLTAGE
BATTERY CURRENT (μA)
VBUS = 0V
5
% PROGRAMMED CHARGE CURRENT
Battery Charging Efficiency vs
Battery Voltage with No External
Load (PBAT/PVBUS)
PowerPath Switching Regulator
Efficiency vs Output Current
20 40 60 80
TEMPERATURE (°C)
100 120
40981 G17
1.002
1.001
1.000
0.999
0.998
0.997
–40
–15
35
10
TEMPERATURE (°C)
60
85
40981 G18
40981fb
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LTC4098/LTC4098-1
TYPICAL PERFORMANCE CHARACTERISTICS
Oscillator Frequency
vs Temperature
Low Battery (Instant-On)
Output Voltage vs Temperature
VBUS Quiescent Current
vs Temperature
2.350
3.68
BAT = 2.7V
IVOUT = 100mA
5x MODE
20
QUIESCENT CURRENT (mA)
FREQUENCY (MHz)
3.64
2.250
2.200
3.62
2.150
–15
35
10
TEMPERATURE (oC)
60
85
2.100
–40
–15
35
10
TEMPERATURE (°C)
60
11
8
1x MODE
2
–40
85
–15
–10
35
TEMPERATURE (°C)
40981 G20
40981 G19
60
85
40981 G21
CHRG Pin Current vs Voltage
(Pull-Down State)
Quiescent Current in Suspend
vs Temperature
45
5x MODE
14
5
100
VBUS = 5V
IVOUT = 0μA
42
CHRG PIN CURRENT (mA)
3.60
–40
VBUS = 5V
IVOUT = 0μA
17
2.300
3.66
QUIESCENT CURRENT (μA)
OUTPUT VOLTAGE (V)
TA = 25°C unless otherwise noted.
39
36
33
VBUS = 5V
BAT = 3.8V
80
60
40
20
30
27
–40
0
–15
10
35
TEMPERATURE (°C)
60
85
0
1
3
4
2
CHRG PIN VOLTAGE (V)
40981 G23
40981 G22
Suspend LDO Transient Response
(500μA to 1.5mA)
IOUT
500μA/DIV
5
OVP Connection Waveform
VBUS
5V/DIV
0mA
OVGATE
5V/DIV
VOUT
20mV/DIV
AC COUPLED
OVP INPUT VOLTAGE
0V TO 5V STEP
5V/DIV
500μs/DIV
40981 G24
500μs/DIV
40981 G25
40981fb
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LTC4098/LTC4098-1
TYPICAL PERFORMANCE CHARACTERISTICS
OVP Protection Waveform
TA = 25°C unless otherwise noted.
OVP Reconnection Waveform
VBUS
5V/DIV
VBUS
5V/DIV
OVGATE
5V/DIV
OVGATE
5V/DIV
OVP INPUT VOLTAGE
10V TO 5V STEP
5V/DIV
OVP INPUT VOLTAGE
5V TO 10V STEP
5V/DIV
40981 G26
500μs/DIV
OVSENS Quiescent Current
vs Temperature
Rising Overvoltage Threshold
vs Temperature
12
OVSENS CONNECTED
TO INPUT THROUGH
10 6.04k RESISTOR
6.275
33
31
8
OVGATE (V)
35
6.270
6.265
–15
35
10
TEMPERATURE (°C)
60
85
40981 G28
6
4
6.260
29
27
–40
OVGATE vs OVSENS
6.280
VOVSENS = 5V
OVP THRESHOLD (V)
QUIESCENT CURRENT (μA)
37
40981 G27
500μs/DIV
6.255
–40
2
–15
35
10
TEMPERATURE (°C)
60
85
40981 G29
0
0
2
4
6
INPUT VOLTAGE (V)
8
40981 G30
40981fb
8
LTC4098/LTC4098-1
PIN FUNCTIONS
OVSENS (Pin 1): Overvoltage Protection Sense Input.
OVSENS should be connected through a 6.04k resistor
to the input power connector and the drain of an external
N-channel MOS pass transistor. When the voltage on this
pin exceeds a preset level, the OVGATE pin will be pulled
to GND to disable the pass transistor and protect downstream circuitry. If overvoltage protection is not desired,
connect OVSENS to GND.
OVGATE (Pin 2): Overvoltage Protection Gate Output.
Connect OVGATE to the gate pin of an external N-channel
MOS pass transistor. The source of the transistor should
be connected to VBUS and the drain should be connected
to the product’s DC input connector. This pin is connected to an internal charge pump capable of creating
sufficient overdrive to fully enhance the pass transistor. If
an overvoltage condition is detected, OVGATE is brought
rapidly to GND to prevent damage to downstream circuitry.
OVGATE works in conjunction with OVSENS to provide
this protection. If overvoltage protection is not desired,
leave OVGATE open.
CLPROG (Pin 3): USB Current Limit Program and Monitor
Pin. A 1% resistor from CLPROG to ground determines
the upper limit of the current drawn from the VBUS pin.
A precise fraction of the input current, hCLPROG, is sent
to the CLPROG pin when the high side switch is on. The
switching regulator delivers power until the CLPROG
pin reaches 1.188V. Therefore, the current drawn from
VBUS will be limited to an amount given by hCLPROG and
RCLPROG. There are several ratios for hCLPROG available,
two of which correspond to the 500mA and 100mA USB
specifications. A multilayer ceramic averaging capacitor
is also required at CLPROG for filtering.
NTCBIAS (Pin 4): NTC Thermistor Bias Output. If NTC
operation is desired, connect a bias resistor between
NTCBIAS and NTC, and an NTC thermistor between NTC
and GND. To disable NTC operation, connect NTC to GND
and leave NTCBIAS open.
NTC (Pin 5): Input to the NTC Thermistor Monitoring
Circuits. The NTC pin connects to a negative temperature
coefficient thermistor which is typically co-packaged with
the battery pack to determine if the battery is too hot or too
cold to charge. If the battery’s temperature is out of range,
charging is paused until the battery temperature re-enters
the valid range. A low drift bias resistor is required from
NTCBIAS to NTC and a thermistor is required from NTC
to ground. If the NTC function is not desired, the NTC pin
should be grounded.
BATSENS (Pin 6): Battery Voltage Sense Input. For proper
operation, this pin must always be connected to BAT. For
best performance, connect BATSENS to BAT physically
close to the Li-Ion cell.
PROG (Pin 7): Charge Current Program and Charge Current Monitor Pin. Connecting a 1% resistor from PROG
to ground programs the charge current. If sufficient input
power is available in constant-current mode, this pin servos
to 1V. The voltage on this pin always represents the actual
charge current by using the following formula:
IBAT =
VPROG
• 1030
RPROG
CHRG (Pin 8): Open-Drain Charge Status Output. The
CHRG pin indicates the status of the battery charger. Four
possible states are represented by CHRG: charging, not
charging, unresponsive battery and battery temperature
out of range. CHRG is modulated at 35kHz and switches
between a low and a high duty cycle for easy recognition
by either humans or microprocessors. CHRG requires a
pull-up resistor and/or LED to provide indication.
GND (Pin 9, 21): Exposed Pad and pin must be soldered
to the PCB to provide a low electrical and thermal impedance connection to ground.
IDGATE (Pin 10): Ideal Diode Amplifier Output. This pin
controls the gate of an external P-channel MOSFET transistor used to supplement the internal ideal diode. The source
of the P-channel MOSFET should be connected to VOUT
and the drain should be connected to BAT.
BAT (Pin 11): Single-Cell Li-Ion Battery Pin. Depending
on available power and load, a Li-Ion battery on BAT will
either deliver system power to VOUT through the ideal diode
or be charged from the battery charger. The LTC4098 will
charge to a maximum voltage of 4.200V. The LTC4098-1
will charge to a maximum voltage of 4.100V.
40981fb
9
LTC4098/LTC4098-1
PIN FUNCTIONS
VOUT (Pin 12): Output Voltage of the Switching PowerPath
Controller and Input Voltage of the Battery Charger. The
majority of the portable product should be powered from
VOUT. The LTC4098/LTC4098-1 will partition the available
power between the external load on VOUT and the internal
battery charger. Priority is given to the external load and
any extra power is used to charge the battery. An ideal
diode from BAT to VOUT ensures that VOUT is powered even
if the load exceeds the allotted power from VBUS or if the
VBUS power source is removed. VOUT should be bypassed
with a low impedance multilayer ceramic capacitor.
VBUS (Pin 13): Input Voltage for the Switching PowerPath
Controller. VBUS will usually be connected to the USB port
of a computer or a DC output wall adapter. VBUS should
be bypassed with a low impedance multilayer ceramic
capacitor.
SW (Pin 14): The SW pin delivers power from VBUS to
VOUT via the step-down switching regulator. An inductor
should be connected from SW to VOUT. See the Applications Information section for a discussion of inductance
value and current rating.
D0 (Pin 15): Mode Select Input Pin. D0, in combination with
the D1 pin and the D2 pin, controls the current limit and
battery charger functions of the LTC4098/LTC4098-1 (see
Table 1). This pin is pulled low by a weak current sink.
D1 (Pin 16): Mode Select Input Pin. D1, in combination with
the D0 pin and the D2 pin, controls the current limit and
battery charger functions of the LTC4098/LTC4098-1 (see
Table 1). This pin is pulled low by a weak current sink.
D2 (Pin 17): Mode Select Input Pin. D2, in combination
with the D0 pin and D1 pin, controls the current limit and
battery charger functions of the LTC4098/LTC4098-1 (see
Table 1). This pin is pulled low by a weak current sink.
WALL (Pin 18): External Power Source Sense Input.
WALL should be connected to the output of the external
high voltage switching regulator and to the drain of an
external P-channel MOS transistor. It is used to determine
when power is applied to the external regulator. When
power is detected, ACPR is driven low and the USB input
is automatically disabled.
ACPR (Pin 19): External Power Source Present Output
(Active Low). ACPR indicates that the output of the external
high voltage step-down switching regulator is suitable for
use by the LTC4098/LTC4098-1. It should be connected to
the gate of an external P-channel MOS transistor whose
source is connected to VOUT and whose drain is connected
to WALL. ACPR has a high level of VOUT and a low level
of GND.
VC (Pin 20): Bat-Track External Switching Regulator Control
Output. This pin drives the VC pin of a Linear Technology
external step-down switching regulator. In concert with
WALL and ACPR, it will regulate VOUT to maximize battery
charger efficiency.
Exposed Pad (Pin 21): Ground. The Exposed Pad must
be soldered to the PCB.
40981fb
10
TO USB
OR WALL
ADPAPTER
T NTC
5
4
3
13
0.1V
NTC
NTCBIAS
1.188V
CLPROG
ISWITCH /N ILDO /M
VBUS
OVGATE
+
–
+
–
+
–
2
+
–
1
AVERAGE INPUT
CURRENT LIMIT
CONTROLLER
NTC ENABLE
OVERTEMP
UNDERTEMP
VOUT
+
–
SUSPEND
LDO
100mV
s2
OVERVOLTAGE PROTECTION
– +
NTC FAULT
OSC
4.6V
Q
D0
15
D1
16
LOGIC
D2
17
NONOVERLAP
AND DRIVE
LOGIC
AVERAGE OUTPUT
VOLTAGE LIMIT
CONTROLLER
PWM
R
S
+–
6V
20
+
+
–
+
–
OVSENS
VC
GND
9
3.6V
GND
21
+–
0.3V
HVOK
VOUT
ISENSE
SW
1V
7
PROG
18
BAD CELL
NTC
100mV
VOUT
3.6V
BAT + 0.3V
IBAT/1030
CONSTANT-CURRENT
CONSTANT-VOLTAGE
BATTERY CHARGER
+
–
VC
LT3653
+
+
–
VIN
PWM
–
+
15mV
0V
IDEAL
DIODE
4.3V
WALL
+
–
+
–
TO AUTOMOTIVE,
FIREWIRE, ETC.
+
–
8
11
6
10
12
14
19
40981 BD
CHRG
BAT
BATSENS
IDGATE
VOUT
SW
ACPR
SINGLECELL
Li-Ion
+
OPTIONAL
EXTERNAL
IDEAL DIODE
PMOS
TO SYSTEM
LOAD
LTC4098/LTC4098-1
BLOCK DIAGRAM
40981fb
11
LTC4098/LTC4098-1
OPERATION
Introduction
The LTC4098/LTC4098-1 are high efficiency power management and Li-Ion charger solutions designed to make optimal
use of the power available from a variety of sources, while
minimizing power dissipation and easing thermal budgeting
constraints. The innovative PowerPath architecture ensures
that the application is powered immediately after external
voltage is applied, even with a completely dead battery by
prioritizing power to the application over the battery.
The LTC4098/LTC4098-1 include a Bat-Track monolithic
step-down switching regulator for USB, wall adapters and
other 5V sources. Designed specifically for USB applications, the switching regulator incorporates a precision
average input current limit for USB compatibility. Because
power is conserved, the LTC4098/LTC4098-1 allow the load
current on VOUT to exceed the current drawn by the USB
port, making maximum use of the allowable USB power
for battery charging.
The switching regulator and battery charger communicate
to ensure that the average input current never exceeds the
USB specifications.
For automotive, Firewire, and other high voltage applications, the LTC4098/LTC4098-1 provide Bat-Track control
of an external LTC step-down switching regulator to
maximize battery charger efficiency and minimize heat
production.
When power is available from both the USB and high
voltage inputs, the high voltage input is prioritized and
the USB input is automatically disabled.
The LTC4098/LTC4098-1 feature an overvoltage protection circuit which is designed to work with an external
N-channel FET to prevent damage to its inputs caused by
accidental application of high voltage.
provides either low power or high power USB suspend
current to the application.
Bat-Track Input Current Limited Step Down Switching
Regulator
The power delivered from VBUS to VOUT is controlled
by a 2.25MHz constant-frequency step-down switching
regulator. To meet the USB maximum load specification,
the switching regulator contains a measurement and
control system that ensures that the average input current remains below the level programmed at CLPROG.
VOUT drives the combination of the external load and the
battery charger.
If the combined load does not cause the switching power
supply to reach the programmed input current limit, VOUT
will track approximately 0.3V above the battery voltage.
By keeping the voltage across the battery charger at this
low level, power lost to the battery charger is minimized.
Figure 1 shows the power path components.
If the combined external load plus battery charge current is
large enough to cause the switching power supply to reach
the programmed input current limit, the battery charger
will reduce its charge current by precisely the amount
necessary to enable the external load to be satisfied. Even
if the battery charge current is programmed to exceed the
allowable USB current, the USB specification for average
input current will not be violated; the battery charger will
reduce its current as needed. Furthermore, if the load current at VOUT exceeds the programmed power from VBUS,
load current will be drawn from the battery via the ideal
diodes even when the battery charger is enabled.
The LTC4098/LTC4098-1 contain both an internal 180mΩ
ideal diode and an ideal diode controller designed for use
with an external P-channel FET. The ideal diodes from BAT
to VOUT guarantee that ample power is always available
to VOUT even if there is insufficient or absent power at
VBUS or WALL.
The current at CLPROG is a precise fraction of the VBUS
current. When a programming resistor and an averaging
capacitor are connected from CLPROG to GND, the voltage
on CLPROG represents the average input current of the
switching regulator. As the input current approaches the
programmed limit, CLPROG reaches 1.188V and power
delivered by the switching regulator is held constant.
Several ratios of current are available which can be set
to correspond to USB low and high power modes with a
single programming resistor.
Finally, to prevent battery drain when a device is connected
to a suspended USB port, an LDO from VBUS to VOUT
The input current limit is programmed by various combinations of the D0, D1 and D2 pins as shown in Table 1.
12
40981fb
FROM USB
OR WALL
ADAPTER
3
13
2
1
CLPROG
VBUS
OVGATE
1.188V
ISWITCH /N
s2
+–
PWM AND
GATE DRIVE
AVERAGE INPUT
CURRENT LIMIT
CONTROLLER
+
–
OVERVOLTAGE PROTECTION
20
VC
3.6V
+–
0.3V
CONSTANT-CURRENT
CONSTANT-VOLTAGE
BATTERY CHARGER
VOUT
ISENSE
SW
18
4.3V
WALL
15mV
OmV
IDEAL
DIODE
+
–
Bat-Track HV CONTROL
VOUT
3.6V
BAT + 0.3V
Figure 1. Simplified Power Flow Diagram
AVERAGE OUTPUT
VOLTAGE LIMIT
CONTROLLER
6V
+
+
–
+
–
OVSENS
HVOK
VC
LT3653
+
–
+
+
–
VIN
+
–
TO AUTOMOTIVE,
FIREWIRE, ETC.
6
11
10
12
14
40981 F01
19
USB INPUT
BATTERY POWER
HV INPUT
BATSENS
BAT
IDGATE
VOUT
SW
ACPR
+
SINGLE-CELL
Li-Ion
OPTIONAL EXTERNAL
IDEAL DIODE PMOS
3.5V TO
(BAT + 0.3V)
TO SYSTEM
LOAD
LTC4098/LTC4098-1
OPERATION
40981fb
13
LTC4098/LTC4098-1
OPERATION
The switching input regulator can also be deactivated
(USB suspend).
The average input current will be limited by the CLPROG programming resistor according to the following expression:
IVBUS = IVBUSQ +
VCLPROG
• (hCLPROG + 1)
RCLPROG
where IVBUSQ is the quiescent current of the LTC4098/
LTC4098-1, VCLPROG is the CLPROG servo voltage in
current limit, RCLPROG is the value of the programming
resistor and hCLPROG is the ratio of the measured current
at VBUS to the sample current delivered to CLPROG. Refer
to the Electrical Characteristics table for values of hCLPROG,
VCLPROG and IVBUSQ. Given worst-case circuit tolerances,
the USB specification for the average input current in 1x
or 5x mode will not be violated, provided that RCLPROG is
3.01k or greater.
Table 1 shows the available settings for the D0, D1 and
D2 pins.
Notice that when D0 is high and D1 is low, the switching
regulator is set to a higher current limit for increased
charging and power availability at VOUT. These modes will
typically be used when there is line power available from
a wall adapter.
While not in current limit, the switching regulator’s
Bat-Track feature will set VOUT to approximately 300mV
above the voltage at BAT. However, if the voltage at BAT
is below 3.3V, and the load requirement does not cause
the switching regulator to exceed its current limit, VOUT
will regulate at a fixed 3.6V, as shown in Figure 2. This
instant-on operation will allow a portable product to run
immediately when power is applied without waiting for
the battery to charge.
If the load does exceed the current limit at VBUS, VOUT
will range between the no-load voltage and slighly below
the battery voltage, indicated by the shaded region of
Figure 2.
4.5
Table 1. Controlled Input Current Limit
D1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
4.2
3.9
VOUT (V)
D2
0
0
0
0
1
1
1
1
CHARGER
STATUS
IBUS(LIM)
On
100mA (1x)
On
1A (10x)
On
500mA (5x)
Off
500μA (Susp Low)
Off
100mA (1x)
Off
1A (10x)
Off
500mA (5x)
Off
2.5mA (Susp High)
NO LOAD
3.6
300mV
3.3
3.0
2.7
2.4
2.4
2.7
3.0
3.6
3.3
BAT (V)
3.9
4.2
40981 F02
Figure 2. VOUT vs BAT
40981fb
14
LTC4098/LTC4098-1
OPERATION
For very low battery voltages, the battery charger acts like
a load and, due to limited input power, its current will tend
to pull VOUT below the 3.6V instant-on voltage. To prevent
VOUT from falling below this level, an undervoltage circuit
automatically detects that VOUT is falling and reduces the
battery charge current as needed. This reduction ensures
that load current and voltage are always prioritized while
allowing as much battery charge current as possible. Refer
to Overprogramming the Battery Charger in the Applications Information section.
The voltage regulation loop compensation is controlled by
the capacitance on VOUT. An MLCC capacitor of 10μF is
required for loop stability. Additional capacitance beyond
this value will improve transient response.
An internal undervoltage lockout circuit monitors VBUS and
keeps the switching regulator off until VBUS rises above
the rising UVLO threshold (4.3V). If VBUS falls below the
falling UVLO threshold (4V), system power at VOUT will
be drawn from the battery via the ideal diodes. The voltage at VBUS must also be higher than the voltage at BAT
by approximately 170mV for the switching regulator to
operate.
Bat-Track High Voltage External Switching Regulator
Control
The WALL, ACPR and VC pins can be used in conjunction
with an external high voltage step-down switching regulator
such as the LT3653 or LT3480 to minimize heat production
when operating from higher voltage sources, as shown in
Figures 3 and 4. Bat-Track control circuitry regulates the
external switching regulator’s output voltage to the larger
of BAT + 300mV or 3.6V. This maximizes battery charger
efficiency while still allowing instant-on operation when
the battery is deeply discharged.
When using the LT3480, the feedback network should be set
to generate an output voltage between 4.5V and 5.5V. When
high voltage is applied to the external regulator, WALL will
rise toward this programmed output voltage. When WALL
exceeds approximately 4.3V, ACPR is brought low and the
Bat-Track control of the LTC4098/LTC4098-1 overdrives
the local VC control of the external high voltage step-down
switching regulator. Therefore, once the Bat-Track control
is enabled, the output voltage is set independent of the
switching regulator feedback network.
Bat-Track control provides a significant efficiency advantage
over the simple use of a 5V switching regulator output to
drive the battery charger. With a 5V output driving VOUT,
battery charger efficiency is approximately:
ηTOTAL = ηBUCK •
where ηBUCK is the efficiency of the high voltage switching
regulator and 5V is the output voltage of the switching
regulator. With a typical switching regulator efficiency of
87% and a typical battery voltage of 3.8V, the total battery
charger efficiency is approximately 66%. Assuming a 1A
charge current, nearly 2W of power is dissipated just to
charge the battery!
SW
SW
LT3480
LT3653
HVOK
ISENSE
VOUT
VC
VC
VC
WALL
ACPR
VC
LTC4098/
LTC4098-1
VBAT
5V
VOUT
SYSTEM
LOAD
40981 F03
Figure 3. LT3653 Typical Interface
FB
WALL
ACPR
LTC4098/
LTC4098-1
VOUT
SYSTEM
LOAD
40981 F04
Figure 4. LT3480 Typical Interface
40981fb
15
LTC4098/LTC4098-1
OPERATION
With Bat-Track, battery charger efficiency is approximately:
ηTOTAL = ηBUCK •
BAT
BAT + 0.3V
With the same assumptions as above, the total battery
charger efficiency is approximately 81%. This example
works out to less than 1W of power dissipation, or almost
60% less heat.
See the Typical Applications section for complete circuits
using the LT3653 and LT3480 with Bat-Track control.
Overvoltage Protection
The LTC4098/LTC4098-1 can protect itself from the inadvertent application of excessive voltage to VBUS or WALL
with just two external components: an N-channel FET and
a 6.04k resistor. The maximum safe overvoltage magnitude
will be determined by the choice of the external NMOS and
its associated drain breakdown voltage.
The overvoltage protection module consists of two pins.
The first, OVSENS, is used to measure the externally applied voltage through an external resistor. The second,
OVGATE, is an output used to drive the gate pin of an
external FET. The voltage at OVSENS will be lower than
the OVP input voltage by (IOVSENS • 6.04k) due to the
OVP circuit’s quiescent current. The OVP input will be
200mV to 400mV higher than OVSENS under normal
operating conditions. When OVSENS is below 6V, an internal charge pump will drive OVGATE to approximately
1.88 • OVSENS. This will enhance the N-channel FET and
provide a low impedance connection to VBUS or WALL
which will, in turn, power the LTC4098/LTC4098-1. If
OVSENS should rise above 6V (6.35V OVP input) due to
a fault or use of an incorrect wall adapter, OVGATE will
be pulled to GND, disabling the external FET to protect
downstream circuitry. When the voltage drops below 6V
again, the external FET will be reenabled.
In an overvoltage condition, the OVSENS pin will be
clamped at 6V. The external 6.04k resistor must be sized
appropriately to dissipate the resultant power. For example,
a 1/10W 6.04k resistor can have at most √PMAX • 6.04kΩ
= 24V applied across its terminals. With the 6V at OVSENS,
the maximum overvoltage magnitude that this resistor can
withstand is 30V. A 1/4W 6.04k resistor raises this value
to 44V. WALL’s absolute maximum current rating of 10mA
imposes an upper protection limit of 66V.
The charge pump output on OVGATE has limited output
drive capability. Care must be taken to avoid leakage on
this pin, as it may adversely affect operation.
See the Applications Information section for examples of
multiple input protection, reverse input protection, and a
table of recommended components.
Ideal Diode from BAT to VOUT
The LTC4098/LTC4098-1 have an internal ideal diode as
well as a controller for an external ideal diode. Both the
internal and the external ideal diodes are always on and
will respond quickly whenever VOUT drops below BAT.
If the load current increases beyond the power allowed
from the switching regulator, additional power will be pulled
from the battery via the ideal diodes. Furthermore, if power
to VBUS (USB or wall power) is removed, then all of the
application power will be provided by the battery via the
ideal diodes. The ideal diodes will be fast enough to keep
VOUT from drooping with only the storage capacitance
required for the switching regulator. The internal ideal
diode consists of a precision amplifier that activates a
large on-chip MOSFET transistor whenever the voltage at
VOUT is approximately 15mV (VFWD) below the voltage at
BAT. Within the amplifier’s linear range, the small-signal
resistance of the ideal diode will be quite low, keeping
the forward drop near 15mV. At higher current levels, the
40981fb
16
LTC4098/LTC4098-1
OPERATION
MOSFET will be in full conduction. If additional conductance is needed, an external P-channel MOSFET transistor
may be added from BAT to VOUT. The IDGATE pin of the
LTC4098/LTC4098-1 drives the gate of the external P-channel MOSFET transistor for automatic ideal diode control.
The source of the external P-channel MOSFET should be
connected to VOUT and the drain should be connected to
BAT. Capable of driving a 1nF load, the IDGATE pin can
control an external P-channel MOSFET transistor having
an on-resistance of 30mΩ or lower. Figure 5 shows the
decreased forward voltage compared to a conventional
Schottky diode.
Suspend LDO
The LTC4098/LTC4098-1 provide a small amount of power
to VOUT in suspend mode by including an LDO from VBUS to
VOUT. This LDO will prevent the battery from running down
when the portable product has access to a suspended USB
port. Regulating at 4.6V, this LDO only becomes active when
the switching converter is disabled. In accordance with the
USB specification, the input to the LDO is current limited so
2200
VISHAY Si2333
EXTERNAL
IDEAL DIODE
2000
1800
CURRENT (mA)
1600
1400
LTC4098/
LTC4098-1
IDEAL DIODE
1200
1000
800
600
ON
SEMICONDUCTOR
MBRM120LT3
400
200
0
0
60 120 180 240 300 360 420 480
FORWARD VOLTAGE (mV) (BAT – VOUT)
40981 F05
that it will not exceed the low power or high power suspend
specification. If the load on VOUT exceeds the suspend current limit, the additional current will come from the battery
via the ideal diodes. The suspend LDO sends a scaled copy
of the VBUS current to the CLPROG pin, which will servo to
approximately 100mV in this mode. Thus, the high power
and low power suspend settings are related to the levels
programmed by the same resistor for 1x and 5x modes.
Battery Charger
The LTC4098/LTC4098-1 include a constant-current/constant-voltage battery charger with automatic recharge,
automatic termination by safety timer, low voltage trickle
charging, bad cell detection and thermistor sensor input
for out-of-temperature charge pausing.
When a battery charge cycle begins, the battery charger
first determines if the battery is deeply discharged. If the
battery voltage is below VTRKL, typically 2.85V, an automatic
trickle charge feature sets the battery charge current to
10% of the programmed value. If the low voltage persists
for more than 1/2 hour, the battery charger automatically
terminates and indicates, via the CHRG pin, that the battery was unresponsive.
Once the battery voltage is above VTRKL, the charger begins
charging in full power constant-current mode. The current
delivered to the battery will try to reach 1030V/RPROG.
Depending on available input power and external load
conditions, the battery charger may or may not be able to
charge at the full programmed rate. The external load will
always be prioritized over the battery charge current. The
USB current limit programming will always be observed
and only additional power will be available to charge the
battery. When system loads are light, battery charge current will be maximized.
Figure 5. Ideal Diode V-I Characteristics
40981fb
17
LTC4098/LTC4098-1
OPERATION
Charge Termination
The battery charger has a built-in safety timer. Once the
voltage on the battery reaches the preprogrammed float
voltage of 4.200V for the LTC4098 or 4.100V for the
LTC4098-1, the charger will regulate the battery voltage
there and the charge current will decrease naturally. Once
the charger detects that the battery has reached 4.200V
or 4.100V respectively, the 4-hour safety timer is started.
After the safety timer expires, charging of the battery will
discontinue and no more current will be delivered.
Automatic Recharge
Once the battery charger terminates, it will remain off
drawing only microamperes of current from the battery.
If the portable product remains in this state long enough,
the battery will eventually self discharge. To ensure that
the battery is always topped off, a charge cycle will automatically begin when the battery voltage falls below
VRECHRG (typically 4.1V for the LTC4098 and 4.0V for the
LTC4098-1). In the event that the safety timer is running
when the battery voltage falls below VRECHRG, it will reset
back to zero. To prevent brief excursions below VRECHRG
from resetting the safety timer, the battery voltage must
be below VRECHRG for more than 1.5ms. The charge
cycle and safety timer will also restart if the VBUS UVLO
cycles low and then high (e.g., VBUS is removed and then
replaced) or if the charger is momentarily disabled using
the D2 pin.
Charge Current
The charge current is programmed using a single resistor
from PROG to ground. 1/1030th of the battery charge current is delivered to PROG, which will attempt to servo to
1.000V. Thus, the battery charge current will try to reach
1030 times the current in the PROG pin. The program
resistor and the charge current are calculated using the
following equations:
RPROG =
1030 V
1030 V
, ICHG =
ICHG
RPROG
In either the constant-current or constant-voltage charging
modes, the voltage at the PROG pin will be proportional
to the actual charge current delivered to the battery. The
charge current can be determined at any time by monitoring
the PROG pin voltage and using the following equation:
IBAT =
VPROG
• 1030
RPROG
In many cases, the actual battery charge current, IBAT, will
be lower than the programmed current, ICHG, due to limited
input power available and prioritization to the system load
drawn from VOUT.
Charge Status Indication
The CHRG pin indicates the status of the battery charger.
Four possible states are represented by CHRG which include
charging, not charging (or float charge current less than
programmed end of charge indication current), unresponsive battery and battery temperature out of range.
The signal at the CHRG pin can be easily recognized as
one of the above four states by either a human or a microprocessor. An open-drain output, the CHRG pin can
drive an indicator LED through a current limiting resistor
for human interfacing or simply a pull-up resistor for
microprocessor interfacing.
40981fb
18
LTC4098/LTC4098-1
OPERATION
To make the CHRG pin easily recognized by both humans
and microprocessors, the pin is either a DC signal of ON
for charging, OFF for not charging or it is switched at high
frequency (35kHz) to indicate the two possible faults. While
switching at 35kHz, its duty cycle is modulated at a slow
rate that can be recognized by a human.
When charging begins, CHRG is pulled low and remains
low for the duration of a normal charge cycle. When charge
current drops to 1/10th the value programmed by RPROG,
the CHRG pin is released (Hi-Z). The CHRG pin does not
respond to the C/10 threshold if the LTC4098/LTC4098-1
are in VBUS current limit. This prevents false end-of-charge
indications due to insufficient power available to the battery
charger. If a fault occurs while charging, the pin is switched
at 35kHz. While switching, its duty cycle is modulated
between a high and low value at a very low frequency. The
low and high duty cycles are disparate enough to make
an LED appear to be on or off thus giving the appearance
of “blinking”. Each of the two faults has its own unique
“blink” rate for human recognition as well as two unique
duty cycles for machine recognition.
Table 2 illustrates the four possible states of the CHRG
pin when the battery charger is active.
Table 2. CHRG Signal
STATUS
FREQUENCY
MODULATION
(BLINK) FREQUENCY
DUTY
CYCLES
Charging
0Hz
0Hz (Low Z)
100%
IBAT < C/10
0Hz
0Hz (Hi-Z)
0%
NTC Fault
35kHz
1.5Hz at 50%
6.25% or 93.75%
Bad Battery
35kHz
6.1Hz at 50%
12.5% or 87.5%
Notice that an NTC fault is represented by a 35kHz pulse
train whose duty cycle toggles between 6.25% and 93.75%
at a 1.5Hz rate. A human will easily recognize the 1.5Hz
rate as a “slow” blinking which indicates the out of range
battery temperature while a microprocessor will be able
to decode either the 6.25% or 93.75% duty cycles as an
NTC fault.
If a battery is found to be unresponsive to charging (i.e.,
its voltage remains below 2.85V for 1/2 hour), the CHRG
pin gives the battery fault indication. For this fault, a human
would easily recognize the frantic 6.1Hz “fast” blink of the
LED while a microprocessor would be able to decode either
the 12.5% or 87.5% duty cycles as a bad cell fault.
Because the LTC4098/LTC4098-1 are 3-terminal PowerPath
products, system load is always prioritized over battery
charging. Due to excessive system load, there may not be
sufficient power to charge the battery beyond the bad-cell
threshold voltage within the bad-cell timeout period. In
this case the battery charger will falsely indicate a bad cell.
System software may then reduce the load and reset the
battery charger to try again.
Although very improbable, it is possible that a duty cycle
reading could be taken at the bright-dim transition (low
duty cycle to high duty cycle). When this happens the
duty cycle reading will be precisely 50%. If the duty cycle
reading is 50%, system software should disqualify it and
take a new duty cycle reading.
40981fb
19
LTC4098/LTC4098-1
OPERATION
NTC Thermistor
Thermal Regulation
The battery temperature is measured by placing a negative temperature coefficient (NTC) thermistor close to
the battery pack. The NTC circuitry is shown in the Block
Diagram.
To prevent thermal damage to the LTC4098/LTC4098-1 or
surrounding components, an internal thermal feedback
loop will automatically decrease the programmed charge
current if the die temperature rises to approximately 110°C.
Thermal regulation protects the LTC4098/LTC4098-1 from
excessive temperature due to high power operation or
high ambient thermal conditions, and allows the user to
push the limits of the power handling capability with a
given circuit board design without risk of damaging the
LTC4098/LTC4098-1 or external components. The benefit
of the LTC4098/LTC4098-1 thermal regulation loop is that
charge current can be set according to actual conditions
rather than worst-case conditions for a given application
with the assurance that the charger will automatically
reduce the current in worst-case conditions.
To use this feature, connect the NTC thermistor, RNTC,
between the NTC pin and ground and a bias resistor, RNOM,
from NTCBIAS to NTC. RNOM should be a 1% resistor with
a value equal to the value of the chosen NTC thermistor
at 25°C (R25).
The LTC4098/LTC4098-1 will pause charging when the
resistance of the NTC thermistor drops to 0.54 times the
value of R25 or approximately 54k (for a Vishay curve 1
thermistor, this corresponds to approximately 40°C). If
the battery charger is in constant-voltage (float) mode,
the safety timer also pauses until the thermistor indicates
a return to a valid temperature. As the temperature drops,
the resistance of the NTC thermistor rises. The LTC4098/
LTC4098-1 are also designed to pause charging when
the value of the NTC thermistor increases to 3.25 times
the value of R25. For a Vishay curve 1 thermistor, this
resistance, 325k, corresponds to approximately 0°C. The
hot and cold comparators each have approximately 3°C
of hysteresis to prevent oscillation about the trip point.
Grounding the NTC pin disables all NTC functionality.
Figure 6 is a flow chart representation of the battery charger
algorithm employed by the LTC4098/LTC4098-1.
Shutdown Mode
The USB switching regulator is enabled whenever VBUS
is above the UVLO voltage and the LTC4098/LTC4098-1
are not in one of the two USB suspend modes (500μA or
2.5mA). When power is available from both the USB and
high voltage inputs, the high voltage regulator is prioritized
and the USB switching regulator is disabled.
The ideal diode is enabled at all times and cannot be
disabled.
40981fb
20
LTC4098/LTC4098-1
OPERATION
POWER ON/
ENABLE CHARGER
CLEAR EVENT TIMER
ASSERT CHRG LOW
NTC OUT OF RANGE
YES
INHIBIT CHARGING
NO
PAUSE EVENT TIMER
BAT < 2.85V
BATTERY STATE
BAT > VFLOAT – E
2.85V < BAT < VFLOAT – E
CHARGE AT
100V/RPROG (C/10 RATE)
CHRG CURRENTLY
Hi-Z
CHARGE WITH
FIXED VOLTAGE
(VFLOAT)
CHARGE AT
1030V/RPROG RATE
YES
NO
RUN EVENT TIMER
NO
INDICATE
NTC FAULT
AT CHRG
RUN EVENT TIMER
PAUSE EVENT TIMER
TIMER > 30 MINUTES
TIMER > 4 HOURS
YES
NO
YES
INHIBIT CHARGING
STOP CHARGING
IBAT < C/10
NO
YES
BAT RISING
THROUGH
VRECHRG
INDICATE BATTERY
FAULT AT CHRG
YES
CHRG HIGH-Z
CHRG Hi-Z
NO
NO
BAT > 2.85V
YES
BAT FALLING
THROUGH
VRECHRG
NO
YES
NO
BAT < VRECHRG
YES
40981 F06
Figure 6. Battery Charger State Diagram
40981fb
21
LTC4098/LTC4098-1
APPLICATIONS INFORMATION
CLPROG Resistor and Capacitor
VBUS and VOUT Bypass Capacitors
As described in the Bat-Track Input Current Limited Step
Down Switching Regulator section, the resistor on the
CLPROG pin determines the average input current limit
in each of the six current limit modes. The input current will be comprised of two components, the current
that is used to drive VOUT and the quiescent current of
the switching regulator. To ensure that the total average
input current remains below the USB specification, both
components of input current should be considered. The
Electrical Characteristics table gives the typical values for
quiescent currents in all settings as well as current limit
programming accuracy. To get as close to the 500mA or
100mA specifications as possible, a precision resistor
should be used.
The style and value of capacitors used with the LTC4098/
LTC4098-1 determine several important parameters such
as regulator control loop stability and input voltage
ripple. Because the LTC4098/LTC4098-1 use a step-down
switching power supply from VBUS to VOUT, its input
current waveform contains high frequency components.
It is strongly recommended that a low equivalent series
resistance (ESR) multilayer ceramic capacitor be used
to bypass VBUS. Tantalum and aluminum capacitors are
not recommended because of their high ESR. The value
of the capacitor on VBUS directly controls the amount
of input ripple for a given load current. Increasing the
size of this capacitor will reduce the input ripple. The
USB specification allows a maximum of 10μF to be connected directly across the USB power bus. If additional
capacitance is required for noise performance, it may be
connected directly to the VBUS pin when using the OVP
feature of the LTC4098/LTC4098-1. This extra capacitance
will be soft-connected over several milliseconds to limit
inrush current and avoid excessive transient voltage
drops on the bus.
An averaging capacitor is required in parallel with the
resistor so that the switching regulator can determine
the average input current. This capacitor also provides
the dominant pole for the feedback loop when current
limit is reached. To ensure stability, the capacitor on
CLPROG should be 0.1μF or larger.
Choosing the Inductor
To prevent large VOUT voltage steps during transient
load conditions, it is also recommended that a ceramic
capacitor be used to bypass VOUT. The output capacitor
is used in the compensation of the switching regulator. At
least 10μF with low ESR are required on VOUT. Additional
capacitance will improve load transient performance
and stability.
Because the input voltage range and output voltage range
of the PowerPath switching regulator are both fairly narrow, the LTC4098/LTC4098-1 were designed for a specific
inductance value of 3.3μH. Some inductors which may be
suitable for this application are listed in Table 3.
Table 3. Recommended Inductors for the LTC4098/LTC4098-1
INDUCTOR TYPE
L
(μH)
MAX IDC MAX DCR
(A)
(Ω)
SIZE IN mm
(L × W × H)
LPS4018
3.3
2.2
0.08
3.9 × 3.9 × 1.7
Coilcraft
www.coilcraft.com
D53LC
DB318C
3.3
3.3
2.26
1.55
0.034
0.070
5×5×3
3.8 × 3.8 × 1.8
Toko
www.toko.com
WE-TPC Type M1
3.3
1.95
0.065
4.8 × 4.8 × 1.8
Würth Elektronik
www.we-online.com
CDRH6D12
CDRH6D38
3.3
3.3
2.2
3.5
0.0625
0.020
6.7 × 6.7 × 1.5
7×7×4
Sumida
www.sumida.com
MANUFACTURER
40981fb
22
LTC4098/LTC4098-1
APPLICATIONS INFORMATION
Multilayer ceramic chip capacitors typically have exceptional ESR performance. MLCCs combined with a tight
board layout and an unbroken ground plane will yield very
good performance and low EMI emissions.
There are several types of ceramic capacitors available each having considerably different characteristics.
For example, X7R ceramic capacitors have the best voltage
and temperature stability. X5R ceramic capacitors have
apparently higher packing density but poorer performance
over their rated voltage and temperature ranges. Y5V
ceramic capacitors have the highest packing density,
but must be used with caution, because of their extreme
nonlinear characteristic of capacitance versus voltage. The
actual in-circuit capacitance of a ceramic capacitor should
be measured with a small AC signal and DC bias as is
expected in-circuit. Many vendors specify the capacitance
versus voltage with a 1VRMS AC test signal and, as a result,
over state the capacitance that the capacitor will present
in the application. Using similar operating conditions as
the application, the user must measure or request from
the vendor the actual capacitance to determine if the
selected capacitor meets the minimum capacitance that
the application requires.
Overprogramming the Battery Charger
The USB high power specification allows for up to 2.5W
to be drawn from the USB port. The switching regulator
transforms the voltage at VBUS to just above the voltage
at BAT with high efficiency, while limiting power to less
than the amount programmed at CLPROG. The charger
should be programmed (with the PROG pin) to deliver the
maximum safe charging current without regard to the USB
specifications. If there is insufficient current available to
charge the battery at the programmed rate, it will reduce
charge current until the system load on VOUT is satisfied
and the VBUS current limit is satisfied. Programming the
charger for more current than is available will not cause
the average input current limit to be violated. It will merely
allow the battery charger to make use of all available
power to charge the battery as quickly as possible, and
with minimal power dissipation within the charger.
Overvoltage Protection
It is possible to protect both VBUS and WALL from
overvoltage damage with several additional components,
as shown in Figure 7. Schottky diodes D1 and D2 pass the
larger of V1 and V2 to R1 and OVSENS. If either V1 or V2
MN1
V1
WALL
V2
OVGATE
LTC4098/
LTC4098-1
VBUS
D2
D1
MN2
C1
R1
OVSENS
40981 F07
Figure 7. Dual Input Overvoltage Protection
40981fb
23
LTC4098/LTC4098-1
APPLICATIONS INFORMATION
exceeds 6V plus VF(SCHOTTKY), OVGATE will be pulled to
GND and both the WALL and USB inputs will be protected.
Each input is protected up to the drain-source breakdown,
BVDSS, of MN1 and MN2. R1 must also be rated for the
power dissipated during maximum overvoltage. See the
Operations section for an explanation of this calculation.
Table 4 shows some N-channel MOSFETs that may be
suitable for overvoltage protection.
USB/WALL
ADAPTER
MP1
MN1
VBUS
D1
C1
LTC4098/
LTC4098-1
R1
R2
OVGATE
OVSENS
VBUS POSITIVE PROTECTION UP TO BVDSS OF MN1
VBUS NEGATIVE PROTECTION UP TO BVDSS OF MP1
40981 F08
Figure 8. Dual-Polarity Voltage Protection
Table 4. Recommended OVP FETs
N-CHANNEL
MOSFET
BVDSS
RON
PACKAGE
Si2302ADS
20V
70mΩ
SOT-23
IRLML2502
20V
35mΩ
SOT-23
Si1472DH
30V
65mΩ
SC70-6
NTLJS4114N
30V
20mΩ
2mm × 2mm DFN
FDN372S
30V
45mΩ
SOT-23
Reverse Voltage Protection
The LTC4098/LTC4098-1 can also be easily protected
against the application of reverse voltage, as shown in
Figure 8. D1 and R1 are necessary to limit the maximum
VGS seen by MP1 during positive overvoltage events.
D1’s breakdown voltage must be safely below MP1’s
BVGS. The circuit shown in Figure 8 offers forward voltage protection up to MN1’s BVDSS and reverse voltage
protection up to MP1’s BVDSS.
Alternate NTC Thermistors and Biasing
The LTC4098/LTC4098-1 provide temperature-qualified
charging if a grounded thermistor and a bias resistor are
connected to NTC and NTCBIAS. By using a bias resistor
whose value is equal to the room temperature resistance
of the thermistor (R25) the upper and lower temperatures
are preprogrammed to approximately 40°C and 0°C, respectively (assuming a Vishay curve 1 thermistor).
The upper and lower temperature thresholds can be adjusted by either a modification of the bias resistor value
or by adding a second adjustment resistor to the circuit.
If only the bias resistor is adjusted, then either the upper
or the lower threshold can be modified but not both. The
other trip point will be determined by the characteristics
of the thermistor. Using the bias resistor in addition to an
40981fb
24
LTC4098/LTC4098-1
APPLICATIONS INFORMATION
adjustment resistor, both the upper and the lower temperature trip points can be independently programmed with
the constraint that the difference between the upper and
lower temperature thresholds cannot decrease. Examples
of each technique are given below.
NTC thermistors have temperature characteristics which
are indicated on-resistance temperature conversion tables.
The Vishay-Dale thermistor NTHS0603N011-N1003F, used
in the following examples, has a nominal value of 100k
and follows the Vishay curve 1 resistance-temperature
characteristic.
In the explanation below, the following notation is used.
R25 = Value of the thermistor at 25°C
RNTC|COLD = Value of thermistor at the cold trip point
RNTC|HOT = Value of thermistor at the hot trip point
rCOLD = Ratio of RNTC|COLD to R25
NTCBIAS
0.765 • NTCBIAS
R1 = Optional temperature range adjustment resistor
(see Figure 9b)
The trip points for the LTC4098/LTC4098-1’s temperature
qualification are internally programmed at 0.349 • NTCBIAS
for the hot threshold and 0.765 • NTCBIAS for the cold
threshold.
Therefore, the hot trip point is set when:
RNTCHOT
|
RNOM + RNTCHOT
|
and the cold trip point is set when:
RNTC|COLD
RNOM + RNTC|COLD
LTC4098/LTC4098-1
NTC BLOCK
0.765 • NTCBIAS
RNOM
105k
TOO_COLD
+
5
R1
12.7k
–
–
NTC
+
RNTC
100k
• NTCBIAS = 0.765 • NTCBIAS
4
TOO_COLD
5
• NTCBIAS = 0.349 • NTCBIAS
NTCBIAS
–
NTC
T
RNOM = Primary thermistor bias resistor (see Figure 9a)
LTC4098/LTC4098-1
NTC BLOCK
4
RNOM
100k
rHOT = Ratio of RNTC|HOT to R25
–
TOO_HOT
TOO_HOT
0.349 • NTCBIAS
0.349 • NTCBIAS
+
T
RNTC
100k
+
+
+
NTC_ENABLE
NTC_ENABLE
0.1V
–
0.1V
–
40981 F09b
40981 F09a
(9a)
(9b)
Figure 9. NTC Circuits
40981fb
25
LTC4098/LTC4098-1
APPLICATIONS INFORMATION
Solving these equations for RNTC|COLD and RNTC|HOT
results in the following:
RNTC|HOT = 0.536 • RNOM
and
RNTC|COLD = 3.25 • RNOM
By setting RNOM equal to R25, the previous equations
result in rHOT = 0.536 and rCOLD = 3.25. Referencing these
ratios to the Vishay Resistance-Temperature Curve 1 chart
gives a hot trip point of about 40°C and a cold trip point
of about 0°C. The difference between the hot and cold trip
points is approximately 40°C.
By using a bias resistor, RNOM, different in value from
R25, the hot and cold trip points can be moved in either
direction. The temperature span will change somewhat due
to the nonlinear behavior of the thermistor. The following
equations can be used to easily calculate a new value for
the bias resistor:
RNOM =
rHOT
• R25
0.536
RNOM =
rCOLD
• R25
3.25
where rHOT and rCOLD are the resistance ratios at the
desired hot and cold trip points. Note that these equations
are linked. Therefore, only one of the two trip points can
be chosen, the other is determined by the default ratios
designed in the IC. Consider an example where a 60°C
hot trip point is desired.
From the Vishay curve 1 R-T characteristics, rHOT is 0.2488
at 60°C. Using the previous equation, RNOM should be set
to 46.4k. With this value of RNOM, the cold trip point is
about 16°C. Notice that the span is now 44°C rather than
the previous 40°C. This is due to the decrease in temperature gain of the thermistor as absolute temperature
increases.
The upper and lower temperature trip points can be independently programmed by using an additional bias resistor
as shown in Figure 9b. The following formulas can be used
to compute the values of RNOM and R1:
r
–r
RNOM = COLD HOT • R25
2.714
R1 = 0.536 • RNOM – rHOT • R25
For example, to set the trip points to 0°C and 45°C with
a Vishay Curve 1 thermistor choose:
RNOM =
3.266 – 0.4368
• 100k = 104.2k
2.714
the nearest 1% value is 105k:
R1 = 0.536 • 105k – 0.4368 • 100k = 12.6k
the nearest 1% value is 12.7k. The final circuit is shown
in Figure 9b and results in an upper trip point of 45°C and
a lower trip point of 0°C.
40981fb
26
LTC4098/LTC4098-1
APPLICATIONS INFORMATION
USB Inrush Limiting
The USB specification allows at most 10μF of downstream
capacitance to be hot-plugged into a USB hub. In most
LTC4098/LTC4098-1 applications, 10μF should be enough
to provide adequate filtering on VBUS.
If more capacitance is required, the OVP circuit will provide
adequate soft-connect time to prevent excessive inrush
currents. An additional 22μF on the VBUS pin will generally contribute less than 100mA to the hot-plug inrush
current.
Voltage overshoot on VBUS may sometimes be observed
when connecting the LTC4098/LTC4098-1 to a lab power
supply. This overshoot is caused by long leads from the
power supply to VBUS. Twisting the wires together from
the supply to VBUS can greatly reduce the parasitic inductance of these long leads, and keep the voltage at VBUS to
safe levels. USB cables are generally manufactured with
the power leads in close proximity, and thus fairly low
parasitic inductance.
Board Layout Considerations
The Exposed Pad on the backside of the LTC4098/
LTC4098-1 package must be securely soldered to the PC
board ground. This is the primary ground pin in the package, and it serves as the return path for both the control
circuitry and the synchronous rectifier.
Furthermore, due to its high frequency switching circuitry,
it is imperative that the input capacitor, inductor, and
output capacitor be as close to the LTC4098/LTC4098-1
as possible and that there be an unbroken ground plane
under the LTC4098/LTC4098-1 and all of its external high
frequency components. High frequency currents, such as
the input current on the LTC4098/LTC4098-1, tend to find
their way on the ground plane along a mirror path directly
beneath the incident path on the top of the board. If there
are slits or cuts in the ground plane due to other traces
on that layer, the current will be forced to go around the
slits. If high frequency currents are not allowed to flow
back through their natural least-area path, excessive
voltage will build up and radiated emissions will occur
(see Figure 10). There should be a group of vias directly
under the grounded backside leading directly down to an
internal ground plane. To minimize parasitic inductance,
the ground plane should be as close as possible to the
top plane of the PC board (layer 2).
The IDGATE pin for the external ideal diode controller has
extremely limited drive current. Care must be taken to
minimize leakage to adjacent PC board traces. 100nA of
leakage from this pin will introduce an additional offset to
the ideal diode of approximately 10mV. To minimize leakage,
the trace can be guarded on the PC board by surrounding
it with VOUT connected metal, which should generally be
less than one volt higher than IDGATE.
40981 F10
Figure 10. Ground Currents Follow Their Incident Path
at High Speed. Slices in the Ground Plane Cause High
Voltage and Increased Emissions
40981fb
27
LTC4098/LTC4098-1
APPLICATIONS INFORMATION
Battery Charger Stability Considerations
The LTC4098/LTC4098-1’s battery charger contains both a
constant-voltage and a constant-current control loop. The
constant-voltage loop is stable without any compensation
when a battery is connected with low impedance leads.
Excessive lead length, however, may add enough series
inductance to require a bypass capacitor of at least 1μF
from BAT to GND.
High value, low ESR multilayer ceramic chip capacitors
reduce the constant-voltage loop phase margin, possibly
resulting in instability. Ceramic capacitors up to 22μF may
be used in parallel with a battery, but larger ceramics should
be decoupled with 0.2Ω to 1Ω of series resistance.
Furthermore, a 100μF MLCC in series with a 0.3Ω resistor
or a 100μF OS-CON capacitor from BAT to GND is required
to prevent oscillation when the battery is disconnected.
In constant-current mode, the PROG pin is in the feedback loop rather than the battery voltage. Because of the
additional pole created by any PROG pin capacitance,
capacitance on this pin must be kept to a minimum. With
no additional capacitance on the PROG pin, the charger
is stable with program resistor values as high as 25k.
However, additional capacitance on this node reduces the
maximum allowed program resistor. The pole frequency at
the PROG pin should be kept above 100kHz. Therefore, if
the PROG pin has a parasitic capacitance, CPROG, the following equation should be used to calculate the maximum
resistance value for RPROG:
RPROG ≤
1
2π • 100kHz • CPROG
40981fb
28
LTC4098/LTC4098-1
TYPICAL APPLICATIONS
High Efficiency USB/2A Automotive Battery Charger with Overvoltage
Protection and Low Battery Start-Up
C6
0.47μF
2
4
AUTOMOTIVE,
FIREWIRE, ETC.
R10
40.2k
BOOST
VIN
R11
150k
5
C1
C7
4.7μF 68nF
3
SW
LT3480
RUN/SS
10
PG
RT
VC
7
R9
R8
499k 100k
D3
GND
8
FB
SYNC
BD
11
9
L2
10μH
1
C4
22μF
6
M1
L1
3.3μH
20
M3
USB
13
R3
6.04k
TO μC
VBUS
C2
10μF
0805 2
1
3
15-17
R4
100k
ACPR SW
OVGATE
VOUT
OVSENS
IDGATE
LTC4098/LTC4098-1
12
10
M2
11
BAT
C5
10μF
0805
NTCBIAS
5
NTC
PROG GND BATSENS
CLPROG
T
SYSTEM
LOAD
14
CHRG
4
M1, M2: VISHAY-SILICONIX Si2333DS
M3: ON SEMICONDUCTOR NTLJS4114N
R5: VISHAY-DALE NTHS0603N011-N1003F
19
VC WALL
D0-D2
8
TO μC
18
R5
100k
C3
0.1μF
0603
3
R6
3.01k
7
R7
1k
9, 21
6
Li-Ion
+
40981 TA02
USB/Wall Adapter Battery Charger with Dual Overvoltage Protection,
Reverse-Voltage Protection and Low Battery Start-Up
M1
M3
5V WALL ADAPTER
C1
10μF
0805
D3
R1
M5
R2
L1
3.3μH
D4
2
13
USB
M2
C2
10μF
0805
M4
D1
D2
TO μC
R3
6.04k
OVGATE
3
15-17
8
4
R4
100k
5
D0-D2
R5
100k
SYSTEM
LOAD
14
ACPR SW
OVSENSE
IDGATE
LTC4098/LTC4098-1
BAT
12
10
M6
11
CHRG
C4
10μF
0805
NTCBIAS
NTC
CLPROG
T
WALL
19
VOUT
1
TO μC
M1, M2, M5, M6: VISHAY-SILICONIX Si2333DS
M3, M4: FAIRCHILD SEMI FDN372S
R5: VISHAY-DALE NTHS0603N011-N1003F
D1, D2: NXP BAT54C
D3, D4: ON SEMICONDUCTOR MNBZ5232BLT1G
VBUS
18
C3
0.1μF
0603
3
R6
3.01k
PROG GND BATSENS
7
R7
1k
9, 21
6
Li-Ion
+
40981 TA03
40981fb
29
LTC4098/LTC4098-1
TYPICAL APPLICATIONS
USB/Automotive Switching Battery Charger with
Automatic Current Limiting on Both Inputs
7
1
AUTOMOTIVE,
FIREWIRE, ETC.
C1
4.7μF
VIN
R1
27.4k
ILIM
6
GND
VC
13
C3
10μF
0805 2
R6
6.04k
TO μC
1
3
15-17
8
TO μC
4
M1: ON SEMICONDUCTOR NTLJS4114N
R3: VISHAY-DALE NTHS0603N011-N1003F
3
R2
100k
5
VBUS
2
L2
3.3μH
18
19
14
OVGATE
VOUT
OVSENS
IDGATE
D0-D2
C5
10μF
0805
WALL ACPR SW
VC
BAT
LTC4098/LTC4098-1
12
10
11
SYSTEM
LOAD
CHRG
NTCBIAS
NTC
CLPROG
R3
T
100k
ISENSE
5
VOUT
HVOK
20
M1
L1
4.7μH
D1
LT3653
9
USB
WALL ADAPTER
8
SW
4
C2
0.1μF
10V
BOOST
C4
0.1μF
0603
PROG GND BATSENS
3
R4
3.01k
7
R5
1k
9, 21
6
+
Li-Ion
40981 TA04
Low Component Count USB and Automotive High Efficiency Power Manager
7
1
AUTOMOTIVE,
FIREWIRE, ETC.
C1
4.7μF
VIN
SW
4
R1
27.4k
ILIM
C3
10μF
0805
2
1
TO μC
TO μC
3
15-17
8
4
5
L1
4.7μH
D1
6
GND
13
8
LT3653
VC
9
USB
WALL ADAPTER
C2
0.1μF
10V
BOOST
VBUS
ISENSE
5
VOUT
HVOK
3
2
20
18
L2
3.3μH
19
WALL ACPR SW
VC
OVGATE
VOUT
OVSENS
IDGATE
BAT
D0-D2
SYSTEM
LOAD
14
12
10
11
LTC4098/LTC4098-1
CHRG
NTCBIAS
NTC CLPROG
C4
0.1μF
0603
3
R2
3.01k
PROG
7
R3
1k
C5
10μF
0805
GND BATSENS
9, 21
6
+
Li-Ion
40981 TA05
40981fb
30
LTC4098/LTC4098-1
PACKAGE DESCRIPTION
PDC Package
20-Lead Plastic UTQFN (3mm × 4mm)
(Reference LTC DWG # 05-08-1752 Rev Ø)
0.70 p0.05
3.50 p 0.05
2.10 p 0.05
1.50 REF
2.65 p 0.05
1.65 p 0.05
PACKAGE
OUTLINE
0.25 p0.05
0.50 BSC
2.50 REF
3.10 p 0.05
4.50 p 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.55 p 0.05
3.00 p 0.10
1.50 REF
19
R = 0.05 TYP
PIN 1 NOTCH
R = 0.20 OR 0.25
s 45o CHAMFER
20
0.40 p 0.10
1
PIN 1
TOP MARK
(NOTE 6)
2
2.65 p 0.10
4.00 p 0.10
2.50 REF
1.65 p 0.10
(PDC20) UTQFN 0407 REV Ø
0.127 REF
0.00 – 0.05
R = 0.115
TYP
0.25 p 0.05
0.50 BSC
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
40981fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
31
LTC4098/LTC4098-1
TYPICAL APPLICATION
High Efficiency USB Automotive Battery Charger
with Overvoltage Protection and Low Battery Start-Up
1
AUTOMOTIVE,
FIREWIRE, ETC.
C1
4.7μF
50V
VIN
BOOST
SW
4
R2
27.4k
GND
USB
13
C3
10μF
0805 2
R4
6.04k
TO μC
1
3
15-17
8
TO μC
4
M1: VISHAY-SILICONIX Si2333DS
M2: ON SEMICONDUCTOR NTLJS4114N
R6: VISHAY-DALE NTHS0603N011-N1003F
R5
100k
5
R6
T
100k
C2
0.1μF, 10V
LT3653
ILIM
VC
9
M2
7
8
VBUS
D2
6
ISENSE
5
VOUT
HVOK
3
2
20
18
19
L2
3.3μH
SYSTEM
LOAD
14
WALL ACPR SW
VC
OVGATE
VOUT
OVSENS
IDGATE
D0-D2
L1
4.7μH
LTC4098/LTC4098-1
BAT
12
10
M1
11
CHRG
C5
10μF
0805
NTCBIAS
NTC CLPROG
C4
0.1μF
0603
3
R7
3.01k
PROG
7
R8
1k
GND BATSENS
9, 21
6
+
Li-Ion
40981 TA06
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC3555/
LTC3555-1/
LTC3555-3
Switching USB Power Manager
with Li-Ion/Polymer Charger, Triple
Synchronous Buck Converter Plus
LDO
Complete Multifunction PMIC: Switchmode Power Manager and Three Buck Regulators
Plus LDO Charge Current Programmable Up to 1.5A from Wall Adapter Input, Synchronous
Buck Converters Efficiency >95%, ADJ Outputs: 0.8V to 3.6V at 400mA/400mA/1A Bat-Track
Adaptive Output Control, 200mΩ Ideal Diode, 4mm × 5mm QFN-28 Package
LTC3576/
LTC3576-1
Switching Power Manager
with USB On-The-Go Plus
Triple Step-Down DC/DCs
Complete Multifunction PMIC: Bidirectional Switching Power Manager Plus Three Buck
Regulators Plus LDO, ADJ Output Down to 0.8V at 400mA/400mA/1A, Overvoltage Protection,
USB On-The-Go, Charge Current Programmable Up to 1.5A from Wall Adapter Input, Thermal
Regulation, I2C, High Voltage Bat-Track Buck Interface, 180mΩ Ideal Diode; 4mm × 6mm
QFN-38 Package
LTC4088
High Efficiency USB Power Manager
and Battery Charger
Maximizes Available Power from USB Port, Bat-Track, Instant-On Operation, 1.5A Max Charge
Current, 180mΩ Ideal Diode with <50mΩ Option, 3.3V/25mA Always-On LDO, 4mm × 3mm
DFN14 Package
LTC4089/
LTC4089-5/
LTC4089-1
USB Power Manager with Ideal Diode
Controller and High Efficiency Li-Ion
Battery Charger
High Efficiency 1.2A Charger from 6V to 36V (40V Max) Input. Charges Single-Cell
Li-Ion/Polymer Batteries Directly from a USB Port, Thermal Regulation, 200mΩ Ideal Diode
with <50mΩ Option, 6mm × 3mm DFN22 Package. Bat-Track Adaptive Output Control
(LTC4089), Fixed 5V Output (LTC4089-5), 4.1V Float Voltage (LTC4089-1)
LTC4090/
LTC4090-5
High Voltage USB Power Manager
with Ideal Diode Controller and High
Efficiency Li-Ion Battery Charger
High Efficiency 1.2A Charger from 6V to 38V (60V Max) Input. Charges Single-Cell Li-Ion/
Polymer Batteries Directly from a USB Port, Thermal Regulation, 200mΩ Ideal Diode with
<50mΩ Option, 6mm × 3mm DFN22 Package. Bat-Track Adaptive Output Control
LTC4099
I2C Controlled USB Switch Mode
Power Manager with OVP
High VIN: 38V Operating, 60V Transient; 66V OVP. I2C for Control and Status Readback,
Overtemperature Battery Conditioner for Added Battery Safety Margin, Maximizes Available
Power from USB Port, Bat-Track, Instant-On Operation, 1.5A Maximum Charge Current from
Wall, 600mA Charge Current from USB, 180mΩ Ideal Diode with <50mΩ Option; 3mm ×
4mm Ultra-Thin UTQFN-20 Package
LTC4413
Dual Ideal Diodes
3mm × 3mm DFN Package, Low Loss Replacement for ORing Diodes
40981fb
32
Linear Technology Corporation
LT 1208 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007