Fairchild FQP50N06 60v n-channel mosfet Datasheet

TM
FQP50N06
60V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as automotive, DC/
DC converters, and high efficiency switching for power
management in portable and battery operated products.
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•
•
•
•
50A, 60V, RDS(on) = 0.022Ω @VGS = 10 V
Low gate charge ( typical 31 nC)
Low Crss ( typical 65 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
175°C maximum junction temperature rating
D
!
"
G!
!
FQP Series
Absolute Maximum Ratings
ID
S
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
- Continuous (TC = 100°C)
IDM
Drain Current
"
"
TO-220
G DS
Symbol
VDSS
! "
- Pulsed
(Note 1)
FQP50N06
60
Units
V
50
A
35.4
A
200
A
VGSS
Gate-Source Voltage
± 25
V
EAS
Single Pulsed Avalanche Energy
(Note 2)
490
mJ
IAR
Avalanche Current
(Note 1)
50
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TC = 25°C)
(Note 1)
12
7.0
120
0.8
-55 to +175
mJ
V/ns
W
W/°C
°C
300
°C
dv/dt
PD
TJ, TSTG
TL
(Note 3)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
Typ
--
RθCS
Thermal Resistance, Case-to-Sink
0.5
--
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient
--
62.5
°C/W
©2003 Fairchild Semiconductor Corporation
Max
1.24
Units
°C/W
Rev. A2, March 2003
FQP50N06
QFET
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
60
--
--
V
∆BVDSS
/ ∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
--
0.06
--
V/°C
IDSS
IGSSF
IGSSR
VDS = 60 V, VGS = 0 V
--
--
1
µA
VDS = 48 V, TC = 150°C
--
--
10
µA
Gate-Body Leakage Current, Forward
VGS = 25 V, VDS = 0 V
--
--
100
nA
Gate-Body Leakage Current, Reverse
VGS = -25 V, VDS = 0 V
--
--
-100
nA
2.0
--
4.0
V
--
0.018
0.022
Ω
--
22
--
S
--
1180
1540
pF
--
440
580
pF
--
65
90
pF
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 25 A
gFS
Forward Transconductance
VDS = 25 V, ID = 25 A
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 30 V, ID = 25 A,
RG = 25 Ω
(Note 4, 5)
VDS = 48 V, ID = 50 A,
VGS = 10 V
(Note 4, 5)
--
15
40
ns
--
105
220
ns
--
60
130
ns
--
65
140
ns
--
31
41
nC
--
8
--
nC
--
13
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
50
A
ISM
--
--
200
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 50 A
Drain-Source Diode Forward Voltage
--
--
1.5
V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 50 A,
dIF / dt = 100 A/µs
(Note 4)
--
52
--
ns
--
75
--
nC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 230µH, IAS = 50A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 50A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2003 Fairchild Semiconductor Corporation
Rev. A2, March 2003
FQP50N06
Electrical Characteristics
FQP50N06
Typical Characteristics
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
Top :
ID, Drain Current [A]
2
10
ID, Drain Current [A]
2
10
1
10
1
10
175℃
25℃
※ Note :
1. 250μ s Pulse Test
2. TC = 25℃
0
※ Notes :
1. VDS = 30V
2. 250μ s Pulse Test
-55℃
10
0
-1
0
10
10
1
10
2
10
4
6
8
10
VGS, Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.05
2
VGS = 10V
0.03
IDR, Reverse Drain Current [A]
R DS(ON) [ Ω ],
Drain-Source On-Resistance
10
0.04
VGS = 20V
1
10
0.02
0.01
※ Note : TJ = 25℃
※ Notes :
1. VGS = 0V
2. 250μ s Pulse Test
25℃
175℃
0.00
0
50
100
150
200
0
10
ID, Drain Current [A]
0.2
1.0
1.2
1.4
1.6
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
10
Coss
Ciss
※ Notes :
1. VGS = 0 V
2. f = 1 MHz
1500
1000
Crss
500
V GS , Gate-Source Voltage [V]
Capacitance [pF]
0.8
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
2500
2000
0.6
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
3000
0.4
VDS = 30V
VDS = 48V
8
6
4
2
※ Note : ID = 50A
0
0
0
-1
10
0
10
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2003 Fairchild Semiconductor Corporation
5
10
15
20
25
30
35
1
10
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A2, March 2003
(Continued)
1.2
2.5
2.0
1.1
RDS(ON) , (Normalized)
Drain-Source On-Resistance
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
FQP50N06
Typical Characteristics
1.5
1.0
1.0
※ Notes :
1. VGS = 0 V
2. ID = 250 μ A
0.9
0.8
-100
-50
0
50
100
0.5
150
※ Notes :
1. VGS = 10 V
2. ID = 25 A
0.0
-100
200
-50
10
150
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
3
60
50
100μ s
2
ID , Drain Current [A]
ID , Drain Current [A]
100
TJ, Junction Temperature [ C]
1 ms
10 ms
DC
10
50
TJ, Junction Temperature [ C]
Operation in This Area
is Limited by R DS(on)
10
0
o
o
1
※ Notes :
o
40
30
20
10
1. TC = 25 C
o
2. TJ = 175 C
3. Single Pulse
0
10
-1
10
10
0
1
10
10
0
25
2
50
100
125
150
175
Figure 10. Maximum Drain Current
vs. Case Temperature
0
D = 0 .5
※ N otes :
1 . Z θ J C( t ) = 1 . 2 4 ℃ /W M a x .
2 . D u t y F a c t o r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C( t )
0 .2
0 .1
10
-1
0 .0 5
PDM
0 .0 2
JC
(t), T h e rm a l R e s p o n s e
Figure 9. Maximum Safe Operating Area
10
75
TC, Case Temperature [℃]
VDS, Drain-Source Voltage [V]
t1
0 .0 1
t2
Z
θ
s in g le p u ls e
10
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]
Figure 11. Transient Thermal Response Curve
©2003 Fairchild Semiconductor Corporation
Rev. A2, March 2003
FQP50N06
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
Qg
200nF
12V
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RL
VDS
90%
VDD
VGS
RG
VGS
DUT
10V
10%
tr
td(on)
td(off)
t on
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
BVDSS
IAS
ID
RG
VDD
DUT
10V
tp
©2003 Fairchild Semiconductor Corporation
ID (t)
VDS (t)
VDD
tp
Time
Rev. A2, March 2003
FQP50N06
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2003 Fairchild Semiconductor Corporation
Rev. A2, March 2003
FQP50N06
Package Dimensions
TO-220
4.50 ±0.20
2.80 ±0.10
(3.00)
+0.10
1.30 –0.05
18.95MAX.
(3.70)
ø3.60 ±0.10
15.90 ±0.20
1.30 ±0.10
(8.70)
(1.46)
9.20 ±0.20
(1.70)
9.90 ±0.20
1.52 ±0.10
0.80 ±0.10
2.54TYP
[2.54 ±0.20]
10.08 ±0.30
(1.00)
13.08 ±0.20
)
(45°
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
2.54TYP
[2.54 ±0.20]
10.00 ±0.20
Dimensions in Millimeters
©2003 Fairchild Semiconductor Corporation
Rev. A2, March 2003
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Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
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Full Production
This datasheet contains final specifications. Fairchild
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Not In Production
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that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
©2003 Fairchild Semiconductor Corporation
Rev. I2