MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator Description The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual translation design of the ELT28 makes it ideal for applications which are sending and receiving signals across a backplane. The 100 Series contains temperature compensation. Features • • • • • • • • • • 3.5 ns Typical PECL to TTL Propagation Delay 1.2 ns Typical TTL to PECL Propagation Delay PNP TTL Inputs for Minimal Loading 24 mA TTL Outputs Flow Through Pinouts Operating Range VCC= 4.75 V to 5.25 V with GND= 0 V QTTL Output Will Default High with Inputs Left Open or < 1.3 V QECL Output Will Default High with Inputs Left Open Internal PECL Input Pulldown Resistors These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant www.onsemi.com MARKING DIAGRAMS* 8 8 1 SOIC−8 D SUFFIX CASE 751 1 1 TSSOP−8 DT SUFFIX CASE 948R = MC10 = MC100 1 KLT28 ALYW G 1 8 8 H K 8 HLT28 ALYW G 8 HT28 ALYWG G A L Y W G 1 KT28 ALYWG G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. © Semiconductor Components Industries, LLC, 2015 August, 2015 − Rev. 11 1 Publication Order Number: MC10ELT28/D MC10ELT28, MC100ELT28 DECL DECL 1 Table 1. PIN DESCRIPTION 8 VCC 2 7 PECL Pin QTTL TTL QECL 3 6 DTTL QECL 4 5 GND Function QTTL TTL Outputs DTTL TTL Data Inputs QECL, QECL PECL Differential Outputs DECL, DECL PECL Differential Inputs VCC Positive Supply GND Ground Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics ESD Protection Value Human Body Model > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb−Free Pkg SOIC−8 TSSOP−8 Flammability Rating Level 1 Level 3 Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Transistor Count 71 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit 7 V 0 to 6 V 50 100 mA mA VCC Positive Power Supply GND = 0 V VIN Input Voltage GND = 0 V Iout PECL Output Current Continuous Surge TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm SOIC−8 SOIC−8 190 130 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board SOIC−8 41 to 44 °C/W qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm TSSOP−8 TSSOP−8 185 140 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board TSSOP−8 41 to 44 ± 5% °C/W Tsol Wave Solder <2 to 3 sec @ 260°C 265 °C Pb−Free VI VCC Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2 MC10ELT28, MC100ELT28 Table 4. 10ELT SERIES PECL DC CHARACTERISTICS VCC= 5.0 V; GND= 0.0 V (Note 2) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit VOH Output HIGH Voltage (Note 3) 3920 4010 4110 4020 4105 4190 4090 4185 4280 mV VOL Output LOW Voltage (Note 3) 3050 3200 3350 3050 3210 3370 3050 3227 3405 mV VIH Input HIGH Voltage (Single−Ended) 3770 4110 3870 4190 3940 4280 mV VIL Input LOW Voltage (Single−Ended) 3050 3500 3050 3520 3050 3555 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 4) 2.2 5.0 2.2 5.0 2.2 5.0 V IIH Input HIGH Current 175 mA IIL Input LOW Current 255 0.5 175 0.5 mA 0.3 NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. 2. Input and output parameters vary 1:1 with VCC. VCC can vary ± 0.25 V. 3. PECL outputs are terminated through a 50 W resistor to VCC − 2 V. 4. VIHCMR min varies 1:1 with GND, VIHCMR max varies 1:1 with VCC. Table 5. 100ELT SERIES PECL DC CHARACTERISTICS VCC= 5.0 V; GND= 0.0 V (Note 5) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit VOH Output HIGH Voltage (Note 6) 3915 3995 4120 3975 4045 4120 3975 4050 4120 mV VOL Output LOW Voltage (Note 6) 3170 3305 3445 3190 3295 3380 3190 3295 3380 mV VIH Input HIGH Voltage (Single−Ended) 3835 4120 3835 4120 3835 4120 mV VIL Input LOW Voltage (Single−Ended) 3190 3525 3190 3525 3190 3525 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 7) 2.2 5.0 2.2 5.0 2.2 5.0 V IIH Input HIGH Current 175 mA IIL Input LOW Current 255 0.5 175 0.5 mA 0.5 NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. 5. Input and output parameters vary 1:1 with VCC. VCC can vary ± 0.25 V. 6. PECL outputs are terminated through a 50 W resistor to VCC − 2 V. 7. VIHCMR min varies 1:1 with GND, VIHCMR max varies 1:1 with VCC. Table 6. TTL OUTPUT DC CHARACTERISTICS VCC = 4.75V to 5.25V; TA = −40°C to 85°C Symbol Characteristic Condition VOH Output HIGH Voltage IOH = −3.0 mA VOL Output LOW Voltage IOL = 24 mA ICCH Power Supply Current ICCL Power Supply Current IOS Output Short Circuit Current Min Typ Max 2.4 −150 Unit V 0.5 V 27 40 mA 29 42 mA −60 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. www.onsemi.com 3 MC10ELT28, MC100ELT28 Table 7. TTL INPUT DC CHARACTERISTICS VCC = 4.75 V to 5.25 V; TA = −40°C to 85°C Symbol Max Unit IIH Input HIGH Current Characteristic VIN = 2.7 V Condition Min Typ 20 mA IIHH Input HIGH Current VIN = 7.0 V 100 mA IIL Input LOW Current VIN = 0.5 V −0.6 mA VIK Input Clamp Diode Voltage IIN = −18 mA −1.2 V VIH Input HIGH Voltage VIL Input LOW Voltage 2.0 V 0.8 V NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Table 8. AC CHARACTERISTICS VCC = 4.75 V to 5.25 V (Note 8) −40°C Symbol fmax Maximum Toggle Frequency tPLH Propagation Delay @ 1.5 V tPHL Min Characteristic Typ 25°C Max Min TBD Typ 85°C Max Min 100 Typ Max TBD Unit MHz ns DECL to QTTL DTTL to QECL 2.0 0.6 5.5 1.2 2.0 0.9 1.2 5.5 1.5 2.0 0.6 5.5 1.35 DECL to QTTL DTTL to QECL 2.0 0.4 5.5 1.0 2.0 0.5 0.8 5.5 1.1 2.0 0.7 5.5 1.3 QECL 0.15 1.5 0.15 1.5 0.15 1.5 ns 200 1000 200 1000 200 1000 mV Propagation Delay @ 1.5 V ns tr, tf Rise/Fall Times (20% − 80%) VPP PECL Input Swing (Note 9) tr/tf Output Rise Time (10% − 90%) Output Fall Time (10% − 90%) 1.6 1.1 ns ns NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. 8. RL = 500 W to GND and CL = 20 pF to GND. Refer to Figure 2. 9. VPP(min) is the minimum input swing for which AC parameters are guaranteed. www.onsemi.com 4 MC10ELT28, MC100ELT28 APPLICATION TTL RECEIVER CHARACTERISTIC TEST *CL includes fixture capacitance CL * RL AC TEST LOAD GND Figure 2. TTL Output Loading Used for Device Evaluation www.onsemi.com 5 MC10ELT28, MC100ELT28 ORDERING INFORMATION Package Shipping† MC10ELT28DG SOIC−8 (Pb−Free) 98 Units / Rail MC10ELT28DR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel MC10ELT28DTG TSSOP−8 (Pb−Free) 100 Units / Rail MC10ELT28DTR2G TSSOP−8 (Pb−Free) 2500 / Tape & Reel MC100ELT28DG SOIC−8 (Pb−Free) 98 Units / Rail MC100ELT28DR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel MC100ELT28DTG TSSOP−8 (Pb−Free) 100 Units / Rail MC100ELT28DTR2G TSSOP−8 (Pb−Free) 2500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices www.onsemi.com 6 MC10ELT28, MC100ELT28 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. −X− A 8 5 S B 0.25 (0.010) M Y M 1 4 K −Y− G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 7 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 MC10ELT28, MC100ELT28 PACKAGE DIMENSIONS TSSOP−8 DT SUFFIX CASE 948R−02 ISSUE A 8x 0.15 (0.006) T U K REF 0.10 (0.004) S 2X L/2 8 1 PIN 1 IDENT S T U V S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. S 5 0.25 (0.010) B −U− L 0.15 (0.006) T U M M 4 A −V− F DETAIL E C 0.10 (0.004) −T− SEATING PLANE D −W− G DETAIL E DIM A B C D F G K L M MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_ ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. 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