MPS MP7741 10w class d mono single ended audio amplifer Datasheet

MP7741
10W Class D Mono
Single Ended Audio Amplifer
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP7741 is a mono 10W Class D Audio
Amplifier. It is one of MPS’ products of fully
integrated audio amplifiers which dramatically
reduce solution size by integrating the following:
z 250mΩ power MOSFETs
z Startup / Shutdown pop elimination
z Short circuit protection circuits
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The MP7741 utilizes a single ended output
structure capable of delivering 10W into 8Ω
speakers. MPS Class D Audio Amplifiers exhibit
the high fidelity of a Class A/B amplifier at high
efficiencies. The circuit is based on the MPS’
proprietary variable frequency topology that
delivers excellent linearity, fast response time
and operates on a single power supply.
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•
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•
MP7741
features
programmable
VDD
shutdown voltage by controlling the UVP node
voltage. The default VDD shutdown voltage is
8.4V if the UVP pin is NC.
10W Output at VDD = 24V into a 8Ω load
THD+N = 0.02% at 1W, 8Ω
94% Efficiency at 10W & VDD=24V
Low Noise (103µV Typical)
Switching Frequency Up to 1MHz
9.5V to 36V Operation from a Single Supply
Integrated Startup and Shutdown Pop
Elimination Circuit
Programmable UVP
Thermal and Short Circuit Protection
Integrated Power FETs
Available in 10-Pin QFN3x3 Package
APPLICATIONS
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Portable Docking Stations
Surround Sound DVD Systems
Televisions
Flat Panel Monitors
Multimedia Computers
Home Stereo Systems
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“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
AAM (Analog Adaptive Modulation) is a Trademark of Monolithic Power
Systems, Inc.
TYPICAL APPLICATION
THD + N (%)
20
10
5
2
1
0.5
0.2
0.1
0.05
0.02
0.01
50m 100m
1
10 20
POUT (W)
MP7741 Rev. 1.0
2/17/2011
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1
MP7741 – 10W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
ORDERING INFORMATION
Part Number*
MP7741DQ
Package
QFN10 (3mm x 3mm)
Top Marking
Free Air Temperature (TA)
6Z
-40°C to +85°C
* For Tape & Reel, add suffix –Z (e.g. MP7741DQ–Z).
For RoHS compliant packaging, add suffix –LF (e.g. MP7741DQ–LF–Z)
PACKAGE REFERENCE
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
Supply Voltage VDD ...................................... 40V
BS Voltage ..................VSW – 0.3V to VSW + 6.5V
Enable Voltage VEN .........................-0.3V to +6V
VUVP, VSW, VPIN, VNIN ................... -1V to VDD + 1V
AGND to PGND ...........................-0.3V to +0.3V
Continuous Power Dissipation (TA = +25°C) (2)
………………………………………………....2.5W
Junction Temperature ...............................150°C
Lead Temperature ....................................260°C
Storage Temperature ............... -65°C to +150°C
3x3 QFN10 .............................. 50 ...... 12 ....... °C
Recommended Operating Conditions
(3)
Supply Voltage VDD .......................... 9.5V to 36V
Operating Junct. Temp (TJ)...... -40°C to +125°C
MP7741 Rev. 1.0
2/17/2011
(4)
θJA
θJC
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of
the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) =
(TJ(MAX)-TA)/ θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4)
Measured on JESD51-7, 4-layer PCB.
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2
MP7741 – 10W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
ECTRICAL CHARACTERISTICS (5, 6)
VDD = 24V, VEN = 5V, TA = +25°C, unless otherwise noted.
Parameters
Symbol Condition
Supply Current
Standby Current
Quiescent Current
Output Drivers
SW On Resistance
Short Circuit Current
Inputs
IQ
EN Enable Threshold Voltage
EN Enable Input Current
External
Undervoltage
detection
External
Undervoltage
detection hysteresis voltage
Thermal Shutdown
Thermal Shutdown Trip Point
Min
Typ
VEN = 0V, NIN=PIN=Float
SW=Low
70
1.5
Sourcing and Sinking
Sourcing and Sinking
0.25
3
VEN Rising
VEN Falling
VEN = 5V
1.4
1.0
5
0.4
Max
Units
3.0
µA
mA
Ω
A
2.0
V
V
µA
VUVP
4
V
VHys
0.3
V
150
°C
30
°C
TJ Rising
Thermal Shutdown Hysteresis
Note:
5) The device is not guaranteed to function outside its operating rating.
6) Electrical Characteristics are for the IC only with no external components except bypass capacitors.
MP7741 Rev. 1.0
2/17/2011
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3
MP7741 – 10W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
OPERATING SPECIFICATIONS (7)
Circuit of Figure 3, VDD = 24V, Gain = 8.25V/V, VEN = 5V, TA = +25°C, unless otherwise noted.
Parameters
Standby Current
Quiescent Current
Power Output
THD+ Noise
Efficiency
Maximum Power Bandwidth
Dynamic Range
Noise Floor
Symbol Condition
VEN = 0V
No load, switching
f = 1kHz, THD+N = 10%, 8Ω
Load
POUT = 1W, f = 1kHz, 8Ω Load
f = 1kHz, POUT = 10W, 8Ω Load
Power Supply Rejection
Min
Max
Units
µA
mA
10.6
W
0.02
94
20
97
103
%
%
kHz
dB
µV
f = 1kHz
-58
dB
f = 217Hz
-58
dB
A-Weighted
VCC=24V,
VRIPPLE=200mVPP
CR=100µF
Typ
90
13
Note:
7) Operating Specifications are for the IC in Typical Application circuit (Figure 3).
PIN FUNCTIONS
Pin #
Name
Description
1
PIN
Internal analog reference (VDD/2), connect a bypass capacitor from PIN to AGND (10µF).
2
NIN
Amplifier Negative Input. Drive the input signal and close the feedback loop at NIN.
3
Timer
4
AGND
5
EN
6
UVP
Under-voltage protection reference input
7
VDD
Power Supply Input.
8
BS
High-Side MOSFET Bootstrap Input. A capacitor from BS to SW supplies the gate drive
current to the internal high-side MOSFET.
9
SW
Switched Power Output. Connect the LC filter between SW and the output coupling
capacitor.
10
PGND
Enable Input. Drive EN high to turn on the amplifier, low to turn it off.
Exposed
Pad
MP7741 Rev. 1.0
2/17/2011
Internal timer input. A capacitor from Timer to AGND sets the internal timer and controls
the slew rate of start up source current.
Analog Ground. Connect AGND to PGND at a single point.
Power Ground. Connect PGND to AGND at a single point.
Connect exposed pad to GND plane for proper thermal performance.
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4
MP7741 – 10W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
TYPICAL PERFORMANCE CURVES
Circuit of Figure 3, VEN=5V, AV=8.25V/V, TA = +25°C, unless otherwise noted.
0.002
0.001
50m100m
Freq=1kHz
Freq=100Hz
1
20
10
5
2
1
0.5
+20
+18
0.2
0.1
0.05
0.02
0.01
0.005
0.002
0.001
20
+10
THD + N (%)
THD + N (%)
20
10
5
2
1
0.5
0.2
0.1
0.05 Freq=10kHz
0.02
0.01
0.005
10 20
+16
+14
+12
+8
+6
+4
100
POUT (W)
1k
+2
-0
10
10k 20k
100
FREQUENCY (Hz)
10k
40k
FREQUENCY (Hz)
+0
+0
+0
-10
-20
-20
-40
-40
-60
-60
-50
-80
-80
-60
-100
-100
-20
1k
-30
-40
-70
20
100
1k
10k 20k
2 4
FREQUENCY (Hz)
1k
10k 20k
FREQUENCY (Hz)
25
100
90
-20
20
80
POUT (W)
-40
-60
-80
15
THD+N=10%
10
THD+N=1%
-100
5
70
60
50
40
30
20
10
-120
1k
FREQUENCY (Hz)
MP7741 Rev. 1.0
2/17/2011
100
FREQUENCY (kHz)
+0
50 100
Right to Left
-120
20
6 8 10 12 14 16 18 20
EFFICIENCY(%)
-80
-120
Left to Right
10k
30k
0
0
5
10 15 20 25
VDD (V)
30 35 40
0
0
2
4
6
8
10
12
POUT (W)
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5
MP7741 – 10W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
TYPICAL PERFORMANCE CURVES (continued)
Circuit of Figure 3, VDD=24V, VEN=5V, AV=8.25V/V, TA = +25°C, unless otherwise noted.
60
50
40
30
20
10
0
MP7741 Rev. 1.0
2/17/2011
0
2
4
6
8
POUT (W)
10
12
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6
MP7741 – 10W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
BLOCK DIAGRAM
Figure1—Function block Diagram
MP7741 Rev. 1.0
2/17/2011
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7
MP7741 – 10W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
OPERATION
The MP7741 is a single-ended Class D audio
amplifier. It uses the Monolithic Power Systems
patented Analog Adaptive ModulationTM to
convert the audio input signal into pulses.
These pulses drive an internal high-current
output stage and, when filtered through an
external inductor-capacitor filter, reproduce the
input signal across the load. Because of the
switching Class D output stage, power
dissipation in the amplifier is drastically reduced
when compared to Class A, B or A/B amplifiers
while maintaining high fidelity and low
distortion.
The amplifier uses differential input to the
modulator. PIN is the positive input and NIN is
the negative input. PIN is set to half the DC
power supply input voltage (VDD/2) by the
internal circuit, so the common mode voltage of
the input NIN should be set to half the DC
power supply input voltage (VDD/2). The input
capacitor CIN couple the AC signal at the input.
The amplifier voltage gain is set by the
combination of the input resister RIN and the
feedback resistor RFB and is calculated by the
equation:
AV =
−R FB
R IN
The output driver stage uses two 250mΩ
N-Channel MOSFETs to deliver the pulses to
the LC output filter which in turn drives the load.
To fully enhance the high-side MOSFET, the
gate is driven to a voltage higher than the
source by the bootstrap capacitor between SW
and BS. While the output is driven low, the
bootstrap capacitor is charged from VDD through
an internal circuit on the MP7741. The gate of
the high-side MOSFET is driven high from the
voltage at BS, forcing the MOSFET gate to a
voltage higher than VDD and allowing the
MOSFET to fully turn on, reducing power loss in
the amplifier.
Pop Elimination
The capacitor COUT blocks the DC signal and
pass only AC signals to the load. To insure that
the amplifier passes low frequency signals, the
time constant of COUT*RLOAD needs to be long.
MP7741 Rev. 1.0
2/17/2011
However, when EN is asserted, the capacitor
charges over a long period and in a normal
amplifier can result in a turn on and turn off
“pop.”
The MP7741 integrates a source current
function to charge the AC coupling capacitor
Cout and Cin at the start up moment. The start
up source current slew rate is adjustable by
selecting different capacitance of timer
capacitor Ctimer. The larger the Ctimer
capacitance is, the smaller the start up current
slew rate is. The recommended 2.2µF capacitor
Ctimer results in a start up current slew rate of
approximately 20mA/350ms which would help
to minimize the turn on pop.
After driving EN pin low, output SW will be set
to high impedance immediately which would
help to eliminate the turn off pop.
Short Circuit/Overload Protection
The MP7741 has internal overload and short
circuit protection. The currents in both the highside and low-side MOSFETs are measured and
if the current exceeds the 3A short circuit
current limit, both MOSFETs are turned off. The
MP7741 then restarts with the same power up
sequence that is used for normal starting to
prevent a pop from occurring after a short
circuit condition is removed.
Mute/Enable Function
The MP7741 EN input is an active high enable
control. To enable the MP7741, drive EN with a
2.0V or greater voltage. To disable the
amplifier, drive it below 0.4V. While the MP7741
is disabled, the VDD operating current is less
than 100µA and the output driver MOSFETs are
turned off.
Programmable UVP
MP7741 integrate programmable UVP function,
which can be used to shutdown the MP7741 to
escape the pop, by controlling the UVP node
voltage. The corresponding circuit is shown in
the followed figure 2. If the UVP pin is NC, the
default VDD shutdown voltage is 8.4V since
there is internal voltage divided circuit.
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MP7741 – 10W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
The VDD shutdown voltage can be flexibly
adjusted by controlling UVP pin voltage. The
recommended VDD shutdown voltage is from
9.5V to power supply. As shown in the figure 2,
if external resistor RH and RL is low enough
(e.g. RH, RL < 50kΩ) compared with internal
500kΩ and 550kΩ resistor, the VDD shutdown
voltage can be calculated by the equation:
VVDD _ shutdown = 4 *
(RH + RL )
RL
The hysteresis voltage can be calculated by the
equation：
Vhysteresis = 0.3 *
RH + RL
RL
Figure 2—UVP block diagram
MP7741 Rev. 1.0
2/17/2011
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MP7741 – 10W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
APPLICATION INFORMATION
COMPONENT SELECTION
The MP7741 uses a minimum number of external
components to complete a stereo Class D audio
amplifier. The circuit of Figure 3 should be
suitable for most applications, and use the
following sections to determine how to customize
the amplifier for a particular application.
Setting the Voltage Gain
The maximum output voltage swing is limited by
the power supply. To achieve the maximum
power out of the MP7741 amplifier, set the gain
such that the maximum input signal results in the
maximum output voltage swing.
The maximum output voltage swing is ±VDD/2.
For a given input signal voltage, where VIN(pk) is
the peak input voltage, the maximum voltage
gain is:
A V (MAX) =
VDD
2 × VIN (pk )
This voltage gain setting results in the peak
output voltage approaching it’s maximum for the
maximum input signal. In some cases the
amplifier is allowed to overdrive slightly, allowing
the THD to increase at high power levels, and so
a higher gain than AV (max) is required.
Setting the Switching Frequency
The idle switching frequency (the switching
frequency when no audio input is present) is a
function of several variables: the supply voltage
VDD, the timing capacitor CINT and the feedback
resistor RFB. Lower switching frequencies result
in more inductor ripple, causing more quiescent
output voltage ripple and increasing the output
noise
and
distortion.
Higher
switching
frequencies result in more power loss. The
optimum quiescent switching frequency is
approximately 600kHz to 700kHz. Refer to the
Operating Specifications for recommended
values.
MP7741 Rev. 1.0
2/17/2011
Table 1—Switching Frequency vs. VDD, Timing
Capacitor and Feedback Resistor (see Figure 3)
Gain
(V/V)
Gain
(dB)
RFB
(kΩ)
RIN
(kΩ)
CINT
FSW
VDD
(V)
3.9
11.8
39
10
6.8nF
580kHz
12
8.2
18.3
82
10
3.3nF
580kHz
12
8.3
18.4
39
4.7
6.8nF
580kHz
12
12.0
21.6
120
10
2.2nF
530kHz
12
17.4
24.8
82
4.7
3.3nF
580kHz
12
25.5
28.1
120
4.7
2.2nF
530kHz
12
5.6
15.0
56
10
8.2nF
610kHz
24
8.2
18.3
82
10
5.6nF
650kHz
24
11.9
21.5
56
4.7
8.2nF
610kHz
24
12.0
21.6
120
10
4.7nF
540kHz
24
17.4
24.8
82
4.7
5.6nF
650kHz
24
25.5
28.1
120
4.7
4.7nF
540kHz
24
33.0
30.4
330
10
1.8nF
630kHz
24
Choosing the LC Filter
The Inductor-Capacitor (LC) filter converts the
pulse train at SW to the output voltage that drives
the speaker.
The characteristic frequency of the LC filter
needs to be high enough to allow high frequency
audio to the output, yet needs to be low enough
to filter out high frequency products of the pulses
from SW. The characteristic frequency of the LC
filter is:
f0 =
1
2π LC
The quality factor (Q) of the LC filter is important.
If this is too low, output noise will increase, if this is
too high, then peaking may occur at high signal
frequencies reducing the passband flatness. The
circuit Q is set by the load resistance (speaker
resistance, typically 4Ω or 8Ω). The Q is
calculated as:
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MP7741 – 10W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
Q=
RLOAD
RLOAD
=
ω0 × L 2π × f0 × L
ω0 is the characteristic frequency in radians per
second and f0 is in Hz. Use an LC filter with Q
between 0.7 and 1.
The actual output ripple and noise is greatly
affected by the type of inductor and capacitor used
in the LC filter. Use a film capacitor and an
inductor with sufficient power handling capability
to supply the output current to the load. The
inductor
should
exhibit
soft
saturation
characteristics. If the inductor exhibits hard
saturation, it should operate well below the
saturation current. Gapped ferrite, MPP,
Powdered Iron, or similar type toroidal cores are
recommended. If open or shielded bobbin ferrite
cores are used for multi-channel designs, make
sure that the start windings of each inductor line
up (all starts going toward SW pin, or all starts
going toward the output) to prevent crosstalk or
other channel-to-channel interference.
Output Coupling Capacitor
The output AC coupling capacitor COUT serves to
block DC voltages and thus passes only the
amplified AC signal from the LC filter to the load.
The combination of the coupling capacitor, COUT
and the load resistance results in a first-order
high-pass filter. The value of COUT should be
selected such that the required minimum
frequency is still allowed to pass. The output
corner frequency (-3dB point), fOUT, can be
calculated as:
fOUT =
1
2 × π × R LOAD × C OUT
Set the output corner frequency (fOUT) at or below
the minimum required frequency.
The output coupling capacitor carries the full load
current, so a capacitor should be chosen such
that its ripple current rating is greater than the
maximum load current. Low ESR aluminum
electrolytic capacitors are recommended.
the MP7741 input is at half the power supply
voltage (VDD/2). The input coupling capacitor
transmits the AC signal from the source to the
MP7741 while blocking the DC voltage. Choose
an input coupling capacitor such that the corner
frequency (fIN) is less than the passband
frequency. The corner frequency is calculated as:
fIN =
1
2 × π × RIN × CIN
Timer capacitor
The start up source current slew rate is
adjustable by selecting different capacitance of
timer capacitor Ctimer. The larger the Ctimer
capacitance is, the smaller the start up current
slew rate is. It is recommended to use the Ctime
which capacitance is larger than 312nF, so the
start up current slew rate would be smaller than
20mA/50ms which would help to eliminate the
turn on pop. The recommended 2.2µF capacitor
Ctimer results in a start up current slew rate of
approximately 20mA/350ms.
Power Source
For maximum output power, the amplifier circuit
requires a regulated external power source to
supply the power to the amplifier. The higher the
power supply voltage, the more power can be
delivered to a given load resistance, however if
the power source voltage exceeds the maximum
voltage of 36V, the MP7741 may sustain
damage. The power supply rejection of the
MP7741 is excellent (typically -60dB), however
noise at the power supply can get to the output,
so care must be taken to minimize power supply
noise within the pass-band frequencies. Bypass
the power supply with a large capacitor (typically
aluminum electrolytic) along with a smaller 1µF
ceramic capacitor at the MP7741 VDD supply
pins.
Input Coupling Capacitor
The input coupling capacitor CIN is used to pass
only the AC signal at the input. In a typical
system application, the source input signal is
typically centered around the circuit ground, while
MP7741 Rev. 1.0
2/17/2011
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MP7741 – 10W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
PCB Layout
The circuit layout is critical for optimum
performance and low output distortion and noise.
It is highly recommended to duplicate EVB layout
for optimum performance. If change is
necessary, please follow these guidelines and
take Figure 4 for references.
1) Place the following components as close to
the MP7741 as possible:
Bootstrap Cap
CBS is used to supply the gate drive current to the
internal high-side MOSFET. Place CBS as close
to pins 8 (BS) and 9 (SW) as possible.
Power Supply Bypass
CBYP carries the transient current for the
switching power stage. To prevent overstressing
of the MP7741 and excessive noise at the output,
place CBYP as close to pins 7 (VDD) and 10
(PGND) as possible.
Integrated Capacitors
CINT is used to set the amplifier switching
frequencies and are typically on the order of a
few nF. Place CINT as close to pins 1 (PIN) and 2
(NIN) as possible to reduce distortion and noise.
Reference Bypass Capacitors
CR filters the ½ VDD reference voltages. Place
CR as close to the IC as possible to improve
power supply rejection and reduce distortion and
noise at the output.
2) The Inductor-Capacitor (LC) filter converts the
pulse train at SW to the output voltage that drives
the speaker. Please keep the filter capacitor
close to the inductor.
3) When laying out the PCB, use two separate
ground planes, analog ground (AGND) and
power ground (PGND), and connect the two
grounds together at a single point (usually
around the bulk bypass capacitor) to prevent
noise injection into the amplifier input to reduce
distortion.
a ground plane between the traces. If multiple
amplifiers are used on a single board, make sure
that each channel is physically separated to
prevent crosstalk. Make sure that all inductors
used on a single circuit board have the same
orientation.
If multiple amplifiers are used on a single board,
make sure that the power supply is routed from
the source to each channel individually, not
serially. This prevents channel-to-channel
coupling through the power supply input.
Electro-Magnetic
Interference
(EMI)
Considerations
Due to the switching nature of the Class D
amplifier, care must be taken to minimize the
effects of electromagnetic interference from the
amplifier. However, with proper component
selection and careful attention to circuit layout,
the effects of the EMI due to the amplifier
switching can be minimized.
The power inductors are a potential source of
radiated emissions. For the best EMI
performance, use toroidal inductors, since the
magnetic field is well contained inside the core.
However toroidal inductors can be expensive to
wind. For a more economical solution, use
shielded gapped ferrite or shielded ferrite bobbin
core inductors. These inductors typically do not
contain the field as well toroidal inductors, but
usually can achieve a better balance of good EMI
performance with low cost.
The size of high-current loops that carry rapidly
changing currents needs to be minimized. To do
this, make sure that the VDD bypass capacitors
are as close to the MP7741 as possible.
Nodes that carry rapidly changing voltage, such
as SW, need to be made as small as possible. If
sensitive traces run near a trace connected to
SW, place a ground shield between the traces.
4) Keep the sensitive feedback signal trace on
the input side and shield the trace with the AGND
plane. Make sure that any traces carrying the
switch node (SW) voltages are separated far
from any input signal traces. If it is required to run
the SW trace near the input, shield the input with
MP7741 Rev. 1.0
2/17/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
12
MP7741 – 10W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
TYPICAL APPLICATION CIRCUIT
CFB
22pF
RFB
82kΩ
CIN
AUDIO
INPUT
RIN
2
10kΩ
2.2uF
50V
CINT
5.6nF
1
CR
10uF
50V
3
CTIMER
2.2uF
4
NIN
SW
PIN
BS
Timer
EN
AGND
VDD
COUT
LF
9
10uH, 3.5A
8
5
CBS
1uF
16V
CF
OFF ON
RL
6
PGND 10
UVP
0.47uF
50V
7
VDD
CBYP
10kΩ
OUTPUT
1000uF
50V
CVDDBYP
2.2uF
50V
1000uF
50V
RH
35kΩ
Figure 3—24V VDD Mono Typical Application Circuit
AGND
AGND
PGND
CVDDBYP
PGND
Feedback
signal
CFB
RFB
CF
CR
CINT
CTIMER
1
PIN
PGND
10
2
NIN
SW
9
3
Timer
BS
8
4
AGND
VDD
7
5
EN
UVP
6
LF
CBS
CBYP
MP7741
Top
Bottom
Figure 4—Reference PCB Layout
MP7741 Rev. 1.0
2/17/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
13
MP7741 – 10W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
PACKAGE INFORMATION
QFN10
2.90
3.10
0.30
0.50
PIN 1 ID
MARKING
0.18
0.30
2.90
3.10
PIN 1 ID
INDEX AREA
1.45
1.75
PIN 1 ID
SEE DETAIL A
10
1
2.25
2.55
0.50
BSC
5
6
TOP VIEW
BOTTOM VIEW
PIN 1 ID OPTION A
R0.20 TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.80
1.00
0.20 REF
0.00
0.05
SIDE VIEW
DETAIL A
NOTE:
2.90
0.70
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX.
4) DRAWING CONFORMS TO JEDEC MO-229, VARIATION VEED-5.
5) DRAWING IS NOT TO SCALE.
1.70
0.25
2.50
0.50
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP7741 Rev. 1.0
2/17/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
14