NTGS3443, NVGS3443 Power MOSFET 4.4 Amps, 20 Volts P−Channel TSOP−6 http://onsemi.com Features • • • • • Ultra Low RDS(on) Higher Efficiency Extending Battery Life Miniature TSOP−6 Surface Mount Package These Devices are Pb−Free and are RoHS Compliant NVGS Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable 4.4 AMPERES 20 VOLTS RDS(on) = 65 mW P−Channel 1 2 5 6 Applications • Power Management in Portable and Battery−Powered Products, 3 i.e.: Cellular and Cordless Telephones, and PCMCIA Cards MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating 4 Symbol Value Unit Drain−to−Source Voltage VDSS −20 Volts Gate−to−Source Voltage − Continuous VGS "12 Volts Thermal Resistance Junction−to−Ambient (Note 1) Total Power Dissipation @ TA = 25°C Drain Current − Continuous @ TA = 25°C − Pulsed Drain Current (Tp t 10 mS) RqJA Pd ID IDM 244 0.5 −2.2 −10 °C/W Watts Amps Amps Thermal Resistance Junction−to−Ambient (Note 2) Total Power Dissipation @ TA = 25°C Drain Current − Continuous @ TA = 25°C − Pulsed Drain Current (Tp t 10 mS) RqJA Pd ID IDM 128 1.0 −3.1 −14 °C/W Watts Amps Amps Thermal Resistance Junction−to−Ambient (Note 3) Total Power Dissipation @ TA = 25°C Drain Current − Continuous @ TA = 25°C − Pulsed Drain Current (Tp t 10 mS) RqJA Pd ID IDM 62.5 2.0 −4.4 −20 °C/W Watts Amps Amps Operating and Storage Temperature Range TJ, Tstg −55 to 150 °C Maximum Lead Temperature for Soldering Purposes for 10 Seconds TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Minimum FR−4 or G−10 PCB, operating to steady state. 2. Mounted onto a 2 in square FR−4 board (1 in sq, 2 oz. Cu. 0.06″ thick single sided), operating to steady state. 3. Mounted onto a 2 in square FR−4 board (1 in sq, 2 oz. Cu. 0.06″ thick single sided), t t 5.0 seconds. © Semiconductor Components Industries, LLC, 2012 December, 2012 − Rev. 5 1 MARKING DIAGRAM & PIN ASSIGNMENT Drain Drain Source 6 5 4 443 M G G 1 TSOP−6 CASE 318G STYLE 1 1 2 3 Drain Drain Gate 443 = Specific Device Code M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. ORDERING INFORMATION Device Package Shipping† NTGS3443T1G TSOP−6 (Pb−Free) 3000 / Tape & Reel NVGS3443T1G TSOP−6 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: NTGS3443T1/D NTGS3443, NVGS3443 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Notes 4 & 5) Symbol Min Typ Max −20 − − − − − − −1.0 −5.0 − − −100 − − 100 −0.60 −0.95 −1.50 − − − 0.058 0.082 0.092 0.065 0.090 0.100 − 8.8 − Ciss − 565 − pF Coss − 320 − pF Crss − 120 − pF td(on) − 10 25 ns tr − 18 45 ns td(off) − 30 50 ns tf − 31 50 ns Qtot − 7.5 15 nC Qgs − 1.4 − nC Qgd − 2.9 − nC (IS = −1.7 Adc, VGS = 0 Vdc) VSD − −0.83 −1.2 Vdc (IS = −1.7 Adc, dIS/dt = 100 A/ms) trr − 30 − ns Characteristic Unit OFF CHARACTERISTICS Drain−Source Breakdown Voltage (VGS = 0 Vdc, ID = −10 mA) V(BR)DSS Zero Gate Voltage Drain Current (VGS = 0 Vdc, VDS = −20 Vdc, TJ = 25°C) (VGS = 0 Vdc, VDS = −20 Vdc, TJ = 70°C) IDSS Gate−Body Leakage Current (VGS = −12 Vdc, VDS = 0 Vdc) IGSS Gate−Body Leakage Current (VGS = +12 Vdc, VDS = 0 Vdc) IGSS Vdc mAdc nAdc nAdc ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = −250 mAdc) VGS(th) Static Drain−Source On−State Resistance (VGS = −4.5 Vdc, ID = −4.4 Adc) (VGS = −2.7 Vdc, ID = −3.7 Adc) (VGS = −2.5 Vdc, ID = −3.5 Adc) RDS(on) Forward Transconductance (VDS = −10 Vdc, ID = −4.4 Adc) gFS Vdc W mhos DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance (VDS = −5.0 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Reverse Transfer Capacitance SWITCHING CHARACTERISTICS Turn−On Delay Time Rise Time Turn−Off Delay Time (VDD = −20 Vdc, ID = −1.0 Adc, VGS = −4.5 Vdc, Rg = 6.0 W) Fall Time Total Gate Charge Gate−Source Charge Gate−Drain Charge (VDS = −10 Vdc, VGS = −4.5 Vdc, ID = −4.4 Adc) BODY−DRAIN DIODE RATINGS Diode Forward On−Voltage Reverse Recovery Time 4. Indicates Pulse Test: P.W. = 300 msec max, Duty Cycle = 2%. 5. Handling precautions to protect against electrostatic discharge are mandatory. http://onsemi.com 2 NTGS3443, NVGS3443 TYPICAL ELECTRICAL CHARACTERISTICS −ID, DRAIN CURRENT (AMPS) VDS≥ = −10 V TJ = 25°C VGS = −3 V VGS = −4.5 V VGS = −4 V VGS = −3.5 V VGS = −2 V 4 2 VGS = −1.5 V 0 0.4 0.8 1.2 1.6 4 TJ = 25°C 2 TJ = 125°C 0 0.6 1.4 1.8 2.2 Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics ID = −4.4 A TJ = 25°C 0.3 0.25 0.2 0.15 0.1 0.05 2 2.5 3 3.5 4 4.5 5 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 3 0.16 TJ = 25°C 0.14 VGS = −2.5 V 0.12 VGS = −2.7 V 0.1 0.08 VGS = −4.5 V 0.06 0.04 0 1 2 3 4 5 6 7 8 −ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 100 1.5 TJ = 125°C ID = −4.4 A VGS = −4.5 V 1.3 1.2 1.1 1 0.9 TJ = 100°C 10 1 TJ = 25°C 0.1 0.8 0.7 −50 2.6 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 0.35 1.4 1 TJ = −55°C −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 0.4 0 1.5 6 2 RDS(on), DRAIN−TO−SOURCE RESISTANCE (OHMS) RDS(on), DRAIN−TO−SOURCE RESISTANCE (OHMS) VGS = −2.5 V 6 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 8 VGS = −5 V −IDSS, LEAKAGE (nA) −ID, DRAIN CURRENT (AMPS) 8 VGS = 0 V −25 0 25 50 75 100 125 0.01 150 0 4 8 12 16 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 20 NTGS3443, NVGS3443 TYPICAL ELECTRICAL CHARACTERISTICS 5 1200 800 600 Ciss 400 Coss 200 VGS(th), GATE THRESHOLD VOLTAGE (NORMALIZED) 0 QT VGS 4 3 Q1 Q2 2 1 TJ = 25°C ID = −4.4 A Crss 0 2 4 6 8 10 12 14 16 18 0 20 1 2 3 4 5 6 7 Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 1.3 4 ID = −250 mA 1.2 1.1 1 0.9 0.8 0.7 0.6 −50 0 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) −IS, SOURCE CURRENT (AMPS) C, CAPACITANCE (pF) 1000 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) TJ = 25°C VGS = 0 V −25 0 25 50 75 100 125 150 VGS = 0 V 3 TJ = 150°C 2 TJ = 25°C 1 0 0.3 0.4 0.5 0.6 0.7 0.8 0.9 TJ, JUNCTION TEMPERATURE (°C) −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 9. Gate Threshold Voltage Variation with Temperature Figure 10. Diode Forward Voltage vs. Current http://onsemi.com 4 8 1 NTGS3443, NVGS3443 TYPICAL ELECTRICAL CHARACTERISTICS 20 POWER (W) 16 12 8 4 0 0.01 0.10 1.00 10.00 100.00 TIME (sec) NORMALIZED EFFECTIVE TRANSIENT THERMAL IMPEDANCE Figure 11. Single Pulse Power 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 1E−04 Single Pulse 1E−03 1E−02 1E−01 1E+00 1E+01 1E+02 SQUARE WAVE PULSE DURATION (sec) Figure 12. Normalized Thermal Transient Impedance, Junction−to−Ambient http://onsemi.com 5 1E+03 NTGS3443, NVGS3443 PACKAGE DIMENSIONS TSOP−6 CASE 318G−02 ISSUE V NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D AND E1 ARE DETERMINED AT DATUM H. 5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE. D ÉÉÉ ÉÉÉ 6 E1 1 NOTE 5 5 2 H L2 4 GAUGE PLANE E 3 L b C DETAIL Z e 0.05 M SEATING PLANE c A A1 DETAIL Z DIM A A1 b c D E E1 e L L2 M MIN 0.90 0.01 0.25 0.10 2.90 2.50 1.30 0.85 0.20 0° MILLIMETERS NOM MAX 1.00 1.10 0.06 0.10 0.38 0.50 0.18 0.26 3.00 3.10 2.75 3.00 1.50 1.70 0.95 1.05 0.40 0.60 0.25 BSC 10° − STYLE 1: PIN 1. DRAIN 2. DRAIN 3. GATE 4. SOURCE 5. DRAIN 6. DRAIN RECOMMENDED SOLDERING FOOTPRINT* 6X 0.60 3.20 6X 0.95 0.95 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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