IRF IRS2133 3-phase bridge driver Datasheet

PRELIMINARY
Data Sheet No. PD60275 revA
IRS2133/IRS2135 (J&S)PbF
3-PHASE BRIDGE DRIVER
Features
•
•
•
•
•
•
•
•
•
•
•
Floating channel designed for bootstrap operation
Fully operational to +600 V
Tolerant to negative transient voltage, dV/dt immune
Gate drive supply range from 10 V /12 V to 20 V DC
and up to 25 V for transient
Undervoltage lockout for all channels
Over-current shutdown turns off all six drivers
Three Independent half-bridge drivers
Matched propagation delay for all channels
2.5 V logic compatible
Outputs out of phase with inputs
All parts are LEAD-FREE
Description
Product Summary
VOFFSET
600 V max.
IO+/- (min.)
200 mA / 420 mA
VOUT
10 V – 20 V or 12 – 20 V
ton/off (typ.)
500 ns
Deadtime (typ.)
230 ns
Applications:
*Motor Control
*Air Conditioners/ Washing Machines
*General Purpose Inverters
*Micro/Mini Inverter Drives
Packages
The IRS213(3, 5) are high voltage, high speed
power MOSFET and IGBT drivers with three independent high
and low side referenced output channels for 3-phase
applications. Proprietary HVIC technology enables ruggedized
monolithic construction. Logic inputs are compatible with
CMOS or LSTTL outputs, down to 2.5 V logic. An independent
operational amplifier provides analog feedback of bridge
28-Lead SOIC
28-Lead PDIP
current via an external current sense resistor. A current
trip function which terminates all six outputs can also derived
from this resistor. A shutdown function is available to terminate
all six outputs. An open drain FAULT signal is provided to
indicate that an over-current or undervoltage shutdown has
occurred. Fault conditions are cleared with the FLT-CLR lead.
44-Lead PLCC w/o 12 Leads
The output drivers feature a high pulse current buffer stage
designed for minimum driver cross-conduction. Propagation
delays are matched to simplify use in high frequencies applications. The floating channels can be used to drive
N-channel power MOSFETs or IGBTs in the high side configuration which operates up to 600 V.
Typical Connection
Absolute Maximum Ratings
Absolute Maximum Ratings
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1
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions. Zener clamps are included between VCC & COM (25 V), VCC
& VSS (20V), and VBx & VSx (20 V).
Symbol
Min.
Max.
VB1,2,3
VS1,2,3
High side floating supply voltage
High side floating offset voltage
-0.3
VB1,2,3 - 20
625
VB1,2,3 + 0.3
VHO1,2,3
High side floating output voltage
VS1,2,3 - 0.3
VB1,2,3 + 0.3
-0.3
25
VCC
VSS
VLO1,2,3
VIN
VIN,AMP
VOUT,AMP
VFLT
dVS/dt
PD
Rth,JA
Definition
Fixed supply voltage
Logic ground
VCC - 20
VCC + 0.3
-0.3
VCC + 0.3
VSS -0.3
VCC + 0.3
VSS -0.3
VSS -0.3
VSS -0.3
—
VCC +0.3
VCC +0.3
VCC +0.3
50
(28 lead PDIP)
—
1.5
(28 lead SOIC)
—
1.6
(44 lead PLCC)
—
2.0
(28 lead PDIP)
—
83
(28 lead SOIC)
—
78
(44 lead PLCC)
—
63
Low side output voltage
Logic input voltage ( HIN, LIN ITRIP, SD & FLT-CLR)
Operational amplifier input voltage (CA+ & CA-)
Operational amplifier output voltage (CAO)
FAULT output voltage
Allowable offset supply voltage transient
Package power dissipation @ TA ≤ +25 °C
Thermal resistance, junction to ambient
TJ
Junction temperature
—
150
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
—
300
Units
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltage referenced to COM. The VS offset rating is
tested with all supplies biased at a 15 V differential.
Symbol
Definition
Min.
Max.
VB1,2,3
High side floating supply voltage
VS1,2,3 +10/12
VS1,2,3 +20
VS1,2,3
High side floating offset voltage
Note 1
600
VHO1,2,3
High side floating output voltage
VS1,2,3
VB1,2,3
VCC
Fixed supply voltage
10 or 12
20
VSS
Low side driver return
-5
5
Low side output voltage
0
VCC
Logic input voltage (HIN, LIN ITRIP, SD & FLT-CLR)
VSS
VSS + 5
Operational amplifier input voltage (CA+ & CA-)
VSS
VSS + 5
Operational amplifier output voltage (CAO)
VSS
VSS + 5
FAULT output voltage
VSS
VCC
VLO1,2,3
VIN
VIN,AMP
VOUT,AMP
VFLT
Units
V
Note 1: Logic operational for VS of (COM - 8 V) to (COM + 600 V). Logic state held for VS of (COM - 8 V) to (COM –
VBS). (Please refer to the Design Tip DT97-3 for more details).
Note 2: The CAO pin and all input pins (except CA+ & CA-) are internally clamped with a 5.2 V zener diode.
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2
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
Static Electrical Characteristics
VBIAS (VCC, VBS1,2,3) = 15 V, unless otherwise specified and TA = 25 °C. All static parameters other than IO and VO are
referenced to VSS and are applicable to all six channels (HIN1,2,3 & LIN1,2,3). The VO and IO parameters are
referenced to COM and VS1,2,3 and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.
Symbol
VIH
VIL
Definition
Min. Typ. Max. Units Test Conditions
Logic “0” input voltage (OUT = LO)
Logic “1” input voltage (OUT = HI)
2.2
—
—
—
—
0.8
VFCLR,IH
Logic “0” fault clear input voltage
2.2
—
—
VFCLR,IL
Logic “1” fault clear input voltage
—
—
0.8
VSD,TH+
SD input positive going threshold
1.6
1.9
2.2
VSD,TH-
SD input negative going threshold
1.4
1.7
2.0
VIT,TH+
ITRIP input positive going threshold
470
570
670
VIT,TH-
ITRIP input negative going threshold
360
460
560
VOH
High level output voltage, VBIAS - VO
—
—
1
V
VIN = 0 V, Io = 20 mA
VOL
Low level output voltage, VO
—
—
400
mV
VIN = 5 V, Io = 20 mA
ILK
Offset supply leakage current IRS213(3,5)
—
—
50
IQBS
Quiescent VBS supply current
—
45
70
IQCC
Quiescent VCC supply current
—
3
5
IIN+
IINISD+
ISD-
Logic “1” input bias current (OUT = HI)
Logic “0” input bias current (OUT = LO)
“High” shutdown bias current
“Low” shutdown bias current
“High” ITRIP bias current
“Low” ITRIP bias current
“High” fault clear input bias current
“Low” fault clear input bias current
IRS2133
VBS supply undervoltage positive
going threshold
IRS2135
IRS2133
VBS supply undervoltage negative
going threshold
IRS2135
IRS2133
VBS supply undervoltage lockout
hysteresis
IRS2135
IRS2133
VCC supply undervoltage positive
going threshold
IRS2135
IRS2133
VCC supply undervoltage negative
going threshold
IRS2135
IRS2133
VCC supply undervoltage lockout
hysteresis
IRS2135
FAULT low on-resistance
—
—
—
—
—
—
—
—
7.6
9.2
7.2
8.3
—
—
7.6
9.2
7.2
8.3
—
—
—
150
110
5
—
5
—
150
110
8.6
10.4
8.2
9.4
0.4
1
8.6
10.4
8.2
9.4
0.4
1
55
200
150
10
100
10
100
200
150
9.6
11.6
9.2
10.5
—
—
9.6
11.6
9.2
10.5
—
—
75
IO+
Output high short circuit pulsed current
200
250
—
IO-
Output low short circuit pulsed current
420
500
—
IITRIP+
IITRIPIFLTCLR+
IFLTCLRVBSUV+
VBSUVVBSUVH
VCCUV+
VCCUVVCCUVH
Ron, FLT
V
mV
µA
VB1,2,3 = VS1,2,3 =
600 V
mA
VIN = 0 V or 5 V
VIN = 0 V or 5 V
µA
nA
µA
nA
µA
V
Ω
mA
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VIN = 0 V
VIN = 5 V
SD = 5 V
SD = 0 V
ITRIP = 5 V
ITRIP = 0 V
FLT-CLR = 0 V
FLT-CLR = 5 V
VOUT = 0 V, VIN = 0 V
PW ≤ 10 µs
VOUT = 15 V,
VIN = 5 V
PW ≤ 10 µs
3
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
Static Electrical Characteristics – (Continued)
VBIAS (VCC, VBS1,2,3) = 15 V, unless otherwise specified and TA = 25 °C. All static parameters other than IO and VO are
referenced to VSS and are applicable to all six channels (HIN1,2,3 & LIN1,2,3). The VO and IO parameters are
referenced to COM and VS1,2,3 and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.
Symbol
VOS
Definition
Min. Typ. Max. Units Test Conditions
Amplifier input offset voltage
—
—
10
mV
IIN,AMP
Amplifier input bias current
—
—
50
nA
CMRR
Amplifier common mode rejection ratio
TBD
80
—
PSRR
Amplifier power supply rejection ratio
TBD
75
—
dB
VOH,AMP
Operational amplifier high level output voltage
4.9
5.2
5.4
V
VOL,AMP
Operational amplifier low level output voltage
—
—
30
mV
ISRC,AMP
Operational amplifier output source current
4
7
—
ISNK,AMP
Operational amplifier output sink current
1
2.1
—
—
10
—
—
4
—
IO+,AMP
IO-,AMP
Operational amplifier output high short circuit
current
Operational amplifier output low short circuit
current
mA
CA+ = 0.2 V,
CA- = CAO
CA+ = CA- = 2.5 V
CA+ = 0.1 V & 5 V,
CA- = CAO
CA+ = 0.2 V,
CA- = CAO,
VCC = 10 V & 20 V
CA+ = 1 V, CA- = 0 V
CA+ = 0 V, CA- = 1 V
CA+ = 1 V, CA- = 0 V,
CAO = 4 V
CA+ = 0 V, CA- = 1 V,
CAO = 2 V
CA+ = 5 V, CA- = 0 V,
CAO = 0 V
CA+ = 0 V, CA- = 5 V,
CAO = 5 V
Dynamic Electrical Characteristics
VBIAS (VCC, VBS1,2,3) = 15 V, VS1,2,3 = VSS , TA = 25 °C and CL = 1000 pF unless otherwise specified.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
ton
Turn-on propagation delay
400
500
700
toff
Turn-off propagation delay
400
500
700
tr
Turn-on rise time
—
80
125
tf
Turn-off fall time
—
35
55
tsd
SD to output shutdown propagation delay
400
550
750
titrip
ITRIP to output shutdown propagation delay
400
660
920
tbl
ITRIP blanking time
ITRIP to FAULT propagation delay
—
400
—
350
550
870
tflt
tflt, in
Input filter time ( HIN, LIN, and SD)
—
325
—
tfltclr
FLT-CLR to FAULT clear time
600
850
1100
DT
Deadtime (LS turn-off to HS turn-on & HS turnoff to LS turn-on)
150
230
350
Operational amplifier slew rate (+)
Operational amplifier slew rate (-)
5
2.4
10
3.2
—
—
SR+
SR-
VIN = 0 V & 5 V
VS1,2,3 = 0 V to 600 V
ns
V/µs
1 V step input
NOTE: For high side PWM, HIN pulse width must be > 1 µs.
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4
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
Fig. 1. Input/Output Timing Diagram
Fig. 2. Deadtime Waveform Definitions
Fig. 3. Input/Output Switching Time Waveform Definitions
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5
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
Fig. 4. Overcurrent Shutdown Switching Time Waveform Definitions
Fig. 5. Input Filter Function
Fig. 6. Diagnostic Feedback Operational Amplifier Circuit
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IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
Lead Definitions
Symbol
Description
HIN1,2,3
Logic input for high side gate driver outputs (HO1,2,3), out of phase
LIN1,2,3
Logic input for low side gate driver outputs (LO1,2,3), out of phase
FAULT
Indicates over-current or undervoltage lockout (low side) has occurred, negative logic
VCC
Logic and low side fixed supply
ITRIP
FLT-CLR
Input for over-current shut down
SD
Logic input for fault clear, negative logic
Logic input for shutdown
CAO
Output of current amplifier
CA-
Negative input of current amplifier
CA+
Positive input of current amplifier
VSS
Logic ground
Com
VB1,2,3
HO1,2,3
VS1,2,3
Low side return
High side floating supplies
High side gate drive outputs
High side floating supply returns
LO1,2,3
Low side gate drive outputs
Lead Assignments
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7
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
Functional Block Diagram
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8
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
1 PCB Layout Tips
1.1 Distance from H to L Voltage
The IRS213(3,5)J package lacks some pins (see page 7) in order to maximizing the distance between the high
voltage and low voltage pins. It’s strongly recommended to place the components tied to the floating voltage in the
respective high voltage portions of the device (VB1,2,3, VS1,2,3) side.
1.2 Ground Plane
To minimize noise coupling ground plane must not be placed under or near the high voltage floating side.
1.3 Gate Drive Loops
Current loops behave like an antenna able to receive and transmit EM noise (see Fig. 7). In order to reduce EM
coupling and improve the power switch turn on/off performances, gate drive loops must be reduced as much as
possible. Moreover, current can be injected inside the gate drive loop via the IGBT collector-to-gate parasitic
capacitance. The parasitic auto-inductance of the gate loop contributes to develop a voltage across the gate-emitter
increasing the possibility of self turn-on effect.
Fig. 7. Antenna Loops
1.4 Supply Capacitors
Supply capacitors must be placed as close as possible to the device pins (VCC and VSS for the ground tied supply, VB
and VS for the floating supply) in order to minimize parasitic inductance/resistance.
1.5 Routing and Placement
Power stage PCB parasitic may generate dangerous voltage transients for the gate driver and the control logic. In
particular it’s recommended to limit phase voltage negative transients.
In order to avoid such undervoltage it is highly recommended to minimize high side emitter to low side collector
distance and low side emitter to negative bus rail stray inductance. See DT04-4 at www.irf.com for more detailed
information.
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9
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
1500
Turn-off Propagation Delay (ns)
Turn-on Propagation Delay (ns)
Figures 8-38 provide information on the experimental performance of the IRS2133S HVIC. The line plotted in each
figure is generated from actual lab data. A large number of individual samples were tested at three temperatures (-40
ºC, 25 ºC, and 125 ºC) in order to generate the experimental (Exp.) curve. The line labeled Exp. consist of three data
points (one data point at each of the tested temperatures) that have been connected together to illustrate the
understood trend. The individual data points on the curve were determined by calculating the averaged experimental
value of the parameter (for a given temperature).
1200
900
600
Exp.
300
0
-50
-25
0
25
50
75
100
1500
1200
900
Exp.
600
300
0
-50
125
-25
0
Fig. 8. Turn-On Propagation Delay vs. Temperature
75
100
125
Fig. 9. Turn-Off Propagation Delay vs. Temperature
250
Turn-Off Fall Time (ns)
Turn-On Rise Time (ns)
50
Temperature (oC)
Temperature (oC)
200
150
100
25
Exp.
50
150
125
100
75
50
Exp.
25
0
0
-50
-25
0
25
50
75
100
o
Temperature ( C)
Fig. 10. Turn-On Rise Time vs. Temperature
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125
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Fig. 11. Turn-Off Fall Time vs. Temperature
10
IRS2133/IRS2135 (J&S)PbF
ITRIP Propagation Delay (ns)
DT Propagation Delay (ns)
PRELIMINARY
1500
1200
900
600
Exp.
300
1800
1500
1200
900
Exp.
600
300
0
-50
-25
0
25
50
75
100
-50
125
-25
0
1200
900
Exp.
600
300
0
25
50
75
100
125
FAULT Low On Resistance ( Ohm)
ITRIP to FAULT Propagation Delay (ns)
1500
0
120
80
Exp.
40
0
-50
-25
0
8
Exp.
0
75
100
o
Temperature ( C)
Fig. 16. VCC Quiescent Current vs. Temperature
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125
VBS Quiescent Supply Current (uA)
VCC Quiescent Current (mA)
12
50
75
100
125
Fig. 15. FAULT Low On Resistance vs. Temperature
16
25
50
Temperature ( C)
20
0
25
o
Fig. 14. ITRIP to FAULT Propagation Delay vs.
Temperature
-25
125
160
Temperature ( C)
-50
100
200
o
4
75
Fig. 13. TITRIP Propagation Delay vs. Temperature
Fig. 12. DT Propagation Delay vs. Temperature
-25
50
Temperature ( C)
Temperature ( C)
-50
25
o
o
250
200
150
100
Exp.
50
0
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Fig. 17. VBS Quiescent Current vs. Temperature
11
IRS2133/IRS2135 (J&S)PbF
12
12
11
11
VCCUV- Threshold (V)
VCCUV+ Threshold (V)
PRELIMINARY
10
9
Exp.
8
7
10
9
Exp.
8
7
6
6
-50
-25
0
25
50
75
100
-50
125
-25
0
25
100
125
Fig. 19. VCCUV- Threshold vs. Temperature
Fig. 18. VCCUV+ Threshold vs. Temperature
12
12
11
11
VBSUV- Threshold (V)
VBSUV+ Threshold (V)
75
Temperature ( C)
Temperature ( C)
10
9
Exp.
8
7
6
10
9
Exp.
8
7
6
-50
-25
0
25
50
75
100
125
-50
-25
0
25
Temperature (oC)
EXP.
400
200
25
50
75
100
125
o
Temperature ( C)
Fig. 22. ITRIP Positive Going Threshold vs. Temperature
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ITRIP Negative Going Threshold (mV)
600
0
100
125
Fig. 21. VBSUV- Threshold vs. Temperature
800
-25
75
Temperature ( C)
1000
-50
50
o
Fig. 20. VBSUV+ Threshold vs. Temperature
ITRIP Positive Going Threshold (mV)
50
o
o
900
700
500
Exp.
300
100
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Fig. 23. ITRIP Negative Going Threshold vs.
Temperature
12
IRS2133/IRS2135 (J&S)PbF
Output High SC Pulsed Current (mA)
500
400
300
Exp.
200
100
0
-50
-25
0
25
50
75
100
125
Output Low SC Pulsed Current (mA)
PRELIMINARY
750
600
Exp.
450
300
150
0
-50
-25
0
Temperature (oC)
75
100
125
Temperature ( C)
25
Fig. 25.Output Low SC Pulsed Current vs. Temperature
"Low" ITRIP Bias Current (nA)
"High" ITRIP Input Bias Current (uA)
50
o
Fig. 24. Output High SC Pulsed Current vs. Temperature
20
15
10
5
Exp.
0
25
20
15
10
Exp.
5
0
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (oC)
25
50
75
100
125
o
Temperature ( C)
Fig. 26. "High" ITRIP Bias Current vs. Temperature
Fig. 27. "Low" ITRIP Bias Current vs. Temperature
8
25
20
6
Exp.
VOL,AMP (mV)
VOH,AMP (V)
25
4
2
0
15
Exp.
10
5
0
-50
-25
0
25
50
75
o
Temperature ( C)
Fig. 28. VOH,AMP vs. Temperature
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100
125
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Fig. 29. VOL,AMP vs. Temperature
13
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
5
Exp.
4
15
SR-,AMP (V/us)
SR+,AMP (V/us)
20
Exp.
10
5
0
3
2
1
0
-50
-25
0
25
50
75
100
125
-50
-25
0
25
o
50
75
100
125
o
Temperature ( C)
Temperature ( C)
Fig. 30. SR+,AMP vs. Temperature
Fig. 31. SR-,AMP vs. Temperature
5
12
4
10
8
Exp.
3
ISRC,AMP (mA)
ISNK,AMP (mA)
Exp.
2
1
0
6
4
2
0
-50
-25
0
25
50
75
100
125
-50
-25
0
o
25
50
75
100
125
100
125
o
Temperature ( C)
Temperature ( C)
Fig. 32. ISNK,AMP vs. Temperature
Fig. 33. ISRC,AMP vs. Temperature
15
20
12
16
Exp.
IO+,AMP (mA)
IO-,AMP (mA)
Exp.
9
6
3
12
8
4
0
0
-50
-25
0
25
50
75
o
Temperature ( C)
Fig. 34. IO-,AMP vs. Temperature
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100
125
-50
-25
0
25
50
75
o
Temperature ( C)
Fig. 35. IO+,AMP vs. Temperature
14
IRS2133/IRS2135 (J&S)PbF
90
125
70
100
50
75
Exp.
PSRR (dB)
VOS,AMP (mV)
PRELIMINARY
30
10
50
25
Exp.
0
-10
-50
-25
0
25
50
75
100
-50
125
-25
0
25
50
75
100
125
o
o
Temperature ( C)
Temperature ( C)
Fig. 36. VOS,AMP vs. Temperature
Fig. 37. PSRR vs. Temperature
150
125
CMRR (dB)
100
75
Exp.
50
25
0
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Fig. 38. CMRR vs. Temperature
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15
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
Case Outlines
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16
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
Case Outlines
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17
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
LOADED TAPE FEED DIRECTION
A
B
H
D
F
C
NOTE : CONTROLLING
DIM ENSION IN M M
E
G
CARRIER TAPE DIMENSION FOR
Metric
Code
Min
Max
A
11.90
12.10
B
3.90
4.10
C
23.70
24.30
D
11.40
11.60
E
10.80
11.00
F
18.20
18.40
G
1.50
n/a
H
1.50
1.60
28SOICW
Imperial
Min
Max
0.468
0.476
0.153
0.161
0.933
0.956
0.448
0.456
0.425
0.433
0.716
0.724
0.059
n/a
0.059
0.062
F
D
C
B
A
E
G
H
REEL DIMENSIONS FOR 28SOICW
Metric
Imperial
Code
Min
Max
Min
Max
A
329.60
330.25
12.976
13.001
B
20.95
21.45
0.824
0.844
C
12.80
13.20
0.503
0.519
D
1.95
2.45
0.767
0.096
E
98.00
102.00
3.858
4.015
F
n/a
30.40
n/a
1.196
G
26.50
29.10
1.04
1.145
H
24.40
26.40
0.96
1.039
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18
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
LOADED TAPE FEED DIRECTION
A
B
H
D
F
C
NOTE : CONTROLLING
DIM ENSION IN M M
E
G
CARRIER TAPE DIMENSION FOR
Metric
Code
Min
Max
A
23.90
24.10
B
3.90
4.10
C
31.70
32.30
D
14.10
14.30
E
17.90
18.10
F
17.90
18.10
G
2.00
n/a
H
1.50
1.60
44PLCC
Imperial
Min
Max
0.94
0.948
0.153
0.161
1.248
1.271
0.555
0.562
0.704
0.712
0.704
0.712
0.078
n/a
0.059
0.062
F
D
C
B
A
E
G
H
REEL DIMENSIONS FOR 44PLCC
Metric
Code
Min
Max
A
329.60
330.25
B
20.95
21.45
C
12.80
13.20
D
1.95
2.45
E
98.00
102.00
F
n/a
38.4
G
34.7
35.8
H
32.6
33.1
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Imperial
Min
Max
12.976
13.001
0.824
0.844
0.503
0.519
0.767
0.096
3.858
4.015
n/a
1.511
1.366
1.409
1.283
1.303
19
IRS2133/IRS2135 (J&S)PbF
PRELIMINARY
ORDER INFORMATION
28-Lead PDIP IRS2133PbF
28-Lead PDIP IRS2135PbF
28-Lead SOIC IRS2133SPbF
28-Lead SOIC IRS2135SPbF
44-Lead PLCC IRS2133JPbF
44-Lead PLCC IRS2135JPbF
28-Lead SOIC Tape & Reel IRS2133STRPbF
28-Lead SOIC Tape & Reel IRS2135STRPbF
44-Lead PLCC Tape & Reel IRS2133JTRPbF
44-Lead PLCC Tape & Reel IRS2135JTRPbF
WORLDWIDE HEADQUARTERS: 233 Kansas Street, El Segundo, CA 90245 Tel: (310) 252-7105
This part has been qualified per industrial level
http://www.irf.com Data and specifications subject to change without notice. 5/15/2006
www.irf.com
20
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