AD ADL5321 Rf driver amplifier Datasheet

2.3 GHz to 4.0 GHz
¼ Watt RF Driver Amplifier
ADL5321
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Operation: 2.3 GHz to 4.0 GHz
Gain of 14.0 dB at 2.6 GHz
OIP3 of 41.0 dBm at 2.6 GHz
P1dB of 25.7 dBm at 2.6 GHz
Noise figure: 4.0 dB at 2.6 GHz
Power supply voltage: 3.3 V to 5 V
Power supply current: 37 mA to 90 mA
Dynamically adjustable bias
No bias resistor required
Thermally efficient, MSL-1 rated SOT-89 package
Operating temperature range: −40°C to +105°C
ESD rating of ±2 kV (Class 3A)
GND
(2)
ADL5321
2
3
RFIN
GND
RFOUT
07307-001
BIAS
1
Figure 1.
APPLICATIONS
Wireless infrastructure
Automated test equipment
ISM/AMR applications
GENERAL DESCRIPTION
The ADL5321 also delivers excellent adjacent channel leakage
ratio (ACLR) vs. POUT. For output powers up to 10 dBm rms, the
ADL5321 adds very little distortion to the output spectrum. At
2.6 GHz, the ACLR is −59 dB and a relative constellation error of
−46.6 dB (<0.5% EVM) at an output power of 10 dBm rms.
–30
–40
ADJ CH LOW 2.6 GHZ
ALT CH LOW 2.6 GHZ
ADJ CH LOW 3.5 GHZ
ALT CH UP 3.5 GHZ
–50
ACLR (dB)
The ADL5321 incorporates a dynamically adjustable biasing
circuit that allows for the customization of OIP3 and P1dB
performance from 3.3 V to 5 V without the need for an external
bias resistor. This feature gives the designer the ability to tailor
driver amplifier performance to the specific needs of the design.
This feature also creates the opportunity for dynamic biasing of
the driver amplifier, where a variable supply is used to allow for
full 5 V biasing under large signal conditions and then can
reduce the supply voltage when signal levels are smaller and
lower power consumption is desirable. This scalability reduces
the need to evaluate and inventory multiple driver amplifiers
for different output power requirements from 22 dBm to
26 dBm output power levels.
–60
–70
Rev. D
–80
–90
–10
–5
0
5
10
15
POUT (dBm)
20
07307-125
The ADL5321 is also rated to operate across the wide temperature range of −40°C to +105°C for reliable performance in
designs that experience higher temperatures, such as power
amplifiers. The ¼ watt driver amplifier covers the 2.3 GHz to
4.0 GHz wide frequency range and only requires a few external
components to be tuned to a specific band within that wide
range. This high performance, broadband RF driver amplifier
is well suited for a variety of wired and wireless applications
including cellular infrastructure, ISM band power amplifiers,
defense equipment, and instrumentation equipment. A fully
populated evaluation board is available.
Figure 2. WiMAX 64 QAM, 10 MHz Bandwidth, Single Carrier
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Tel: 781.329.4700 ©2008–2014 Analog Devices, Inc. All rights reserved.
Technical Support
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ADL5321
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................7
Applications ....................................................................................... 1
High Temperature and 3.3 V Operation ..................................... 10
Functional Block Diagram .............................................................. 1
Basic Layout Connections ............................................................. 11
General Description ......................................................................... 1
Revision History ............................................................................... 2
Soldering Information and Recommended PCB Land
Pattern .......................................................................................... 11
Specifications..................................................................................... 3
Matching Procedure ................................................................... 12
Typical Scattering Parameters ..................................................... 4
WiMAX Operation .................................................................... 13
Absolute Maximum Ratings............................................................ 5
Evaluation Board ............................................................................ 14
Thermal Resistance ...................................................................... 5
Outline Dimensions ....................................................................... 16
ESD Caution .................................................................................. 5
Ordering Guide .......................................................................... 16
Pin Configuration and Function Descriptions ............................. 6
REVISION HISTORY
3/14—Rev. C to Rev. D
Changes to Figure 29 ...................................................................... 11
Updated Outline Dimensions ....................................................... 16
7/12—Rev. B to Rev. C
Change to Title .................................................................................. 1
Changes to Table 1 ............................................................................ 3
Replaced Table 2 ............................................................................... 4
Changes to Table 3 and Table 4 ............................................................... 5
Added Figure 20; Renumbered Sequentially ........................................ 9
Moved High Temperature and 3.3 V Operation Section and added
Figure 30 to Figure 32 ............................................................................. 10
Changes to Soldering Information and Recommended PCB
Land Pattern Section and changes to Figure 22 ................................. 11
6/10—Rev. A to Rev. B
Changes to General Description Section ...................................... 1
Changes to Operating Temperature Range, Table 3 .................... 4
Added High Temperature Operation Section, Figure 27, Figure 28,
and Figure 29 ................................................................................... 13
Changes to Ordering Guide .......................................................... 16
2/09—Rev. 0 to Rev. A
Updated Outline Dimensions ....................................................... 15
Changes to Ordering Guide .......................................................... 15
5/08—Revision 0: Initial Version
Rev. D | Page 2 of 16
Data Sheet
ADL5321
SPECIFICATIONS
TA = 25°C, unless otherwise noted.
Table 1.
Parameter
OVERALL FUNCTION
Frequency Range
FREQUENCY = 2.6 GHz
Gain 1
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point, P1dB
Output Third-Order Intercept, OIP3
Noise Figure
FREQUENCY = 3.5 GHz
Gain1
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point, P1dB
Output Third-Order Intercept, OIP3
Noise Figure
POWER INTERFACE
Supply Voltage
Supply Current
vs. Temperature
Power Dissipation
1
Conditions
Min
3.3 V
Typ
2.3
±100 MHz
−40°C ≤ TA ≤ +85°C
3.2 V to 3.4 V, 4.75 V to 5.25 V
∆f = 1 MHz, POUT = 5 dBm per tone
±100 MHz
−40°C ≤ TA ≤ +85°C
3.2 V to 3.4 V, 4.75 V to 5.25 V
∆f = 1 MHz, POUT = 5 dBm per tone
Max
Min
4.0
2.3
5V
Typ
Max
Unit
4.0
GHz
12.6
±0.3
±0.6
±0.16
22.0
31
3.5
13.2
14.0
±0.4
±0.7
±0.07
25.7
41
4.0
14.6
dB
dB
dB
dB
dBm
dBm
dB
10.4
±0.17
±0.7
±0.2
24.7
27
4.3
11.1
12.0
±0.05
±0.8
±0.07
25.7
38
4.9
12.9
dB
dB
dB
dB
dBm
dBm
dB
3.3
37
±4.0
122
4.5
5
90
±6.0
520
5.5
100
V
mA
mA
mW
Pin RFOUT
−40°C ≤ TA ≤ +85°C
VCC = 3.3 V, VCC = 5 V
Guaranteed maximum and minimum specified limits on this parameter are based on six sigma calculations.
Rev. D | Page 3 of 16
ADL5321
Data Sheet
TYPICAL SCATTERING PARAMETERS
VCC = 5 V and TA = 25°C; the effects of the test fixture have been de-embedded up to the pins of the device.
Table 2.
Frequency
(MHz)
2400
2450
2500
2550
2600
2650
2700
2750
2800
2850
2900
2950
3000
3050
3100
3150
3200
3250
3300
3350
3400
3450
3500
3550
3600
3650
3700
3750
3800
3850
3900
3950
4000
S11
Magnitude (dB)
−4.54
−4.65
−4.79
−4.92
−5.04
−5.17
−5.33
−5.50
−5.70
−5.94
−6.25
−6.61
−7.03
−7.53
−8.12
−8.78
−9.47
−10.07
−10.45
−10.45
−10.02
−9.25
−8.28
−7.27
−6.34
−5.51
−4.78
−4.14
−3.60
−3.16
−2.78
−2.45
−2.17
Angle (°)
129.60
126.65
123.62
120.44
117.31
114.43
111.78
109.21
106.84
104.85
103.23
101.91
101.06
100.92
101.82
104.04
107.91
113.72
121.55
130.87
140.04
147.61
153.06
156.76
159.01
160.11
160.43
160.36
160.07
159.62
158.95
158.24
157.64
S21
Magnitude (dB)
11.90
11.89
11.88
11.87
11.85
11.83
11.80
11.77
11.74
11.71
11.66
11.62
11.56
11.50
11.40
11.29
11.15
10.97
10.76
10.49
10.17
9.80
9.39
8.92
8.39
7.83
7.26
6.66
6.04
5.43
4.82
4.20
3.60
Angle (°)
21.92
18.30
14.57
10.68
6.80
2.90
−1.06
−5.17
−9.36
−13.64
−18.05
−22.58
−27.18
−31.98
−36.95
−42.09
−47.34
−52.74
−58.29
−63.95
−69.56
−75.16
−80.70
−86.04
−91.20
−96.07
−100.64
−104.97
−108.96
−112.61
−116.07
−119.27
−122.18
Rev. D | Page 4 of 16
S12
Magnitude (dB)
−26.72
-26.63
-26.55
−26.48
−26.42
−26.37
−26.34
−26.31
−26.30
−26.30
−26.31
−26.34
−26.37
−26.44
−26.55
−26.68
−26.85
−27.06
−27.32
−27.65
−28.05
−28.49
−29.00
−29.58
−30.20
−30.88
−31.57
−32.29
−33.02
−33.74
−34.44
−35.12
−35.74
Angle (°)
−33.83
−36.64
−39.62
−42.70
−45.95
−49.25
−52.65
−56.16
−59.84
−63.64
−67.63
−71.77
−76.13
−80.76
−85.61
−90.69
−95.96
−101.50
−107.30
−113.32
−119.45
−125.70
−132.04
−138.45
−144.79
−151.12
−157.36
−163.69
−170.01
−176.34
177.21
170.60
163.89
S22
Magnitude (dB)
−8.18
−8.27
−8.37
−8.45
−8.44
−8.39
−8.33
−8.15
−7.90
−7.63
−7.31
−6.88
−6.44
−6.00
−5.53
−5.03
−4.56
−4.08
−3.61
−3.19
−2.80
−2.43
−2.13
−1.89
−1.66
−1.48
−1.37
−1.27
−1.19
−1.14
−1.12
−1.10
−1.09
Angle (°)
−166.39
−169.02
−171.83
−175.32
−179.11
177.31
173.43
169.22
165.46
161.87
158.01
154.58
151.64
148.53
145.65
143.14
140.74
138.36
136.16
133.97
131.77
129.85
128.08
126.22
124.51
123.23
122.16
121.07
120.25
119.79
119.31
118.94
118.86
Data Sheet
ADL5321
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 3.
Parameter
Supply Voltage, VCC
Input Power, 50 Ω Impedance
Internal Power Dissipation, Paddle Soldered
θJC, Junction to Paddle
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Rating
6.5 V
20 dBm
683 mW
28.5°C/W
150°C
−40°C to +105°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 4 lists the junction-to-air thermal resistance (θJA) and the
junction-to-paddle thermal resistance (θJC) for the ADL5321.
Table 4. Thermal Resistance
Package Type
3-Lead SOT-89
1
θJA1
35
θJC2
11
Unit
°C/W
Measured on Analog Devices evaluation board. For more information about
board layout, see the Soldering Information and Recommended PCB Land
Pattern section.
2
Based on simulation with JEDEC standard JESD51.
ESD CAUTION
Rev. D | Page 5 of 16
ADL5321
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
RFIN 1
ADL5321
TOP VIEW
(2) GND
(Not to Scale)
RFOUT 3
07307-002
GND 2
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
1
2
3
Exposed Paddle
Mnemonic
RFIN
GND
RFOUT
Description
RF Input. This pin requires a dc blocking capacitor.
Ground. Connect this pin to a low impedance ground plane.
RF Output and Supply Voltage. DC bias is provided to this pin through an inductor that is connected
to the external power supply. RF path requires a dc blocking capacitor.
Expose Paddle. Internally connected to GND. Solder to a low impedance ground plane.
Rev. D | Page 6 of 16
Data Sheet
ADL5321
TYPICAL PERFORMANCE CHARACTERISTICS
42
45
30
OIP3 (–40°C)
40
41
35
40
OIP3 (+85°C)
OIP3 (dBm)
P1dB
25
20
GAIN
15
28
39
27
38
P1dB (–40°C)
37
26
36
10
2.525
2.550 2.575 2.600 2.625
FREQUENCY (GHz)
2.650
2.675
34
2.500
2.700
Figure 4. Gain, P1dB, OIP3, and Noise Figure vs. Frequency,
2.5 GHz to 2.7 GHz
2.525
25
P1dB (+85°C)
P1dB (+25°C)
35
07307-003
NOISE FIGURE
5
2.550 2.575 2.600 2.625
FREQUENCY (GHz)
2.650
2.675
46
15.5
44
15.0
42
–40°C
2.6GHz
OIP3 (dBm)
14.5
GAIN (dB)
24
2.700
Figure 7. OIP3 and P1dB vs. Frequency and Temperature,
2.5 GHz to 2.7 GHz
16.0
+25°C
14.0
13.5
+85°C
40
38
2.5GHz
36
13.0
2.7GHz
34
12.5
2.525
2.550
2.575 2.600 2.625
FREQUENCY (GHz)
2.650
2.675
30
–4
2.700
S12
0
6.0
–2
5.5
–4
5.0
–24.6
–6
–24.8
–25.0
–8
S11
–10
S22
NOISE FIGURE (dB)
–24.2
–25.4
0
2
4
6
8
10
12
14
16
18
20
22
Figure 8. OIP3 vs. POUT and Frequency, 2.5 GHz to 2.7 GHz
S11 (dB) AND S22 (dB)
–24.0
–25.2
–2
POUT (dBm)
Figure 5. Gain vs. Frequency and Temperature, 2.5 GHz to 2.7 GHz
–24.4
07307-007
32
07307-004
12.0
11.5
2.500
P1dB (dBm)
30
0
2.500
+85°C
4.5
+25°C
4.0
3.5
–12
3.0
–14
2.5
–40°C
–25.8
–26.0
2.2
2.3
2.4
2.5
2.6
2.7
FREQUENCY (GHz)
2.8
2.9
–16
Figure 6. Reverse Isolation (S12), Input Return Loss (S11), and
Output Return Loss (S22) vs. Frequency, 2.2 GHz to 2.9 GHz
2.0
2.2
2.3
2.4
2.5
2.6
FREQUENCY (GHz)
2.7
2.8
2.9
07307-008
–25.6
07307-005
S12 (dB)
29
OIP3 (+25°C)
07307-006
GAIN, P1dB, OIP3, NOISE FIGURE (dB, dBm)
OIP3 (5dBm)
Figure 9. Noise Figure vs. Frequency and Temperature, 2.2 GHz to 2.9 GHz
Rev. D | Page 7 of 16
ADL5321
Data Sheet
42
40
29
OIP3 (–40°C)
39
OIP3 (dBM)
P1dB
25
20
15
28
38
OIP3 (+85°C)
OIP3 (+25°C)
37
36
27
P1dB (–40°C)
26
35
GAIN
10
34
P1dB (+25°C)
NOISE FIGURE
5
3.425
3.450
3.475 3.500 3.525
FREQUENCY (GHz)
3.550
3.575
3.600
P1dB (dBm)
30
25
P1dB (+85°C)
07307-012
35
0
3.400
30
41
OIP3 (5dBm)
40
33
07307-009
GAIN, P1dB, OIP3, NOISE FIGURE (dB, dBm)
45
32
3.400
Figure 10. Gain, P1dB, OIP3, and Noise Figure vs. Frequency,
3.4 GHz to 3.6 GHz
3.425
3.450
3.475 3.500 3.525
FREQUENCY (MHz)
3.550
3.575
24
3.600
Figure 13. OIP3 and P1dB vs. Frequency and Temperature,
3.4 GHz to 3.6 GHz
14.0
42
3.4GHz
13.5
40
13.0
–40°C
OIP3 (dBm)
GAIN (dB)
38
12.5
+25°C
12.0
11.5
3.5GHz
36
3.6GHz
34
+85°C
11.0
32
3.425
3.450
3.475 3.500 3.525
FREQUENCY (GHz)
3.550
3.575
3.600
30
–4
Figure 11. Gain vs. Frequency and Temperature, 3.4 GHz to 3.6 GHz
0
2
4
6
8 10 12
POUT (dBm)
14
16
18
20
22
8.5
8.0
–26
–28
–10
S11
–29
–15
–30
–31
–20
–32
7.5
7.0
NOISE FIGURE (dB)
–27
–5
S11 (dB) AND S22 (dB)
S22
S12
6.5
+85°C
6.0
5.5
+25°C
5.0
4.5
–40°C
4.0
–25
3.5
–34
–35
3.2
3.3
3.4
3.5
3.6
3.7
FREQUENCY (MHz)
3.8
3.9
–30
4.0
Figure 12. Reverse Isolation (S12), Input Return Loss (S11), and
Output Return Loss (S22) vs. Frequency, 3.2 GHz to 4.0 GHz
3.0
2.5
3.2
3.3
3.4
3.5
3.6
3.7
FREQUENCY (GHz)
3.8
3.9
Figure 15. Noise Figure vs. Frequency and Temperature,
3.2 GHz to 4.0 GHz
Rev. D | Page 8 of 16
4.0
07307-014
–33
07307-011
S12 (dB)
–2
Figure 14. OIP3 vs. POUT and Frequency, 3.4 GHz to 3.6 GHz
0
–25
07307-013
10.0
3.400
07307-010
10.5
ADL5321
30
25
25
20
15
20
15
42.6
OIP3 (dBM)
07307-015
42.4
42.0
42.2
41.8
41.4
41.6
41.2
40.8
40.2
41.0
0
40.6
0
40.4
5
40.0
5
39.8
10
39.6
10
3.76 3.80 3.84 3.88 3.92 3.96 4.00 4.04 4.08 4.12 4.16
NF (dB)
Figure 16. OIP3 Distribution at 2.6 GHz
07307-018
PERCENTAGE (%)
30
39.4
PERCENTAGE (%)
Data Sheet
Figure 19. Noise Figure (NF) Distribution at 2.6 GHz
35
110
105
25
SUPPLY CURRENT (mA)
PERCENTAGE (%)
30
20
15
10
100
5.25V
95
90
5.0V
85
4.75V
80
5
P1dB (dBM)
Figure 17. P1dB Distribution at 2.6 GHz
0
10 20 30 40
TEMPERATURE (°C)
50
60
70
80
07307-019
70
–40 –30 –20 –10
07307-016
27.0
26.8
26.6
26.4
26.2
26.0
25.8
25.6
25.4
25.2
25.0
24.8
24.6
75
0
Figure 20. Supply Current vs. Temperature and Supply Voltage
(Using 2.6 GHz Matching Components)
220
35
200
30
SUPPLY CUURENT (mA)
25
20
15
10
160
140
120
100
5V
80
60
14.25
20
–6 –4 –2 0
07307-017
GAIN (dB)
14.20
14.15
14.10
14.05
14.00
13.95
13.90
13.85
13.80
13.75
0
3.3V
40
2
4
6
8 10 12 14 16 18 20 22 24 26 28
POUT (dBm)
Figure 21. Supply Current vs. POUT 3.3 V and 5 V
(2.6 GHz Matching Components)
Figure 18. Gain Distribution at 2.6 GHz
Rev. D | Page 9 of 16
07307-120
5
13.70
PERCENTAGE (%)
180
ADL5321
Data Sheet
HIGH TEMPERATURE AND 3.3 V OPERATION
The ADL5321 has excellent performance at temperatures above 85°C. At 105°C, the gain and P1dB decrease by 0.2 dB, the OIP3 decreases by
0.1 dB, and the noise figure increases by 0.31 dB compared with the data at 85°C. Figure 25 through Figure 27 show the performance at 105°C.
16.0
15.0
15.5
14.5
25°C
85°C
105°C
15.0
14.0
13.5
–40°C
GAIN (dB)
GAIN (dB)
14.5
14.0
13.5
13.0
25°C
12.5
85°C
12.0
13.0
105°C
11.5
12.5
11.0
12.0
2.575
2.600
2.625
2.650
2.675
2.700
FREQUENCY (GHz)
10.0
2.500
2.525
2.555
2.575
2.600
2.625
2.650
2.675
2.700
FREQUENCY (GHz)
Figure 22. Gain vs. Frequency and Temperature, 5 V Supply, 2.5 GHz to 2.7 GHz
25°C
85°C
105°C
27
33
31
OIP3 (+105°C)
OIP3 (+85°C)
32
26
OIP3
30
39
29
38
28
37
27
31
30
26
35
25
24
29
23
P1dB (25°C)
P1dB (–40°C)
P1dB
36
25
OIP3 (–40°C)
OIP3 (+25°C)
OIP3 (dBm)
40
P1dB (dBm)
41
OIP3 (dBm)
Figure 25. Gain vs. Frequency and Temperature, 3.3 V Supply, 2.5 GHz to 2.7 GHz
32
42
07307-130
2.550
28
P1dB (dBm)
2.525
07307-030
10.5
11.5
2.500
22
27
21
P1dB (+85°C)
P1dB (+105°C)
2.550
2.575
2.600
2.625
2.650
2.675
24
2.700
26
2.500
FREQUENCY (GHz)
2.525
2.555
2.575
2.600
2.625
2.650
2.675
20
2.700
07307-131
2.525
07307-031
34
2.500
FREQUENCY (GHz)
Figure 26. OIP3 and P1dB vs. Frequency and Temperature,
3.3 V Supply, 2.5 GHz to 2.7 GHz
Figure 23. OIP3 and P1dB vs. Frequency and Temperature,
5 V Supply, 2.5 GHz to 2.7 GHz
7
5.5
6
NOISE FIGURE (dB)
4.5
4.0
2.55
2.60
2.65
FREQUENCY (GHz)
105°C
85°C
25°C
4
–40°C
3
2
25°C
85°C
105°C
3.0
2.50
5
2.70
Figure 24. Noise Figure vs. Frequency and Temperature,
5 V Supply, 2.5 GHz to 2.7 GHz
1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
FREQUENCY (GHz)
Figure 27. Noise Figure vs. Frequency and Temperature,
3.3 V Supply 2.5 GHz to 2.7 GHz
Rev. D | Page 10 of 16
2.9
07307-132
3.5
07307-032
NOISE FIGURE (dB)
5.0
Data Sheet
ADL5321
BASIC LAYOUT CONNECTIONS
The basic connections for operating the ADL5321 are shown
in Figure 28.
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Table 6 lists the required matching components. Capacitors
C1, C2, C3, C4, and C7 are Murata GRM155 series (0402 size)
and Inductor L1 is a Coilcraft 0603CS series (0603 size). For all
frequency bands, the placement of C3 and C7 is critical. From
2500 MHz to 2700 MHz, the placement of C1 is also important.
Table 7 lists the recommended component placement for
various frequencies.
Figure 29 shows the recommended land pattern for the ADL5321.
To minimize thermal impedance, the exposed paddle on the
SOT-89 package underside is soldered down to a ground plane
along with (GND) Pin 2. If multiple ground layers exist, they
should be stitched together using vias. For more information on
land pattern design and layout, refer to the AN-772 Application
Note, A Design and Manufacturing Guide for the Lead Frame
Chip Scale Package (LFCSP).
A 5 V dc bias is supplied through L1 that is connected to RFOUT
(Pin 3). In addition to C4, 10 nF and 10 μF power supply
decoupling capacitors are also required. The typical current
consumption for the ADL5321 is 90 mA.
GND
This land pattern, on the ADL5321 evaluation board, provides
a measured thermal resistance (θJA) of 35°C/W. To measure θJA,
the temperature at the top of the SOT-89 package is found with
an IR temperature gun. Thermal simulation suggests a junction
temperature 10°C higher than the top of package temperature.
With additional ambient temperature and I/O power measurements, θJA could be determined.
VCC
(2)
GND
C6 10µF
C5 10nF
1.80mm
C41
ADL5321
0.635mm
λ12
1
2
RFOUT
C11
GND
RFIN
RFIN
L11
3
λ2 2
λ 32
C71
λ4 2
C21
0.762mm
RFOUT
C31
07307-026
3.48mm
1SEE TABLE 5 FOR FREQUENCY SPECIFIC COMPONENTS.
2SEE TABLE 6 FOR RECOMMENDED COMPONENT SPACING.
0.20mm
5.37mm
Figure 28. Basic Connections
0.86mm
0.62mm
1.27mm
07307-051
0.86mm
1.50mm
3.00mm
Figure 29. Recommended Land Pattern
Table 6. Recommended Components for Basic Connections
Frequency (MHz)
2500 to 2700
3400 to 3850
C1 (pF)
1.0
10
C2 (pF)
10
10
C3 (pF)
1.2
1.2
C4 (pF)
10
10
C7 (pF)
Open
1.0
L1 (nH)
9.5
9.5
Table 7. Matching Component Spacing
Frequency (MHz)
2500 to 2700
3400 to 3850
λ1 (mils)
240
90
λ2 (mils)
75
35
Rev. D | Page 11 of 16
λ3 (mils)
89
40
λ4 (mils)
325
416
ADL5321
Data Sheet
MATCHING PROCEDURE
FIXED LOAD PULL
FREQ = 2.6000 GHz
The ADL5321 is designed to achieve excellent gain and IP3
performance. To achieve this, both input and output matching
networks must present specific impedance to the device. The
matching components listed in Table 6 were chosen to provide
−14 dB input return loss while maximizing OIP3. The load-pull
plots (see Figure 30, Figure 31, and Figure 32) show the load
impedance points on the Smith chart where optimum OIP3,
gain, and output power can be achieved. These load impedance
values (that is, the impedance that the device sees when looking
into the output matching network) are listed in Table 8 and Table 9
for maximum gain and maximum OIP3, respectively. The contours
show how each parameter degrades as it is moved away from
the optimum point.
IP3
MAX = 41.70dBm
AT 0.4705< 86.63
10 CONTOURS, 1.00dBm STEP
(32.00 TO 41.00dBm)
POUT MAX = 14.16dBm
AT 0.6100< 136.24
10 CONTOURS, 1.00dBm STEP
(5.00 TO 14.00dBm)
GT
MAX = 15.02dBm
AT 0.6100< 136.24
10 CONTOURS, 1.00dBm STEP
(6.00 TO 15.00dB)
0.404< 93.05
Figure 30. Load-Pull Contours, 2600 MHz
FIXED LOAD PULL
FREQ = 3.5000 GHz
POUT MAX = 14.96dBm
AT 0.7686< 162.58
10 CONTOURS, 1.00dBm STEP
(5.00 TO 14.00dBm)
GT
MAX = 14.02dBm
AT 0.7686< 162.58
10 CONTOURS, 1.00dBm STEP
(5.00 TO 14.00dB)
0.875< –147.48
2.
3.
4.
Connect the evaluation board to a vector network analyzer
so that input and output return loss can be viewed simultaneously.
Starting with the recommended values and positions for
C3 and C7, adjust the positions of these capacitors along
the transmission line until the return loss and gain are
acceptable. Push-down capacitors that are mounted on
small sticks can be used in this case as an alternative to
soldering. If moving the component positions does not
yield satisfactory results, then the values of C3 and C7
should be increased or decreased (most likely increased
in this case because the user is tuning for a lower frequency).
Repeat the process.
07307-023
SPECS: OFF
Figure 31. Load-Pull Contours, 3500 MHz
For example, to optimize the ADL5321 for optimum OIP3 and
gain at 2300 MHz, use the following steps:
Install the recommended tuning components for a 2500 MHz
to 2700 MHz tuning band, but do not install C3 and C7.
LOAD
IP3
MAX = 41.37dBm
AT 0.6911< 142.11
10 CONTOURS, 1.00dBm STEP
(32.00 TO 41.00dBm)
To adjust the output match for operation at a different frequency or
if a different trade-off between OIP3, gain, and output impedance
is desired, the following procedure is recommended.
1.
07307-022
SPECS: OFF
FIXED LOAD PULL
FREQ = 3.6000 GHz
LOAD
IP3
MAX = 41.29dBm
AT 0.7070< 140.65
10 CONTOURS, 1.00dBm STEP
(32.00 TO 41.00dBm)
POUT MAX = 15.63dBm
AT 0.7057< 161.81
10 CONTOURS, 1.00dBm STEP
(6.00 TO 15.00dBm)
GT
MAX = 13.44dBm
AT 0.7057< 161.81
10 CONTOURS, 1.00dBm STEP
(4.00 TO 13.00dB)
SPECS: OFF
Once the desired gain and return loss are realized, OIP3
should be measured. It may be necessary to go back and
forth between return loss/gain and OIP3 measurements
(probably compromising most on output return loss) until
an acceptable compromise is achieved.
Rev. D | Page 12 of 16
07307-024
From the data shown in Table 8 and Table 9, it becomes clear that
maximum gain and maximum OIP3 do not occur at the same
impedance. This can also be seen on the load-pull contours in
Figure 30 through Figure 32. Therefore, output matching generally
involves compromising between gain and OIP3. In addition, the
load-pull plots demonstrate that the quality of the output
impedance match must be compromised to optimize gain and/
or OIP3. In most applications where line lengths are short and
where the next device in the signal chain presents a low input
return loss, compromising on the output match is acceptable.
LOAD
Figure 32. Load-Pull Contours, 3600 MHz
Data Sheet
ADL5321
–30
Table 8. Load Conditions for GainMAX
Gain MAX (dB)
15.02
14.02
13.44
Table 9. Load Conditions for OIP3MAX
Frequency (MHz)
2600
3500
3600
ΓLoad
(Magnitude)
0.4705
0.6911
0.7070
ΓLoad (°)
86.63
142.11
140.65
–50
–60
–70
IP3 MAX (dBm)
41.7
41.37
41.29
–80
–90
–10
–5
0
5
10
15
07307-025
ΓLoad (°)
136.24
162.58
161.81
ADJ CH LOW 2.6 GHZ
ALT CH LOW 2.6 GHZ
ADJ CH LOW 3.5 GHZ
ALT CH UP 3.5 GHZ
–40
ACLR (dB)
Frequency (MHz)
2600
3500
3600
ΓLoad
(Magnitude)
0.6100
0.7686
0.7057
20
POUT (dBm)
Figure 33. ACLR vs. POUT, WiMAX 64 QAM, 10 MHz Bandwidth, Single Carrier
Figure 33 shows a plot of adjacent channel leakage ratio (ACLR)
vs. POUT for the ADL5321. The signal type used is a WiMAX,
64 QAM, single carrier with a 10 MHz channel bandwidth. This
signal is generated by a WiMAX-enabled source and followed
with suitable band-pass filtering. The band-pass filter helps reduce
the adjacent and alternate channel noise and distortion out of
the signal generator down to −63 dB in the adjacent channels
and −76 dB in the alternate channels at 2.6 GHz and −60 dB
at 3.5 GHz.
Below an output power of 7 dBm, measured ADL5321 output
spectral performance is limited by the signal quality from the
signal source used (−63 dB at 2.6 GHz and −60 dB at 3.5 GHz).
At high power operation, input power to the ADL5321 is 1 dBm
for 15 dBm output power and the source ACLR is −60.2 dB. It
is expected that with a better signal source, the ADL5321 output
spectral quality improves further, especially at output power
levels ≤10 dBm. For instance, the ADL5373 quadrature modulator
measured ACLR is −69 dB for an output power of −10 dBm.
0
–5
–10
RCE/EVM (dB)
–15
–20
–25
–30
3.5 GHz
2.6 GHz
–35
–40
07307-126
WiMAX OPERATION
–45
–50
–20
–15
–10
–5
0
5
10
15
20
POUT (dBm)
Figure 34. RCE/EVM vs. POUT, WiMAX 64 QAM, 10 MHz Bandwidth, Single Carrier
For output powers up to 10 dBm rms, the ADL5321 adds very
little distortion to the output spectrum. At 2.6 GHz, the ACLR is
−59 dB and a relative constellation error of −46.6 dB (<0.5% EVM)
at an output power of 10 dBm rms.
Rev. D | Page 13 of 16
ADL5321
Data Sheet
EVALUATION BOARD
are also provided in Table 10. The recommended placement for
these components is provided in Table 11. The inputs and outputs
should be ac-coupled with appropriately sized capacitors. DC
bias is provided to the amplifier via an inductor connected to
the RFOUT pin. A bias voltage of 5 V is recommended.
The schematic of the ADL5321 evaluation board is shown in
Figure 35. This evaluation board uses 25 mil wide traces and is
made from IS410 material (lead-free version of FR4). The
evaluation board comes tuned for operation in the 2500 MHz to
2700 MHz tuning band. Tuning options for other frequency bands
GND
VCC
(2)
GND
C6 10µF
C5 10nF
C4 10pF
2
L1
9.5nH
3
λ4
λ3
λ2
C7
OPEN
C2
10pF
C3
1.2pF
RFOUT
07307-127
1
RFOUT
λ1
GND
RFIN
C1
1.0pF
RFIN
ADL5321
Figure 35. Evaluation Board, 2500 MHz to 2700 MHz
Table 10. Evaluation Board Configuration Options
Component
C1, C2
Function
AC coupling capacitors
C4, C5, C6
Power supply bypassing capacitors
L1
C3, C7
DC bias inductor
Tuning capacitors
VCC, GND
Power supply connections
2500 MHz to 2700 MHz
C1 = 0402, 1.0 pF
C2 = 0402, 10 pF
C4 = 0603, 10 pF
C5 = 0603, 10 nF
C6 = 1206, 10 µF
0603, 9.5 nH
C3 = 0402, 1.2 pF
C7 = 0402, open
VCC, red test loop
GND, black test loop
3400 MHz to 3850 MHz
C1 = 0402, 10 pF
C2 = 0402, 10 pF
C4 = 0603, 10 pF
C5 = 0603, 10 nF
C6 = 1206, 10 µF
0603, 9.5 nH
C3 = 0402, 1.2 pF
C7 = 0402, 1.0 pF
VCC, red test loop
GND, black test loop
Table 11. Recommended Component Spacing on Evaluation Board
Frequency (MHz)
2500 to 2700
3400 to 3850
λ1 (mils)
240
90
λ2 (mils)
75
35
Rev. D | Page 14 of 16
λ3 (mils)
89
40
λ4 (mils)
325
416
Data Sheet
ADL5321
10µF
10µF
10 nF
10 pF
9.5 nH
1
2
3
10 pF
C2
10pF
C1
10 pF
C3
1.2 pF
9.5 nH
1
2
3
C2
10 pF
C3
1.2 pF
C7
07307-028
07307-029
C1
1.0 pF
10 nF
(2)
(2)
Figure 36. Evaluation Board Layout and Default Component Placement for
Operation from 2500 MHz to 2700 MHz (Note: C7 Is Not Placed)
Rev. D | Page 15 of 16
Figure 37. Evaluation Board Layout and Component Placement for
Operation from 3400 MHz to 3850 MHz
ADL5321
Data Sheet
OUTLINE DIMENSIONS
1.75
1.55
(2)
4.25
3.94
1
2
2.413
2.380
2.337
2.60
2.30
3
1.20
0.75
1.50 TYP
1.270
1.252
1.219
BOTTOM VIEW
0.635
0.569
0.508
3.00 TYP
TOP VIEW
2.29
2.14
4.60
4.40
1.60
1.40
0.44
0.35
PKG-003480
0.52
0.32
COMPLIANT TO JEDEC STANDARDS TO-243
09-12-2013-C
END VIEW
0.56
0.36
Figure 38. 3-Lead Small Outline Transistor Package [SOT-89]
(RK-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADL5321ARKZ-R7
ADL5321-EVALZ
1
Temperature Range
−40°C to +105°C
Package Description
3-Lead SOT-89, 7“ Tape and Reel
Evaluation Board
Z = RoHS Compliant Part.
©2008–2014 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07307-0-3/14(D)
Rev. D | Page 16 of 16
Package Option
RK-3