TI L293DSP883C Quadruple half-h driver Datasheet

 SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
D Featuring Unitrode L293 and L293D
D
D
D
D
D
D
D
D
D
Products Now From Texas Instruments
Wide Supply-Voltage Range: 4.5 V to 36 V
Separate Input-Logic Supply
Internal ESD Protection
Thermal Shutdown
High-Noise-Immunity Inputs
Functionally Similar to SGS L293 and
SGS L293D
Output Current 1 A Per Channel
(600 mA for L293D)
Peak Output Current 2 A Per Channel
(1.2 A for L293D)
Output Clamp Diodes for Inductive
Transient Suppression (L293D)
L293 . . . N OR NE PACKAGE
L293D . . . NE PACKAGE
(TOP VIEW)
1,2EN
1A
1Y
HEAT SINK AND
GROUND
16
2
15
3
14
4
13
5
12
2Y
2A
6
11
7
10
VCC2
8
9
VCC1
4A
4Y
HEAT SINK AND
GROUND
3Y
3A
3,4EN
L293 . . . DWP PACKAGE
(TOP VIEW)
1,2EN
1A
1Y
NC
NC
NC
description/ordering information
The L293 and L293D are quadruple high-current
half-H drivers. The L293 is designed to provide
bidirectional drive currents of up to 1 A at voltages
from 4.5 V to 36 V. The L293D is designed to
provide bidirectional drive currents of up to
600-mA at voltages from 4.5 V to 36 V. Both
devices are designed to drive inductive loads such
as relays, solenoids, dc and bipolar stepping
motors, as well as other high-current/high-voltage
loads in positive-supply applications.
1
HEAT SINK AND
GROUND
1
28
2
27
3
26
4
25
5
24
6
23
7
22
8
21
9
20
NC
NC
2Y
2A
10
19
11
18
12
17
13
16
VCC2
14
15
VCC1
4A
4Y
NC
NC
NC
HEAT SINK AND
GROUND
NC
NC
3Y
3A
3,4EN
All inputs are TTL compatible. Each output is a
complete totem-pole drive circuit, with a
Darlington transistor sink and a pseudoDarlington source. Drivers are enabled in pairs, with drivers 1 and 2 enabled by 1,2EN and drivers 3 and 4
enabled by 3,4EN. When an enable input is high, the associated drivers are enabled, and their outputs are active
and in phase with their inputs. When the enable input is low, those drivers are disabled, and their outputs are
off and in the high-impedance state. With the proper data inputs, each pair of drivers forms a full-H (or bridge)
reversible drive suitable for solenoid or motor applications.
ORDERING INFORMATION
0°C to 70°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
TOP-SIDE
MARKING
HSOP (DWP)
Tube of 20
L293DWP
L293DWP
PDIP (N)
Tube of 25
L293N
L293N
Tube of 25
L293NE
L293NE
Tube of 25
L293DNE
PDIP (NE)
L293DNE
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2004, Texas Instruments Incorporated
!"# $"%&! '#(
'"! ! $#!! $# )# # #* "#
'' +,( '"! $!#- '# #!#&, !&"'#
#- && $##(
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SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
description/ordering information (continued)
On the L293, external high-speed output clamp diodes should be used for inductive transient suppression.
A VCC1 terminal, separate from VCC2, is provided for the logic inputs to minimize device power dissipation.
The L293and L293D are characterized for operation from 0°C to 70°C.
block diagram
VCC1
1
0
1
0
1
16
2
15
1
M
14
4
13
5
12
6
11
3
7
10
9
8
VCC2
NOTE: Output diodes are internal in L293D.
FUNCTION TABLE
(each driver)
INPUTS†
OUTPUT
A
EN
Y
H
H
H
L
H
L
X
L
Z
H = high level, L = low level, X = irrelevant,
Z = high impedance (off)
† In the thermal shutdown mode, the output is
in the high-impedance state, regardless of
the input levels.
2
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M
4
3
2
1
0
1
0
• DALLAS, TEXAS 75265
1
0
1
0
M
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
logic diagram
1A
1,2EN
2A
3A
3,4EN
4A
2
1
7
10
9
15
ÁÁ
ÁÁ
ÁÁ
ÁÁ
ÁÁ
ÁÁ
ÁÁ
ÁÁ
ÁÁ
3
6
11
14
1Y
2Y
3Y
4Y
schematics of inputs and outputs (L293)
EQUIVALENT OF EACH INPUT
TYPICAL OF ALL OUTPUTS
VCC2
VCC1
Current
Source
Input
Output
GND
GND
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SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
schematics of inputs and outputs (L293D)
EQUIVALENT OF EACH INPUT
TYPICAL OF ALL OUTPUTS
VCC2
VCC1
Current
Source
Output
Input
GND
GND
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V
Output supply voltage, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −3 V to VCC2 + 3 V
Peak output current, IO (nonrepetitive, t ≤ 5 ms): L293 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±2 A
Peak output current, IO (nonrepetitive, t ≤ 100 µs): L293D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 1.2 A
Continuous output current, IO: L293 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 A
Continuous output current, IO: L293D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 600 mA
Package thermal impedance, θJA (see Notes 2 and 3): DWP package . . . . . . . . . . . . . . . . . . . . . . . TBD°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NE package . . . . . . . . . . . . . . . . . . . . . . . . . TBD°C/W
Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. Maximum power dissipation is a function of TJ(max), qJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/qJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4
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recommended operating conditions
MIN
VCC1
VCC2
VCC1 ≤ 7 V
Supply voltage
VIH
High-level input voltage
VIL
Low-level output voltage
VCC1 ≥ 7 V
MAX
4.5
7
VCC1
2.3
36
2.3
−0.3†
UNIT
V
VCC1
7
V
1.5
V
V
TA
Operating free-air temperature
0
70
°C
† The algebraic convention, in which the least positive (most negative) designated minimum, is used in this data sheet for logic voltage levels.
electrical characteristics, VCC1 = 5 V, VCC2 = 24 V, TA = 25°C
PARAMETER
TEST CONDITIONS
VOH
High-level output voltage
L293: IOH = −1 A
L293D: IOH = − 0.6 A
VOL
Low-level output voltage
L293: IOL = 1 A
L293D: IOL = 0.6 A
VOKH
VOKL
High-level output clamp voltage
L293D: IOK = − 0.6 A
Low-level output clamp voltage
L293D: IOK = 0.6 A
IIH
High-level input current
IIL
Low-level input current
MIN
TYP
VCC2 − 1.8
VCC2 − 1.4
1.2
ICC1
Logic supply current
IO = 0
10
−3
−10
−2
−100
All outputs at high level
13
22
All outputs at low level
35
60
8
24
All outputs at high level
14
24
All outputs at low level
2
6
All outputs at high impedance
2
4
All outputs at high impedance
ICC2
Output supply current
IO = 0
V
100
VI = 0
V
V
0.2
A
EN
1.8
0.2
VI = 7 V
UNIT
V
VCC2 + 1.3
1.3
A
EN
MAX
µA
A
µA
A
mA
mA
switching characteristics, VCC1 = 5 V, VCC2 = 24 V, TA = 25°C
L293NE, L293DNE
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPLH
tPHL
Propagation delay time, low-to-high-level output from A input
800
ns
Propagation delay time, high-to-low-level output from A input
400
ns
tTLH
tTHL
Transition time, low-to-high-level output
300
ns
300
ns
CL = 30 pF,
See Figure 1
Transition time, high-to-low-level output
switching characteristics, VCC1 = 5 V, VCC2 = 24 V, TA = 25°C
PARAMETER
TEST CONDITIONS
L293DWP, L293N
L293DN
MIN
TYP
UNIT
MAX
tPLH
tPHL
Propagation delay time, low-to-high-level output from A input
750
ns
Propagation delay time, high-to-low-level output from A input
200
ns
tTLH
tTHL
Transition time, low-to-high-level output
100
ns
350
ns
CL = 30 pF,
See Figure 1
Transition time, high-to-low-level output
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SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
PARAMETER MEASUREMENT INFORMATION
tf
tr
Input
5 V 24 V
Input
50%
50%
10%
Pulse
Generator
(see Note B)
VCC1 VCC2
10%
0
tw
A
tPLH
tPHL
Y
3V
EN
Output
CL = 30 pF
(see Note A)
90%
90%
50%
50%
10%
tTHL
TEST CIRCUIT
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: tr ≤ 10 ns, tf ≤ 10 ns, tw = 10 µs, PRR = 5 kHz, ZO = 50 Ω.
Figure 1. Test Circuit and Voltage Waveforms
• DALLAS, TEXAS 75265
VOL
tTLH
VOLTAGE WAVEFORMS
POST OFFICE BOX 655303
VOH
Output
10%
6
3V
90%
90%
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
APPLICATION INFORMATION
5V
24 V
VCC2
VCC1
16
10 kΩ
8
1,2EN
1
Control A
1A
1Y
2
3
Motor
2A
2Y
7
6
3,4EN
9
Control B
3A
3Y
10
11
4A
4Y
15
14
Thermal
Shutdown
4, 5, 12, 13
GND
Figure 2. Two-Phase Motor Driver (L293)
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SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
APPLICATION INFORMATION
5V
24 V
VCC1
10 kΩ
VCC2
8
16
1,2EN
1
Control A
1Y
1A
2
3
Motor
2A
2Y
7
6
3,4EN
9
Control B
3A
10
3Y
4A
15
4Y
11
14
Thermal
Shutdown
4, 5, 12, 13
GND
Figure 3. Two-Phase Motor Driver (L293D)
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SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
APPLICATION INFORMATION
VCC2
SES5001
M1
SES5001
M2
3A
10
4A
11
15
EN
3A
H
H
Fast motor stop
H
Run
H
L
Run
L
Fast motor stop
X
Free-running motor
stop
X
Free-running motor
stop
14
16
8
VCC1
L
1/2 L293
9
EN
M1
4A
M2
L = low, H = high, X = don’t care
4, 5, 12, 13
GND
Figure 4. DC Motor Controls
(connections to ground and to
supply voltage)
VCC2
2 × SES5001
M
2 × SES5001
2A
1A
7
6
3
2
16
8
1/2 L293
VCC1
1
EN
EN
1A
2A
H
L
H
Turn right
FUNCTION
H
H
L
Turn left
H
L
L
Fast motor stop
H
H
H
Fast motor stop
L
X
X
Fast motor stop
L = low, H = high, X = don’t care
4, 5, 12, 13
GND
Figure 5. Bidirectional DC Motor Control
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9
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
APPLICATION INFORMATION
IL1/IL2 = 300 mA
C1
0.22 µF
16
L293
1
2
D5
L1
VCC2
IL1
15
+
D1
+
D8
3
14
4
13
5
12
6
11
+
D6
VCC1
D4
L2
IL2
+
7
10
8
9
D7
D3
D2
D1−D8 = SES5001
Figure 6. Bipolar Stepping-Motor Control
mounting instructions
The Rthj-amp of the L293 can be reduced by soldering the GND pins to a suitable copper area of the printed
circuit board or to an external heat sink.
Figure 9 shows the maximum package power PTOT and the θJA as a function of the side of two equal square
copper areas having a thickness of 35 µm (see Figure 7). In addition, an external heat sink can be used (see
Figure 8).
During soldering, the pin temperature must not exceed 260°C, and the soldering time must not exceed 12
seconds.
The external heatsink or printed circuit copper area must be connected to electrical ground.
10
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APPLICATION INFORMATION
Copper Area 35-µm Thickness
Printed Circuit Board
Figure 7. Example of Printed Circuit Board Copper Area
(used as heat sink)
17.0 mm
11.9 mm
38.0 mm
Figure 8. External Heat Sink Mounting Example
(θJA = 25°C/W)
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SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
APPLICATION INFORMATION
MAXIMUM POWER DISSIPATION
vs
AMBIENT TEMPERATURE
MAXIMUM POWER AND JUNCTION
vs
THERMAL RESISTANCE
80
4
2
60
40
PTOT (TA = 70°C)
1
20
0
0
0
10
30
20
Side
40
50
P TOT − Power Dissipation − W
θJA
3
θ JA − Thermal Resistance − °C/W
P TOT − Power Dissipation − W
5
With Infinite Heat Sink
4
3
Heat Sink With θJA = 25°C/W
2
Free Air
1
0
−50
50
100
TA − Ambient Temperature − °C
− mm
Figure 10
Figure 9
12
0
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150
PACKAGE OPTION ADDENDUM
www.ti.com
25-Feb-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
L293DDWP
OBSOLETE
SOIC
DW
28
None
CU SNPB
Level-2-220C-1 YEAR
L293DDWPTR
OBSOLETE
SOIC
DW
28
None
CU SNPB
Level-2-220C-1 YEAR
L293DN
OBSOLETE
PDIP
N
16
L293DNE
ACTIVE
PDIP
NE
16
25
None
CU SNPB
Level-NA-NA-NA
Pb-Free
(RoHS)
Call TI
Level-NC-NC-NC
L293DSP
OBSOLETE
16
None
Call TI
Call TI
L293DSP883B
OBSOLETE
16
None
Call TI
Call TI
L293DSP883C
OBSOLETE
None
Call TI
Call TI
L293DWP
ACTIVE
SO
Power
PAD
DWP
28
None
Call TI
Level-2-220C-1 YEAR
L293DWPTR
OBSOLETE
SO
Power
PAD
DWP
28
None
Call TI
Call TI
L293N
ACTIVE
PDIP
N
16
25
None
CU SNPB
Level-NA-NA-NA
L293NE
ACTIVE
PDIP
NE
16
25
Pb-Free
(RoHS)
Call TI
Level-NC-NC-NC
UTR
20
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDI003 – OCTOBER 1994
NE (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
20 PIN SHOWN
0.070 (1,78) MAX
11
20
PINS **
DIM
A
C
1
20
0.914 (23,22)
MIN
MAX
B
16
0.780 (19,80)
0.975 (24,77)
MIN
0.930 (23,62)
MAX
1.000 (25,40)
10
C
MIN
0.240 (6,10)
0.260 (6,61)
MAX
0.260 (6,60)
0.280 (7,11)
0.020 (0,51) MIN
A
0.200 (5,08) MAX
Seating Plane
0.155 (3,94)
0.125 (3,17)
0.100 (2,54)
0.021 (0,533)
0.015 (0,381)
0.010 (0,25) M
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
B
0.200 (5,08) MAX
Seating Plane
0.155 (3,94)
0.125 (3,17)
0.100 (2,54)
0.021 (0,533)
0.015 (0,381)
0.010 (0,25) M
0°– 15°
0.010 (0,25) NOM
4040054 / B 04/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (16 pin only)
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1
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