TI OPA2691I-14D Dual wideband, current-feedback operational amplifier with disable Datasheet

OPA2691
OPA
269
1
OPA
26 9
1
SBOS224D – DECEMBER 2001 – REVISED JULY 2008
www.ti.com
Dual Wideband, Current-Feedback
OPERATIONAL AMPLIFIER With Disable
FEATURES
APPLICATIONS
● FLEXIBLE SUPPLY RANGE:
+5V to +12V Single Supply
±2.5V to ±6V Dual Supply
● WIDEBAND +5V OPERATION: 190MHz (G = +2)
● UNITY-GAIN STABLE: 280MHz (G = 1)
● HIGH OUTPUT CURRENT: 190mA
● OUTPUT VOLTAGE SWING: ±4.0V
● HIGH SLEW RATE: 2100V/µs
● LOW SUPPLY CURRENT: 5.1mA/ch
● LOW DISABLED CURRENT: 150µA/ch
●
●
●
●
●
●
●
●
DESCRIPTION
The OPA2691’s low 5.1mA/ch supply current is precisely trimmed at
25°C. This trim, along with low drift over temperature, ensures lower
maximum supply current than competing products. System power
may be further reduced by using the optional disable control pin
(SO-14 only). Leaving this disable pin open, or holding it HIGH,
gives normal operation. If pulled LOW, the OPA2691 supply current
drops to less than 150µA/ch while the output goes into a high
impedance state. This feature may be used for power savings.
The OPA2691 sets a new level of performance for broadband dual
current-feedback op amps. Operating on a very low 5.1mA/ch
supply current, the OPA2691 offers a slew rate and output power
normally associated with a much higher supply current. A new
output stage architecture delivers a high output current with minimal
voltage headroom and crossover distortion. This gives exceptional
single-supply operation. Using a single +5V supply, the OPA2691
can deliver a 1V to 4V output swing with over 150mA drive current
and 190MHz bandwidth. This combination of features makes the
OPA2691 an ideal RGB line driver or single-supply Analog-to-Digital
Converter (ADC) input driver.
xDSL LINE DRIVER / RECEIVER
MATCHED I/Q CHANNEL AMPLIFIER
BROADBAND VIDEO BUFFERS
HIGH-SPEED IMAGING CHANNELS
PORTABLE INSTRUMENTS
DIFFERENTIAL ADC DRIVERS
ACTIVE FILTERS
WIDEBAND INVERTING SUMMING
OPA2691 RELATED PRODUCTS
Voltage-Feedback
Current-Feedback
Fixed Gain
SINGLES
DUALS
TRIPLES
OPA690
OPA691
OPA692
OPA2690
OPA2681
—
OPA3690
OPA3691
OPA3692
+12V
SINGLE-SUPPLY ADSL UPSTREAM DRIVER
SMALL-SIGNAL FREQUENCY RESPONSE
1/2
OPA2691
324Ω
18
12.4Ω
1:2
17
2kΩ
1µF
100Ω
2kΩ
15Vp-p
100Ω
324Ω
12.4Ω
16
Gain (dB)
+6.0V
2Vp-p
15
14
1/2
OPA2691
13
12
Single-Supply ADSL Upstream Driver
0.1
1
10
100 200
Frequency (MHz)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
Copyright © 2001-2008, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
PACKAGE/ORDERING INFORMATION(1)
PRODUCT
OPA2691
"
OPA2691
"
PACKAGE-LEAD
PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
SO-8
D
–40°C to +85°C
OPA2691
"
"
"
"
OPA2691ID
OPA2691IDR
Rails, 100
Tape and Reel, 2500
SO-14
D
–40°C to +85°C
OPA2691
"
"
"
"
OPA2691I-14D
OPA2691I-14DR
Rails, 58
Tape and Reel, 2500
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at
www.ti.com.
PIN CONFIGURATIONS
ABSOLUTE MAXIMUM RATINGS(1)
Power Supply ............................................................................... ±6.5VDC
Internal Power Dissipation(2) ............................ See Thermal Information
Differential Input Voltage .................................................................. ±1.2V
Input Voltage Range ........................................................................... ±VS
Storage Temperature Range: D, 14D ............................ –65°C to +125°C
Lead Temperature (soldering, 10s) .............................................. +300°C
Junction Temperature (TJ ) ........................................................... +175°C
ESD Performance:
HBM .............................................................................................. 2000V
CDM .............................................................................................. 1500V
Top View
NOTES:: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability. (2) Packages
must be derated based on specified θJA. Maximum TJ must be observed.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
2
SO-8
Out A
1
8
+VS
–In A
2
7
Out B
+In A
3
6
–In B
–VS
4
5
+In B
–In A
1
14 Out A
+In A
2
13 NC
DIS A
3
12 NC
–VS
4
11 +VS
DIS B
5
10 NC
+In B
6
9
NC
–In B
7
8
Out B
SO-14
NC = No Connection
OPA2691
www.ti.com
SBOS224D
ELECTRICAL CHARACTERISTICS: VS = ±5V
Boldface limits are tested at +25°C.
RF = 402Ω, RL = 100Ω, and G = +2, (see Figure 1 for AC performance only), unless otherwise noted.
OPA2691ID, I-14D
TYP
AC PERFORMANCE (see Figure 1)
Small-Signal Bandwidth (VO = 0.5Vp-p)
Bandwidth for 0.1dB Gain Flatness
Peaking at a Gain of +1
Large-Signal Bandwidth
Slew Rate
Rise-and-Fall Time
Settling Time to 0.02%
0.1%
Harmonic Distortion
2nd-Harmonic
3rd-Harmonic
Input Voltage Noise
Noninverting Input Current Noise
Inverting Input Current Noise
Differential Gain
Differential Phase
0°C to
70°C(2)
–40°C to
+85°C(2)
200
190
180
40
1
35
1.5
20
2
1400
1375
1350
–70
–79
–74
–93
1.7
12
15
0.07
0.17
0.02
0.07
–86
–63
–70
–72
–87
2.5
14
17
–60
–67
–70
–82
2.9
15
18
225
±0.8
125
±3
+15
+35
±5
±25
±3.5
56
100 || 2
37
±3.4
±4.0
±3.9
+190
–190
±250
0.03
±3.8
±3.7
+25°C
G = +1, RF = 453Ω
G = +2, RF = 402Ω
G = +5, RF = 261Ω
G = +10, RF = 180Ω
G = +2, VO = 0.5Vp-p
RF = 453, VO = 0.5Vp-p
G = +2, VO = 5Vp-p
G = +2, 4V Step
G = +2, VO = 0.5V Step
G = +2, 5V Step
G = +2, VO = 2V Step
G = +2, VO = 2V Step
G = +2, f = 5MHz, VO = 2Vp-p
RL = 100Ω
RL ≥ 500Ω
RL = 100Ω
RL ≥ 500Ω
f > 1MHz
f > 1MHz
f > 1MHz
G = +2, NTSC, VO = 1.4Vp, RL = 150Ω
RL = 37.5Ω
G = +2, NTSC, VO = 1.4Vp, RL = 150Ω
RL = 37.5Ω
f = 5MHz
280
225
210
200
90
0.2
200
2100
1.6
1.9
12
8
VO = 0V, RL = 100Ω
VCM = 0V
VCM = 0V
VCM = 0V
VCM = 0V
VCM = 0V
VCM = 0V
Channel-to-Channel Crosstalk
DC PERFORMANCE(4)
Open-Loop Transimpedance Gain (ZOL)
Input Offset Voltage
Average Offset Voltage Drift
Noninverting Input Bias Current
Average Noninverting Input Bias Current Drift
Inverting Input Bias Current
Average Inverting Input Bias Current Drift
INPUT
Common-Mode Input Range (CMIR)(5)
Common-Mode Rejection (CMRR)
Noninverting Input Impedance
Inverting Input Resistance (RI)
OUTPUT
Voltage Output Swing
Current Output, Sourcing
Current Output, Sinking
Short-Circuit Current
Closed-Loop Output Impedance
DISABLE (Disabled LOW) (SO-14 only)
Power-Down Supply Current (+VS)
Disable Time
Enable Time
Off Isolation
Output Capacitance in Disable
Turn-On Glitch
Turn-Off Glitch
Enable Voltage
Disable Voltage
Control Pin Input Bias Current (DIS )
POWER SUPPLY
Specified Operating Voltage
Maximum Operating Voltage Range
Minimum Operating Voltage Range
Max Quiescent Current
Min Quiescent Current
Power-Supply Rejection Ratio (–PSRR)
TEMPERATURE RANGE
Specification: D, 14D
Thermal Resistance, θJA
D
SO-8
14D SO-14
+25°C(1)
CONDITIONS
PARAMETER
VCM = 0V
Open-Loop
No Load
100Ω Load
VO = 0
VO = 0
G = +2, f = 100kHz
VDIS = 0, Both Channels
VIN = 1VDC
VIN = 1VDC
G = +2, 5MHz
G = +2, RL = 150Ω, VIN = 0
G = +2, RL = 150Ω, VIN = 0
VDIS = 0, Each Channel
UNITS
MIN/ TEST
MAX LEVEL(3)
MHz
MHz
MHz
MHz
MHz
dB
MHz
V/µs
ns
ns
ns
ns
typ
min
typ
typ
min
max
typ
min
typ
typ
typ
typ
C
B
C
C
B
B
C
B
C
C
C
C
–58
–65
–68
–78
3.1
15
19
dBc
dBc
dBc
dBc
nV/√Hz
pA/√Hz
pA/√Hz
%
%
deg
deg
dBc
max
max
max
max
max
max
max
typ
typ
typ
typ
typ
B
B
B
B
B
B
B
C
C
C
C
C
110
±3.7
±12
+43
–300
±30
±90
100
±4.3
±20
+45
–300
±40
±200
kΩ
mV
µV/°C
µA
nA/°C
µA
nA°/C
min
max
max
max
max
max
max
A
A
B
A
B
A
B
±3.3
51
±3.2
50
V
dB
kΩ || pF
Ω
min
min
typ
typ
A
A
C
C
+160
–160
±3.7
±3.6
+140
–140
±3.6
±3.3
+100
–100
V
V
mA
mA
mA
Ω
min
min
min
min
typ
typ
A
A
A
A
C
C
–600
–700
–800
3.5
1.7
130
3.6
1.6
150
3.7
1.5
160
µA
ns
ns
dB
pF
mV
mV
V
V
µA
max
typ
typ
typ
typ
typ
typ
min
max
max
A
C
C
C
C
C
C
A
A
A
±6
±6
±6
10.6
9.8
52
11.2
9.2
50
11.5
8.9
49
V
V
V
mA
mA
dB
typ
max
min
max
min
min
C
A
C
A
A
A
–40 to +85
°C
typ
C
125
100
°C/W
°C/W
typ
typ
C
C
–300
400
25
70
4
±50
±20
3.3
1.8
75
±5
VS = ±5V, Both Channels
VS = ±5V, Both Channels
Input Referred
MIN/MAX OVER TEMPERATURE
±2
10.2
10.2
58
Junction-to-Ambient
52
NOTES: (1) Junction temperature = ambient for +25° C specifications. (2) Junction temperature = ambient at low temperature limit: junction temperature = ambient +15°C
at high temperature limit for over temperature specifications. (3) Test Levels: (A) 100% tested at +25°C. Over-temperature limits by characterization and simulation.
(B) Limits set by characterization and simulation. (C) Typical value only for information. (4) Current is considered positive out of node. VCM is the input common-mode
voltage. (5) Tested < 3dB below minimum specified CMRR at ± CMIR limits.
OPA2691
SBOS224D
www.ti.com
3
ELECTRICAL CHARACTERISTICS: VS = +5V
Boldface limits are tested at +25°C.
RF = 453Ω, RL = 100Ω to VS/2, and G = +2, (see Figure 1 for AC performance only), unless otherwise noted.
OPA2691ID, I-14D
TYP
+25°C(1)
0°C to
70°C(2)
–40°C to
+85°C(2)
168
160
140
40
1
30
2.5
25
3.0
600
575
550
–66
–73
–71
–77
1.7
12
15
–58
–65
–68
–72
2.5
14
17
–57
–63
–67
–70
2.9
15
18
200
±0.8
±3.5
100
+20
+40
±5
±20
Open-Loop
1.5
3.5
54
100 || 2
40
No Load
RL = 100Ω, 2.5V
No Load
RL = 100Ω, 2.5V
VO = VS /2
VO = VS /2
G = +2, f = 100kHz
VDIS = 0, Both Channels
G = +2, 5MHz
CONDITIONS
+25°C
210
190
180
155
90
0.2
210
850
2.0
2.3
14
10
Input Voltage Noise
Noninverting Input Current Noise
Inverting Input Current Noise
G = +1, RF = 499Ω
G = +2, RF = 453Ω
G = +5, RF = 340Ω
G = +10, RF = 180Ω
G = +2, VO < 0.5Vp-p
RF = 649Ω, VO < 0.5Vp-p
G = +2, VO = 2Vp-p
G = +2, 2V Step
G = +2, VO = 0.5V Step
G = +2, VO = 2V Step
G = +2, VO = 2V Step
G = +2, VO = 2V Step
G = +2, f = 5MHz, VO = 2Vp-p
RL = 100Ω to VS /2
RL ≥ 500Ω to VS /2
RL = 100Ω to VS /2
RL ≥ 500Ω to VS /2
f > 1MHz
f > 1MHz
f > 1MHz
DC PERFORMANCE(4)
Open-Loop Transimpedance Gain (ZOL)
Input Offset Voltage
Average Offset Voltage Drift
Noninverting Input Bias Current
Average Noninverting Input Bias Current Drift
Inverting Input Bias Current
Average Inverting Input Bias Current Drift
VO = VS/2, RL = 100Ω to VS/2
VCM = 2.5V
VCM = 2.5V
VCM = 2.5V
VCM = 2.5V
VCM = 2.5V
VCM = 2.5V
PARAMETER
AC PERFORMANCE (see Figure 2)
Small-Signal Bandwidth (VO = 0.5Vp-p)
Bandwidth for 0.1dB Gain Flatness
Peaking at a Gain of +1
Large-Signal Bandwidth
Slew Rate
Rise-and-Fall Time
Settling Time to 0.02%
0.1%
Harmonic Distortion
2nd-Harmonic
3rd-Harmonic
INPUT
Least Positive Input Voltage(5)
Most Positive Input Voltage(5)
Common-Mode Rejection (CMRR)
Noninverting Input Impedance
Inverting Input Resistance (RI)
OUTPUT
Most Positive Output Voltage
Least Positive Output Voltage
Current Output, Sourcing
Current Output, Sinking
Closed-Loop Output Impedance
DISABLE (Disabled LOW) (SO-14 only)
Power-Down Supply Current (+VS)
Off Isolation
Output Capacitance in Disable
Turn-On Glitch
Turn-Off Glitch
Enable Voltage
Disable Voltage
Control Pin Input Bias Current (DIS )
POWER SUPPLY
Specified Single-Supply Operating Voltage
Maximum Single-Supply Operating Voltage
Minimum Single-Supply Operating Voltage
Max Quiescent Current
Min Quiescent Current
Power-Supply Rejection Ratio (+PSRR)
MIN / MAX OVER TEMPERATURE
VCM = 2.5V
G = +2, RL = 150Ω, VIN = VS /2
G = +2, RL = 150Ω, VIN = VS /2
VDIS = 0, Each Channel
TEMPERATURE RANGE
Specification: D, 14D
Thermal Resistance, θJA
D
SO-8
14D SO-14
MIN/ TEST
MAX LEVEL(3)
MHz
MHz
MHz
MHz
MHz
dB
MHz
V/µs
ns
ns
ns
ns
typ
min
typ
typ
min
max
typ
min
typ
typ
typ
typ
C
B
C
C
B
B
C
B
C
C
C
C
–56
–62
–65
–69
3.1
15
19
dBc
dBc
dBc
dBc
nV/ √Hz
pA/ √Hz
pA/ √Hz
max
max
max
max
max
max
max
B
B
B
B
B
B
B
90
±4.1
±12
+48
–250
±25
±112
80
±4.8
±20
+56
–250
±35
±250
kΩ
mV
µV/°C
µA
nA/°C
µA
nA /°C
min
max
max
max
max
max
max
A
A
B
A
B
A
B
1.6
3.4
50
1.7
3.3
49
1.8
3.2
48
V
V
dB
kΩ || pF
Ω
max
min
min
typ
typ
A
A
A
C
C
4
3.9
1
1.1
+160
–160
0.03
3.8
3.7
1.2
1.3
+120
–120
3.7
3.6
1.3
1.4
+100
–100
3.5
3.4
1.5
1.6
+80
–80
V
V
V
V
mA
mA
Ω
min
min
max
max
min
min
typ
A
A
A
A
A
A
C
–300
65
4
±50
±20
3.3
1.8
75
–600
–700
–800
3.5
1.7
130
3.6
1.6
150
3.7
1.5
160
µA
dB
pF
mV
mV
V
V
µA
max
typ
typ
typ
typ
min
max
typ
A
C
C
C
C
A
A
C
12
12
12
9.6
8.2
10
8.0
10.4
7.8
V
V
V
mA
mA
dB
typ
max
min
max
min
typ
C
A
C
A
A
C
–40 to +85
°C
typ
C
125
100
°C/W
°C/W
typ
typ
C
C
5
VS = +5V, Both Channels
VS = +5V, Both Channels
Input Referred
UNITS
4
9
9
55
NOTES: (1) Junction temperature = ambient for +25°C specifications. (2) Junction temperature = ambient at low temperature limit: junction temperature = ambient +15°C
at high temperature limit for over temperature specifications. (3) Test Levels: (A) 100% tested at +25°C. Over-temperature limits by characterization and simulation.
(B) Limits set by characterization and simulation. (C) Typical value only for information. (4) Current is considered positive out of node. VCM is the input common-mode
voltage. (5) Tested < 3dB below minimum specified CMRR at ± CMIR limits.
4
OPA2691
www.ti.com
SBOS224D
TYPICAL CHARACTERISTICS: VS = ±5V
G = +2, RF = 402Ω, RL = 100Ω, unless otherwise noted (see Figure 1 for AC performance only).
SMALL-SIGNAL FREQUENCY RESPONSE
1
G = +1, RF = 453Ω
0
–1
–3
G = +5, RF = 261Ω
–5
G = +10, RF = 180Ω
–6
2Vp-p
5.5
5.0
4.5
4.0
3.5
4Vp-p
3.0
–7
7Vp-p
2.5
VO = 0.5Vp-p
–8
2.0
0
125MHz
250MHz
0
Frequency (25MHz/div)
250MHz
LARGE-SIGNAL PULSE RESPONSE
SMALL-SIGNAL PULSE RESPONSE
+4
G = +2
VO = 0.5Vp-p
+300
G = +2
VO = 5Vp-p
+3
Output Voltage (1V/div)
Output Voltage (100mV/div)
125MHz
Frequency (25MHz/div)
+400
+200
+100
0
–100
–200
+2
+1
0
–1
–2
–3
–300
–4
–400
Time (5ns/div)
Time (5ns/div)
CHANNEL-TO-CHANNEL CROSSTALK
COMPOSITE VIDEO dG/dP
0.2
–55
+5
Video
In
0.18
No Pull-Down
With 1.3kΩ Pull-Down
Video
Loads
1/2
OPA2691
0.16
–60
–65
402Ω
402Ω
dG
Crosstalk (5dB/div)
0.14
dG/dP (%/°)
1Vp-p
6.0
–2
–4
G = +2, RL = 100Ω
6.5
G = +2,
RF = 402Ω
Gain (0.5dB/div)
Normalized Gain (1dB/div)
LARGE-SIGNAL FREQUENCY RESPONSE
7.0
Optional 1.3kΩ
–5
Pull-Down
0.12
dG
0.1
0.08
0.06
dP
–75
–80
–85
–90
0.04
dP
0.02
–70
–95
–100
0
1
2
3
1
4
OPA2691
SBOS224D
10
100
Frequency (MHz)
Number of 150Ω Loads
www.ti.com
5
TYPICAL CHARACTERISTICS: VS = ±5V (Cont.)
G = +2, RF = 402Ω, RL = 100Ω, unless otherwise noted (see Figure 1 for AC performance only).
HARMONIC DISTORTION vs LOAD RESISTANCE
HARMONIC DISTORTION vs SUPPLY VOLTAGE
–60
–60
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
VO = 2Vp-p
RL = 100Ω
f = 5MHz
VO = 2Vp-p
f = 5MHz
–65
–70
2nd-Harmonic
–75
–80
–85
3rd-Harmonic
–90
–65
2nd-Harmonic
–70
–75
3rd-Harmonic
–80
–95
–100
–85
100
1000
2.5
3
Load Resistance (Ω)
HARMONIC DISTORTION vs FREQUENCY
5
5.5
6
HARMONIC DISTORTION vs OUTPUT VOLTAGE
–60
RL = 100Ω
f = 5MHz
VO = 2Vp-p
RL = 100Ω
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
4.5
–65
dBc = dB Below Carrier
2nd-Harmonic
–70
3rd-Harmonic
–80
–90
–100
2nd-Harmonic
–70
–75
3rd-Harmonic
–80
–85
0.1
1
10
20
0.1
1
Frequency (MHz)
5
Output Voltage Swing (Vp-p)
HARMONIC DISTORTION vs INVERTING GAIN
HARMONIC DISTORTION vs NONINVERTING GAIN
–50
–50
VO = 2Vp-p
RL = 100Ω
f = 5MHz
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
4
Supply Voltage (V)
–50
–60
2nd-Harmonic
–70
3rd-Harmonic
–80
VO = 2Vp-p
RL = 100Ω
f = 5MHz
RF = 402Ω
–60
2nd-Harmonic
–70
3rd-Harmonic
–80
–90
–90
1
1
10
10
Inverting Gain (V/V)
Gain (V/V)
6
3.5
OPA2691
www.ti.com
SBOS224D
TYPICAL CHARACTERISTICS: VS = ±5V (Cont.)
G = +2, RF = 402Ω, RL = 100Ω, unless otherwise noted (see Figure 1 for AC performance only).
2-TONE, 3RD-ORDER
INTERMODULATION SPURIOUS
INPUT VOLTAGE AND CURRENT NOISE DENSITY
–30
3rd-Order Spurious Level (dBc)
Current Noise (pA/√Hz)
Voltage Noise (nV/√Hz)
100
Inverting Input Current Noise (15pA/√Hz)
10
Noninverting Input Current Noise (12pA/√Hz)
Voltage Noise (1.7nV/√Hz)
dBc = dB below carriers
20MHz
–50
10MHz
–60
–70
–80
Load Power at Matched 50Ω Load
–90
1
100
1k
10k
100k
1M
–8
10M
–6
–4
RECOMMENDED RS vs CAPACITIVE LOAD
Normalized Gain to Capacitive Load (dB)
60
RS (Ω)
50
40
30
20
10
0
100
8
10
CL = 10pF
CL = 22pF
0
1/2
OPA2691
RS
VO
CL
1kΩ
402Ω
–6
402Ω
–9
125MHz
Output Voltage
1.2
0.8
250MHz
DISABLED FEEDTHROUGH vs FREQUENCY
4.0
2.0
0
2.0
CL = 100pF
1kΩ is optional.
Frequency (25MHz/div)
–45
VDIS = 0
–50
–55
Feedthrough (5dB/div)
VDIS
CL = 47pF
VIN
–3
0
VDIS (2V/div)
Output Voltage (400mV/div)
6
3
1k
6.0
0
4
6
LARGE-SIGNAL DISABLE/ENABLE RESPONSE
0.4
2
9
Capacitive Load (pF)
1.6
0
FREQUENCY RESPONSE vs CAPACITIVE LOAD
70
10
–2
Single-Tone Load Power (dBm)
Frequency (Hz)
1
50MHz
–40
–60
–65
–70
–75
–80
Reverse
–85
–90
VIN = +1V
Forward
–95
–100
0.3
Time (200ns/div)
1
10
100
Frequency (MHz)
OPA2691
SBOS224D
www.ti.com
7
TYPICAL CHARACTERISTICS: VS = ±5V (Cont.)
G = +2, RF = 402Ω, RL = 100Ω, unless otherwise noted (see Figure 1 for AC performance only).
TYPICAL DC DRIFT OVER TEMPERATURE
OUTPUT VOLTAGE AND CURRENT LIMITATIONS
2
Output Current Limit
1W Internal
Power Limit
Single Channel
1.5
Input Offset Voltage (mV)
3
2
VO (V)
1
0
25Ω
Load Line
50Ω Load Line
–1
–2
100Ω Load Line
–3
–4
1W Internal
Power Limit
Single Channel
Output Current Limit
–5
–300 –250 –200 –150 –100 –50
0
30
Noninverting Input Bias Current (IB+)
1
0.5
10
0
0
Inverting Input
Bias Current (IB–)
–0.5
–10
–1
–20
Input Offset
Voltage (VOS)
–1.5
–2
–25
0
25
50
75
100
125
Ambient Temperature (°C)
SUPPLY AND OUTPUT CURRENT vs TEMPERATURE
CMRR AND PSRR vs FREQUENCY
16
65
250
+PSRR
Sourcing Output Current
Supply Current (2mA/div)
60
55
CMRR
50
45
–30
–40
–50
+50 +100 +150 +200 +250 +300
IO (mA)
Common-Mode Rejection Ratio (dB)
Power-Supply Rejection Ratio (dB)
20
–PSRR
40
35
30
14
200
Sinking Output Current
12
150
10
100
Quiescent Supply Current
Both Channels
8
50
Output Current (50mA/div)
4
40
Input Bias Currents (µA)
5
25
6
20
1k
10k
100k
1M
10M
0
–50
100M
–25
0
25
50
75
100
125
Ambient Temperature (°C)
Frequency (Hz)
CLOSED-LOOP OUTPUT IMPEDANCE
vs FREQUENCY
OPEN-LOOP TRANSIMPEDANCE GAIN/PHASE
10
120
0
1/2
OPA2691
1
–5V
ZO
402Ω
402Ω
0.1
0.01
–40
| ZOL|
80
–80
∠ ZOL
60
–120
40
–160
20
–200
0
10k
100k
1M
10M
100M
Frequency (Hz)
8
100
–240
10k
100k
1M
10M
100M
1G
Frequency (Hz)
OPA2691
www.ti.com
SBOS224D
Transimpedance Phase (40°/div)
50Ω
Transimpedance Gain (20dB/div)
Output Impedance (Ω)
+5V
TYPICAL CHARACTERISTICS: VS = +5V
G = +2, RF = 499Ω, RL = 100Ω to +2.5V, unless otherwise noted (see Figure 2 for AC performance only).
LARGE-SIGNAL FREQUENCY RESPONSE
SMALL-SIGNAL FREQUENCY RESPONSE
1
7.0
G = +1,
RF = 499Ω
6.0
–1
G = +2,
RF = 453Ω
–2
G = +5,
RF = 340Ω
–3
–4
–5
–6
–7
–8
5.5
5.0
VO = 2Vp-p
4.5
4.0
3.5
3.0
G = +10,
RF = 180Ω
VO = 0.5Vp-p
VO = 0.5Vp-p
6.5
Gain (0.5dB/div)
Normalized Gain (1dB/div)
0
2.0
0
125MHz
0
250MHz
125MHz
SMALL-SIGNAL PULSE RESPONSE
LARGE-SIGNAL PULSE RESPONSE
4.1
2.9
2.7
2.6
2.5
2.4
2.3
G = +2
VO = 2Vp-p
3.7
Output Voltage (400mV/div)
G = +2
VO = 0.5Vp-p
2.8
2.2
3.3
2.9
2.5
2.1
1.7
1.3
2.1
0.9
Time (5ns/div)
Time (5ns/div)
FREQUENCY RESPONSE vs CAPACITIVE LOAD
RECOMMENDED RS vs CAPACITIVE LOAD
Normalized Gain to Capacitive Load (dB)
60
50
40
RS (Ω)
250MHz
Frequency (25MHz/div)
Frequency (25MHz/div)
Output Voltage (100mV/div)
VO = 1Vp-p
G = +2
RL = 100Ω to 2.5V
2.5
30
20
10
0
1
10
100
6
CL = 10pF
3
CL = 47pF
0
CL = 22pF
+5V
–3
VI
0.1µF
57.6Ω
806Ω
806Ω
VO
1/2
OPA2691
CL = 100pF
RS
–6
453Ω
CL
1kΩ
453Ω
0.1µF
1kΩ is optional.
–9
0
1k
125MHz
250MHz
Frequency (25MHz/div)
Capacitive Load (pF)
OPA2691
SBOS224D
9
www.ti.com
9
TYPICAL CHARACTERISTICS: VS = +5V (Cont.)
G = +2, RF = 499Ω, RL = 100Ω to +2.5V, unless otherwise noted (see Figure 2 for AC performance only).
HARMONIC DISTORTION vs FREQUENCY
HARMONIC DISTORTION vs LOAD RESISTANCE
–50
–60
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
VO = 2Vp-p
f = 5MHz
–65
2nd-Harmonic
–70
3rd-Harmonic
–75
100
2nd-Harmonic
–70
3rd-Harmonic
–80
0.1
1000
1
Frequency (MHz)
HARMONIC DISTORTION vs OUTPUT VOLTAGE
2-TONE, 3RD-ORDER
INTERMODULATION SPURIOUS
–30
3rd-Order Spurious Level (dBc)
RL = 100Ω to 2.5V
f = 5MHz
2nd-Harmonic
–65
–70
3rd-Harmonic
–75
–80
1
dBc = dB below carriers
50MHz
–50
–60
20MHz
–70
10MHz
–80
–90
Load Power at Matched 50Ω Load
–14
3
20
–40
–100
0.1
10
Resistance (Ω)
–60
Harmonic Distortion (dBc)
–60
–90
–80
–12
–10
–8
–6
–4
–2
0
2
Single-Tone Load Power (dBm)
Output Voltage Swing (Vp-p)
10
VO = 2Vp-p
RL = 100Ω to 2.5V
OPA2691
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SBOS224D
APPLICATIONS INFORMATION
WIDEBAND CURRENT-FEEDBACK OPERATION
The OPA2691 gives the exceptional AC performance of a
wideband current-feedback op amp with a highly linear, highpower output stage. Requiring only 5.1mA/ch quiescent current, the OPA2691 will swing to within 1V of either supply rail
and deliver in excess of 160mA tested at room temperature.
This low output headroom requirement, along with supply
voltage independent biasing, gives remarkable single (+5V)
supply operation. The OPA2691 will deliver greater than 200MHz
bandwidth driving a 2Vp-p output into 100Ω on a single +5V
supply. Previous boosted output stage amplifiers have typically
suffered from very poor crossover distortion as the output
current goes through zero. The OPA2691 achieves a comparable power gain with much better linearity. The primary
advantage of a current-feedback op amp over a voltagefeedback op amp is that AC performance (bandwidth and
distortion) is relatively independent of signal gain. For similar
AC performance with improved DC accuracy, consider the high
slew rate, unity-gain stable, voltage-feedback OPA2690.
Figure 1 shows the DC-coupled, gain of +2, dual powersupply circuit configuration used as the basis of the ±5V
Electrical Characteristics and Typical Characteristics. For
test purposes, the input impedance is set to 50Ω with a
resistor to ground and the output impedance is set to 50Ω
with a series output resistor. Voltage swings reported in the
electrical characteristics are taken directly at the input and
output pins while load powers (dBm) are defined at a matched
50Ω load. For the circuit of Figure 1, the total effective load
will be 100Ω || 804Ω = 89Ω. The disable control line (DIS) is
typically left open (SO-14 only) to ensure normal amplifier
operation. One optional component is included in Figure 1. In
addition to the usual power-supply decoupling capacitors to
ground, a 0.01µF capacitor is included between the two
0.1µF
+5V
+VS
power-supply pins. In practical printed circuit board (PCB)
layouts, this optional added capacitor will typically improve
the 2nd-harmonic distortion performance by 3dB to 6dB.
Figure 2 shows the AC-coupled, gain of +2, single-supply
circuit configuration used as the basis of the +5V Electrical
Characteristics and Typical Characteristics. Though not a
rail-to-rail design, the OPA2691 requires minimal input and
output voltage headroom compared to other very wideband
current-feedback op amps. It will deliver a 3Vp-p output
swing on a single +5V supply with greater than 150MHz
bandwidth. The key requirement of broadband single-supply
operation is to maintain input and output signal swings within
the usable voltage ranges at both the input and the output.
The circuit of Figure 2 establishes an input midpoint bias
using a simple resistive divider from the +5V supply (two
806Ω resistors). The input signal is then AC-coupled into this
midpoint voltage bias. The input voltage can swing to within
1.5V of either supply pin, giving a 2Vp-p input signal range
centered between the supply pins. The input impedance
matching resistor (57.6Ω) used for testing is adjusted to give
a 50Ω input match when the parallel combination of the
biasing divider network is included. The gain resistor (RG) is
AC-coupled, giving the circuit a DC gain of +1—which puts
the input DC bias voltage (2.5V) on the output as well. The
feedback resistor value has been adjusted from the bipolar
supply condition to re-optimize for a flat frequency response
in +5V operation, gain of +2, operation (see the Setting
Resistor Values to Optimize Bandwidth section). Again, on a
single +5V supply, the output voltage can swing to within 1V
of either supply pin while delivering more than 75mA output
current. A demanding 100Ω load to a midpoint bias is used
in this characterization circuit. The new output stage used in
the OPA2691 can deliver large bipolar output currents into
this midpoint load with minimal crossover distortion, as shown
by the +5V supply, 3rd-harmonic distortion plots.
+5V
+VS
6.8µF
+
+
0.1µF
50Ω Source
DIS
VI
50Ω
VO
1/2
OPA2691
0.01µF
6.8µF
806Ω
50Ω
50Ω Load
0.1µF
VI
57.6Ω
DIS
806Ω
1/2
OPA2691
VO
100Ω
VS/2
RF
453Ω
RF
402Ω
RG
402Ω
RG
453Ω
+
6.8µF
0.1µF
0.1µF
–VS
–5V
FIGURE 1. DC-Coupled, G = +2, Bipolar Supply, Specification and Test Circuit.
FIGURE 2. AC-Coupled, G = +2, Single-Supply Specification
and Test Circuit.
OPA2691
SBOS224D
www.ti.com
11
SINGLE-SUPPLY DIFFERENTIAL ADC DRIVER
WIDEBAND VIDEO MULTIPLEXING
Figure 3 shows a gain of +10 Single-Ended In/Diff. Out singlesupply ADC driver. Using a dual amplifier like the OPA2691
helps reduce the necessary board space, as it also reduces the
amount of required supply bypassing components. From a
signal point of view, dual amplifiers provide excellent performance matching (for example, gain and phase matching). The
differential ADC driver circuit shown in Figure 3 takes advantage
of this fact. A transformer converts the single-ended input signal
into a low-level differential signal which is applied to the high
impedance noninverting inputs of each of the two amplifiers in
the OPA2691. Resistor RG between the inverting inputs controls
the AC-gain of this circuit according to equation G = 1 + 2R F/RG.
With the resistor values shown, the AC-gain is set to 10. Adding
a capacitor (0.1µF) in series with RG blocks, the DC-path gives
a DC gain of +1 for the common-mode voltage. This allows, in
a very simple way, to apply the required DC bias voltage of
+2.5V to the inputs of the amplifiers, which will also appear at
their outputs. Like the OPA2691, the ADC ADS823 operates on
a single +5V supply. Its internal common-mode voltage is
typically +2.5V which equals the required bias voltage for the
OPA2691.
One common application for video speed amplifiers which
include a disable pin is to wire multiple amplifier outputs
together, then select which one of several possible video
inputs to source onto a single line. This simple Wired-OR
Video Multiplexer can be easily implemented using the
OPA2691I-14D, see Figure 4.
Connecting two resistors between the top reference
(REFT = +3.5V) and bottom reference (REFB = +1.5V)
develops a +2.5V voltage level at their midpoint. Applying
that to the center tap of the transformer biases the amplifiers appropriately. Sufficient bypassing at the center tap
must be provided to keep this point at a solid AC ground.
Resistors RS isolate the op amp output from the capacitive
input of the converter, as well as forming a 1st-order, lowpass filter with capacitor C1 to attenuate some of the
wideband noise. This interface will provide > 150MHz fullscale input bandwidth to the ADS823.
Typically, channel switching is performed either on sync or
retrace time in the video signal. The two inputs are approximately equal at this time. The make-before-break disable
characteristic of the OPA2691 ensures that there is always
one amplifier controlling the line when using a wired-OR
circuit like that presented in Figure 4. Since both inputs may
be on for a short period during the transition between
channels, the outputs are combined through the output
impedance matching resistors (82.5Ω in this case). When
one channel is disabled, its feedback network forms part of
the output impedance and slightly attenuates the signal in
getting out onto the cable. The gain and output matching
resistors have been slightly increased to get a signal gain of
+1 at the matched load and provide a 75Ω output impedance
to the cable. The video multiplexer connection (see Figure 4)
also insures that the maximum differential voltage across the
inputs of the unselected channel do not exceed the rated
±1.2V maximum for standard video signal levels.
The section on Disable Operation shows the turn-on and
turn-off switching glitches using a grounded input for a single
channel is typically less than ±50mV. Where two outputs are
switched (see Figure 4), the output line is always under the
control of one amplifier or the other due to the “make-beforebreak” disable timing. In this case, the switching glitches for
two 0V inputs drop to < 20mV.
+5V
+5V
1/2
OPA2691
1:1
+VS
RS
24.9Ω
IN
C1
10pF
VIN
RF
200Ω
50Ω
0.1µF
+
4.7µF
ADS823
10-Bit
60MSPS
RG
44Ω
0.1µF
RF
200Ω
RS
24.9Ω
C1
10pF
1/2
OPA2691
IN
REFT
(+3.5V)
REFB
(+1.5V)
GND
2kΩ
2 RF
G=1+
= 10
RG
VBIAS = +2.5V
2kΩ
0.1µF
0.1µF
FIGURE 3. Wideband, Single-Supply, Differential ADC Driver.
12
OPA2691
www.ti.com
SBOS224D
+5V
2kΩ
VDIS
+5V
Power-supply
decoupling not shown.
Video 1
1/2
OPA2691
DIS
75Ω
82.5Ω
–5V
340Ω
402Ω
75Ω Cable
340Ω
RG-59
402Ω
+5V
82.5Ω
1/2
OPA2691
Video 2
DIS
75Ω
–5V
2kΩ
FIGURE 4. Two-Channel Video Multiplexer.
+5V
20MHz, 2ND-ORDER BUTTERWORTH
LOW-PASS FREQUENCY RESPONSE
Power-supply
decoupling not shown.
0.1µF
12
5kΩ
100pF
8
VI
5kΩ
1/2
OPA2691
32.3Ω
105Ω
150pF
4
1/2
OPA2691
4VI
Gain (dB)
51Ω
0
–4
375Ω
600Ω
–8
125Ω
–12
20MHz, 2nd-Order Butterworth Low-Pass
0.1
0.1µF
1
10
100
Frequency (MHz)
FIGURE 5. Buffered Single-Supply Active Filter.
HIGH-SPEED ACTIVE FILTERS
Wideband current-feedback op amps make ideal elements
for implementing high-speed active filters where the amplifier
is used as a fixed gain block inside a passive RC circuit
network. Their relatively constant bandwidth versus gain,
provides low interaction between the actual filter poles and
the required gain for the amplifier. Figure 5 shows an example single-supply buffered filter application. In this case,
one of the OPA2691 channels is used to setup the DC
operating point and provide impedance isolation from the
signal source into the 2nd-stage filter. That stage is set up to
implement a 20MHz maximally flat Butterworth frequency
response and provide an AC gain of +4.
OPA2691
SBOS224D
www.ti.com
13
The 51Ω input matching resistor is optional in this case. The
input signal is AC-coupled to the 2.5V DC reference voltage
developed through the resistor divider from the +5V power
supply. This first stage acts as a gain of +1 voltage buffer for
the signal where the 600Ω feedback resistor is required for
stability. This first stage easily drives the low input resistors
required at the input of this high-frequency filter. The 2nd
stage is set for a DC gain of +1—carrying the 2.5V operating
point through to the output pin, and an AC gain of +4. The
feedback resistor has been adjusted to optimize bandwidth
for the amplifier itself. As the single-supply frequency response plots show, the OPA2691 in this configuration will
give > 200MHz small-signal bandwidth. The capacitor values
were chosen as low as possible but adequate to swamp out
the parasitic input capacitance of the amplifier. The resistor
values were slightly adjusted to give the desired filter frequency response while accounting for the approximate 1ns
propagation delay through each channel of the OPA2691.
ential to single-ended conversion is performed by the voltage-feedback amplifier OPA690, configured as a standard
difference amplifier. To maintain good distortion performance
for the OPA2691, the loading at each amplifier output has
been matched by setting R3 + R4 = R1, rather than using the
same resistor values within the difference amplifier.
+5V
VIN
+5V
Line driver applications usually have a high demand for
transmitting the signal with low distortion. Current-feedback
amplifiers like the OPA2691 are ideal for delivering low
distortion performance to higher gains. The example shown
is set for a differential gain of 7.5. This circuit can deliver the
maximum 15Vp-p signal with over 60MHz bandwidth.
WIDEBAND (200MHz) INSTRUMENTATION AMPLIFIER
As discussed previously, the current-feedback topology of
the OPA2691 provides a nearly constant bandwidth as signal
gain is increased. The three op amp wideband instrumentation amplifiers depicted in Figure 6 takes advantage of this,
achieving a differential bandwidth of 200MHz. The signal is
applied to the high-impedance noninverting inputs of the
OPA2691. The differential gain is set by (1 + 2RF/RG)—which
is equal to 5 using the values shown in Figure 6. The
feedback resistors, RF, are optimized at this particular gain.
Gain adjustments can be made by adjusting RG. The differ-
VO
OPA690
RG
130Ω
RF
261Ω
–5V
R3
249Ω
1/2
OPA2691
VO
(VIN – VIN)
VIN
=5
R4
249Ω
–5V
INSTRUMENTATION DIFF. AMP
FREQUENCY RESPONSE
15
10
Gain (dB)
A very demanding application for a high-speed amplifier is to
drive a low load impedance while maintaining a high output
voltage swing to high frequencies. Using the dual currentfeedback op amp OPA2691, a 15Vp-p output signal swing
into a twisted-pair line with a typical impedance of 100Ω can
be realized. Configured as shown on the front page, the two
amplifiers of the OPA2691 drive the output transformer in a
push-pull configuration thus doubling the peak-to-peak signal
swing at each op amp’s output to 15Vp-p. The transformer
has a turns ratio of 2. In order to provide a matched source,
this requires a 25Ω source impedance (RS), for the primary
side, given the transformer equation n2 = RL/RS. Dividing this
impedance equally between the outputs requires a series
termination matching resistor at each output of 12.4Ω. Taking
the total resistive load of 25Ω (for the differential output
signal) and drawing a load line on the Output Voltage and
Current Limitations plot it can be seen that a 1.5V headroom
is required at both the positive and negative peak currents of
150mA.
R2
499Ω
RF
261Ω
HIGH-POWER TWISTED-PAIR DRIVER
14
R1
499Ω
1/2
OPA2691
5
0
1
10
100
400
Frequency (MHz)
FIGURE 6. Wideband, 3-Op Amp Instrumentation Diff. Amp.
DESIGN-IN TOOLS
DEMONSTRATION FIXTURES
Two printed circuit boards (PCBs) are available to assist in
the initial evaluation of circuit performance using the OPA2691
in its two package options. Both of these are offered free of
charge as unpopulated PCBs, delivered with a user’s guide.
The summary information for these fixtures is shown Table I
below.
PRODUCT
OPA2691ID
OPA2691I-14D
PACKAGE
ORDERING
NUMBER
LITERATURE
NUMBER
SO-8
SO-14
DEM-OPA-SO-2A
DEM-OPA-SO-2B
SBOU003
SBOU002
TABLE I. Demonstration Fixtures by Package.
The demonstration fixtures can be requested at the Texas
Instruments web site (www.ti.com) through the OPA2691
product folder.
OPA2691
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SBOS224D
MACROMODELS AND APPLICATIONS SUPPORT
Computer simulation of circuit performance using SPICE is
often useful when analyzing the performance of analog
circuits and systems. This is particularly true for Video and
RF amplifier circuits where parasitic capacitance and inductance can have a major effect on circuit performance. A
SPICE model for the OPA2691 is available through the TI
web site (www.ti.com). These models do a good job of
predicting small-signal AC and transient performance under
a wide variety of operating conditions. They do not do as well
in predicting the harmonic distortion or dG/dP characteristics.
These models do not attempt to distinguish between the
package types in their small-signal AC performance, nor do
they attempt to simulate channel-to-channel coupling.
RI, the buffer output impedance, is a critical portion of the
bandwidth control equation. The OPA2691 is typically about 37Ω.
A current-feedback op amp senses an error current in the
inverting node (as opposed to a differential input error voltage for a voltage-feedback op amp) and passes this on to the
output through an internal frequency-dependent transimpedance gain. The Typical Characteristics show this open-loop
transimpedance response. This is analogous to the openloop voltage gain curve for a voltage-feedback op amp.
Developing the transfer function for the circuit of Figure 7
gives Equation 1:

R 
α 1 + F 
RG 

VO
α NG
=
=
VI

RF  1 + RF + RI NG
RF + RI 1 +
Z(S)
RG 

1+
Z(S)
OPERATING SUGGESTIONS
SETTING RESISTOR VALUES TO
OPTIMIZE BANDWIDTH
A current-feedback op amp like the OPA2691 can hold an
almost constant bandwidth over signal gain settings with the
proper adjustment of the external resistor values. This is
shown in the Typical Characteristics; the small-signal bandwidth decreases only slightly with increasing gain. Those
curves also show that the feedback resistor has been changed
for each gain setting. The resistor values on the inverting side
of the circuit for a current-feedback op amp can be treated as
frequency response compensation elements while their ratios set the signal gain. Figure 7 shows the small-signal
frequency response analysis circuit for the OPA2691.
This is written in a loop-gain analysis format where the errors
arising from a non-infinite open-loop gain are shown in the
denominator. If Z(S) were infinite over all frequencies, the
denominator of Equation 1 would reduce to 1 and the ideal
desired signal gain shown in the numerator would be achieved.
The fraction in the denominator of Equation 1 determines the
frequency response. Equation 2 shows this as the loop-gain
equation:
Z(S)
RF + RI NG
α
VO
IERR
Z(S) IERR
RF
RG
FIGURE 7. Current-Feedback Transfer Function Analysis Circuit.
The key elements of this current-feedback op amp model are:
α → Buffer gain from the noninverting input to the inverting input
RI → Buffer output impedance
iERR → Feedback error current signal
Z(s) → Frequency dependent open-loop transimpedance
gain from iERR to VO
The buffer gain is typically very close to 1.00 and is normally
neglected from signal gain considerations. It will, however, set
the CMRR for a single op amp differential amplifier configuration. For a buffer gain α < 1.0, the CMRR = –20 • log (1 – α)dB.
(2)
The OPA2691 is internally compensated to give a maximally
flat frequency response for RF = 402Ω at NG = 2 on ±5V
supplies. Evaluating the denominator of Equation 2 (which is
the feedback transimpedance) gives an optimal target of 476Ω.
As the signal gain changes, the contribution of the NG • RI term
in the feedback transimpedance will change, but the total can
be held constant by adjusting RF. Equation 3 gives an approximate equation for optimum RF over signal gain:
RF = 476Ω − NG RI
(3)
As the desired signal gain increases, this equation will eventually predict a negative RF. A somewhat subjective limit to this
adjustment can also be set by holding RG to a minimum value
of 20Ω. Lower values will load both the buffer stage at the input
and the output stage if RF gets too low—actually decreasing
OPA2691
SBOS224D
= Loop Gain
If 20 • log(RF + NG • RI) were drawn on top of the open-loop
transimpedance plot, the difference between the two would
be the loop gain at a given frequency. Eventually, Z(S) rolls off
to equal the denominator of Equation 2 at which point the
loop gain has reduced to 1 (and the curves have intersected).
This point of equality is where the amplifier’s closed-loop
frequency response given by Equation 1 will start to roll off,
and is exactly analogous to the frequency at which the noise
gain equals the open-loop voltage gain for a voltage-feedback op amp. The difference here is that the total impedance
in the denominator of Equation 2 may be controlled somewhat separately from the desired signal gain (or NG).
VI
RI
(1)


R 
NG ≡ 1 + F  
RG  


www.ti.com
15
the bandwidth. Figure 8 shows the recommended RF versus
NG for both ±5V and a single +5V operation. The values for RF
versus Gain shown here are approximately equal to the values
used to generate the Typical Characteristics. They differ in that
the optimized values used in the Typical Characteristics are
also correcting for board parasitics not considered in the
simplified analysis leading to Equation 3. The values shown in
Figure 8 give a good starting point for design where bandwidth
optimization is desired.
+5V
Power-supply
decoupling not shown.
50Ω Load
1/2
OPA2691
50Ω
Source
VO
50Ω
RF
374Ω
RG
182Ω
VI
RM
68.1Ω
600
Feedback Resistor (Ω)
500
–5V
400
FIGURE 9. Inverting Gain of –2 with Impedance Matching.
+5V
300
200
±5V
100
0
0
5
10
15
20
Noise Gain
FIGURE 8. Recommended Feedback Resistor vs Noise Gain.
The total impedance going into the inverting input may be
used to adjust the closed-loop signal bandwidth. Inserting a
series resistor between the inverting input and the summing
junction will increase the feedback impedance (denominator
of Equation 2), decreasing the bandwidth. The internal buffer
output impedance for the OPA2691 is slightly influenced by
the source impedance looking out of the noninverting input
terminal. High source resistors will have the effect of increasing RI, decreasing the bandwidth. For those single-supply
applications which develop a midpoint bias at the noninverting
input through high valued resistors, the decoupling capacitor
is essential for power-supply ripple rejection, noninverting
input noise current shunting, and to minimize the highfrequency value for RI in Figure 7.
INVERTING AMPLIFIER OPERATION
Since the OPA2691 is a general-purpose, wideband currentfeedback op amp, most of the familiar op amp application
circuits are available to the designer. Those dual op amp
applications that require considerable flexibility in the feedback element (for example, integrators, transimpedance, and
some filters) should consider the unity-gain stable voltagefeedback OPA2690, since the feedback resistor is the compensation element for a current-feedback op amp. Wideband
inverting operation (and especially summing) is particularly
suited to the OPA2691. Figure 9 shows a typical inverting
configuration where the I/O impedances and signal gain from
Figure 1 are retained in an inverting circuit configuration.
In the inverting configuration, two key design considerations
must be noted. The first is that the gain resistor (RG)
becomes part of the signal channel input impedance. If input
16
impedance matching is desired (which is beneficial whenever the signal is coupled through a cable, twisted-pair, long
PCB trace, or other transmission line conductor), it is normally necessary to add an additional matching resistor to
ground. RG by itself is normally not set to the required input
impedance since its value, along with the desired gain, will
determine an RF which may be non-optimal from a frequency
response standpoint. The total input impedance for the
source becomes the parallel combination of RG and RM.
The second major consideration, touched on in the previous
paragraph, is that the signal source impedance becomes
part of the noise gain equation and will have slight effect on
the bandwidth through Equation 1. The values shown in
Figure 9 have accounted for this by slightly decreasing RF
(from Figure 1) to re-optimize the bandwidth for the noise
gain of Figure 9 (NG = 2.74) In the example of Figure 9, the
RM value combines in parallel with the external 50Ω source
impedance, yielding an effective driving impedance of
50Ω || 68Ω = 28.8Ω. This impedance is added in series with
RG for calculating the noise gain—which gives NG = 2.74.
This value, along with the RF of Figure 8 and the inverting
input impedance of 37Ω, are inserted into Equation 3 to get
a feedback transimpedance nearly equal to the 476Ω optimum value.
Note that the noninverting input in this bipolar supply inverting application is connected directly to ground. It is often
suggested that an additional resistor be connected to ground
on the noninverting input to achieve bias current error cancellation at the output. The input bias currents for a currentfeedback op amp are not generally matched in either magnitude or polarity. Connecting a resistor to ground on the
noninverting input of the OPA2691 in the circuit of Figure 9
will actually provide additional gain for that input’s bias and
noise currents, but will not decrease the output DC error
since the input bias currents are not matched.
OUTPUT CURRENT AND VOLTAGE
The OPA2691 provides output voltage and current capabilities that are unsurpassed in a low-cost, dual monolithic op
amp. Under no-load conditions at 25°C, the output voltage
typically swings closer than 1V to either supply rail; the tested
OPA2691
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SBOS224D
swing limit is within 1.2V of either rail. Into a 15Ω load (the
minimum tested load), it is tested to deliver more than
±160mA.
and adds a zero at a higher frequency. The additional zero
acts to cancel the phase lag from the capacitive load pole,
thus increasing the phase margin and improving stability.
The specifications described above, though familiar in the
industry, consider voltage and current limits separately. In
many applications, it is the voltage x current, or V-I product,
which is more relevant to circuit operation. Refer to the
Output Voltage and Current Limitations plot in the Typical
Characteristics. The X- and Y-axes of this graph show the
zero-voltage output current limit and the zero-current output
voltage limit, respectively. The four quadrants give a more
detailed view of the OPA2691’s output drive capabilities,
noting that the graph is bounded by a Safe Operating Area
of 1W maximum internal power dissipation (in this case for 1
channel only). Superimposing resistor load lines onto the plot
shows that the OPA2691 can drive ±2.5V into 25Ω or ±3.5V
into 50Ω without exceeding the output capabilities or the 1W
dissipation limit. A 100Ω load line (the standard test circuit
load) shows the full ±3.9V output swing capability, as shown
in the Electrical Characteristics.
The Typical Characteristics show the recommended RS vs
Capacitive Load and the resulting frequency response at the
load. Parasitic capacitive loads greater than 2pF can begin to
degrade the performance of the OPA2691. Long PC board
traces, unmatched cables, and connections to multiple devices can easily cause this value to be exceeded. Always
consider this effect carefully, and add the recommended
series resistor as close as possible to the OPA2691 output
pin (see Board Layout Guidelines).
The minimum specified output voltage and current over
temperature are set by worst-case simulations at the cold
temperature extreme. Only at cold start-up will the output
current and voltage decrease to the numbers shown in the
electrical characteristic tables. As the output transistors deliver power, their junction temperatures will increase, decreasing their VBEs (increasing the available output voltage
swing) and increasing their current gains (increasing the
available output current). In steady-state operation, the available output voltage and current will always be greater than
that shown in the over-temperature specifications since the
output stage junction temperatures will be higher than the
minimum specified operating ambient.
To protect the output stage from accidental shorts to ground
and the power supplies, output short-circuit protection is
included in the OPA2691. The circuit acts to limit the maximum source or sink current to approximately 250mA.
DRIVING CAPACITIVE LOADS
One of the most demanding and yet very common load
conditions for an op amp is capacitive loading. Often, the
capacitive load is the input of an ADC—including additional
external capacitance which may be recommended to improve the ADC’s linearity. A high-speed, high open-loop gain
amplifier like the OPA2691 can be very susceptible to decreased stability and closed-loop response peaking when a
capacitive load is placed directly on the output pin. When the
amplifier’s open-loop output resistance is considered, this
capacitive load introduces an additional pole in the signal
path that can decrease the phase margin. Several external
solutions to this problem have been suggested. When the
primary considerations are frequency response flatness, pulse
response fidelity, and/or distortion, the simplest and most
effective solution is to isolate the capacitive load from the
feedback loop by inserting a series isolation resistor between
the amplifier output and the capacitive load. This does not
eliminate the pole from the loop response, but rather shifts it
DISTORTION PERFORMANCE
The OPA2691 provides good distortion performance into a
100Ω load on ±5V supplies. Relative to alternative solutions,
it provides exceptional performance into lighter loads and/or
operating on a single +5V supply. Generally, until the fundamental signal reaches very high frequency or power levels,
the 2nd-harmonic will dominate the distortion with a negligible
3rd-harmonic component. Focusing then on the 2nd-harmonic, increasing the load impedance improves distortion
directly. Remember that the total load includes the feedback
network—in the noninverting configuration (see Figure 1) this
is the sum of RF + RG, while in the inverting configuration it is
just RF. Also, providing an additional supply decoupling capacitor (0.01µF) between the supply pins (for bipolar operation) improves the 2nd-order distortion slightly (3dB to 6dB).
In most op amps, increasing the output voltage swing increases harmonic distortion directly. The Typical Characteristics show the 2nd-harmonic increasing at a little less than
the expected 2x rate while the 3rd-harmonic increases at a
little less than the expected 3x rate. Where the test power
doubles, the difference between it and the 2nd-harmonic
decreases less than the expected 6dB while the difference
between it and the 3rd-harmonic decreases by less than the
expected 12dB. This also shows up in the 2-tone, 3rd-order
intermodulation spurious (IM3) response curves. The 3rdorder spurious levels are extremely low at low output power
levels. The output stage continues to hold them low even as
the fundamental power reaches very high levels. As the
Typical Characteristics show, the spurious intermodulation
powers do not increase as predicted by a traditional intercept
model. As the fundamental power level increases, the dynamic range does not decrease significantly. For two tones
centered at 20MHz, with 10dBm/tone into a matched 50Ω
load (i.e., 2Vp-p for each tone at the load, which requires
8Vp-p for the overall 2-tone envelope at the output pin), the
Typical Characteristics show 48dBc difference between the
test-tone power and the 3rd-order intermodulation spurious
levels. This exceptional performance improves further when
operating at lower frequencies.
NOISE PERFORMANCE
Wideband current-feedback op amps generally have a higher
output noise than comparable voltage-feedback op amps. The
OPA2691 offers an excellent balance between voltage and
OPA2691
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17
current noise terms to achieve low output noise. The inverting
current noise (15pA/√Hz) is significantly lower than earlier
solutions while the input voltage noise (1.7nV/√Hz) is lower
than most unity-gain stable, wideband, voltage-feedback op
amps. This low input voltage noise was achieved at the price
of higher noninverting input current noise (12pA/√Hz). As long
as the AC source impedance looking out of the noninverting
node is less than 100Ω, this current noise will not contribute
significantly to the total output noise. The op amp input voltage
noise and the two input current noise terms combine to give
low output noise under a wide variety of operating conditions.
Figure 10 shows the op amp noise analysis model with all the
noise terms included. In this model, all noise terms are taken
to be noise voltage or current density terms in either nV/√Hz
or pA/√Hz.
ENI
A current-feedback op amp like the OPA2691 provides
exceptional bandwidth in high gains, giving fast pulse settling
but only moderate DC accuracy. The Electrical Characteristics show an input offset voltage comparable to high-speed
voltage-feedback amplifiers. However, the two input bias
currents are somewhat higher and are unmatched. Whereas
bias current cancellation techniques are very effective with
most voltage-feedback op amps, they do not generally reduce the output DC offset for wideband current-feedback op
amps. Since the two input bias currents are unrelated in both
magnitude and polarity, matching the source impedance
looking out of each input to reduce their error contribution to
the output is ineffective. Evaluating the configuration of
Figure 1, using worst-case +25°C input offset voltage and the
two input bias currents, gives a worst-case output offset
range equal to:
± (NG • VOS(MAX)) + (IBN • RS/2 • NG) ± (IBI • RF)
1/2
OPA2691
RS
DC ACCURACY AND OFFSET CONTROL
EO
IBN
where NG = noninverting signal gain
= ± (2 • 3.0mV) + (35µA • 25Ω • 2) ± (402Ω • 25µA)
= ±6mV + 1.75mV ± 10.05mV
= –14.3mV → +17.8mV
ERS
RF
√ 4kTRS
4kT
RG
IBI
RG
DISABLE OPERATION (SO-14 ONLY)
√ 4kTRF
4kT = 1.6E –20J
at 290°K
FIGURE 10. Op Amp Noise Analysis Model.
The total output spot noise voltage can be computed as the
square root of the sum of all squared output noise voltage
contributors. Equation 4 shows the general form for the
output noise voltage using the terms shown in Figure 10.
The OPA2691I-14D provides an optional disable feature that
may be used either to reduce system power or to implement
a simple channel multiplexing operation. If the DIS control
pin is left unconnected, the OPA2691I-14D will operate
normally. To disable, the control pin must be asserted low.
Figure 11 shows a simplified internal circuit for the disable
control feature.
+VS
(4)
EO =
(E
NI
2
)
+ (IBN RS )2 + 4kTRS NG2 + (IBI RF )2 + 4kTRF NG
15kΩ
Dividing this expression by the noise gain (NG = (1 + RF/RG))
will give the equivalent input referred spot noise voltage at
the noninverting input, as shown in Equation 5.
 I R  2 4kTRF
EN = ENI 2 + (IBN RS )2 + 4kTRS +  BI F  +
 NG 
NG
(5)
Evaluating these two equations for the OPA2691 circuit and
component values presented in Figure 1 will give a total
output spot noise voltage of 8.08nV/√Hz and a total equivalent input spot noise voltage of 4.04nV/√Hz. This total input
referred spot noise voltage is higher than the 1.7nV/√Hz
specification for the op amp voltage noise alone. This reflects
the noise added to the output by the inverting current noise
times the feedback resistor. If the feedback resistor is reduced in high-gain configurations (as suggested previously),
the total input referred voltage noise given by Equation 5 will
approach just the 1.7nV/√Hz of the op amp itself. For
example, going to a gain of +10 using RF = 180Ω will give a
total input referred noise of 2.1nV/√Hz.
18
Q1
25kΩ
VDIS
110kΩ
IS
Control
–VS
FIGURE 11. Simplified Disable Control Circuit, Each Channel.
In normal operation, base current to Q1 is provided through
the 110kΩ resistor while the emitter current through the 15kΩ
resistor sets up a voltage drop that is inadequate to turn on
the two diodes in Q1’s emitter. As V DIS is pulled low, additional current is pulled through the 15kΩ resistor, eventually
turning on these two diodes (≈ 100µA). At this point, any
further current pulled out of V DIS goes through those diodes
OPA2691
www.ti.com
SBOS224D
holding the emitter-base voltage of Q1 at approximately 0V.
This shuts off the collector current out of Q1, turning the
amplifier off. The supply currents in the disable mode are only
those required to operate the circuit of Figure 11. Additional
circuitry ensures that turn-on time occurs faster than turn-off
time (make-before-break).
When disabled, the output and input nodes go to a high
impedance state. If the OPA2691 is operating in a gain of +1,
this will show a very high impedance (4pF || 1MΩ) at the
output and exceptional signal isolation. If operating at a
gain greater than +1, the total feedback network resistance
(RF + RG) will appear as the impedance looking back into the
output, but the circuit will still show very high forward and
reverse isolation. If configured as an inverting amplifier, the
input and output will be connected through the feedback
network resistance (RF + RG) giving relatively poor input to
output isolation.
deliver load power. Quiescent power is simply the specified
no-load supply current times the total supply voltage across
the part. PDL will depend on the required output signal and
load but would, for a grounded resistive load, be at a
maximum when the output is fixed at a voltage equal to 1/2
of either supply voltage (for equal bipolar supplies). Under
this condition, PDL = VS2/(4 • RL) where RL includes feedback
network loading.
Note that it is the power in the output stage and not into the
load that determines internal power dissipation.
As a worst-case example, compute the maximum TJ using an
OPA2691 SO-8 in the circuit of Figure 1 operating at the
maximum specified ambient temperature of +85°C with both
outputs driving a grounded 20Ω load to +2.5V.
PD = 10V • 11.5mA + 2 • [52/(4 • (20Ω || 804Ω))] = 756mW
Maximum TJ = +85°C + (0.756 • 125°C/W) = 179.5°C
The transition edge rate (dv/dt) of the DIS control line will
influence this glitch. For the plot of Figure 12, the edge rate
was reduced until no further reduction in glitch amplitude was
observed. This approximately 1V/ns maximum slew rate may
be achieved by adding a simple RC filter into the VDIS pin
from a higher speed logic line. If extremely fast transition
logic is used, a 2kΩ series resistor between the logic gate
and the V DIS input pin will provide adequate bandlimiting
using just the parasitic input capacitance on the V DIS pin
while still ensuring adequate logic level swing.
BOARD LAYOUT GUIDELINES
6.0
4.0
2.0
Output Voltage (10mV/div)
0.0
VDIS (2V/div)
One key parameter in disable operation is the output glitch
when switching in and out of the disabled mode. Figure 12
shows these glitches for the circuit of Figure 1 with the input
signal set to 0V. The glitch waveform at the output pin is
plotted along with the DIS pin voltage.
This absolute worst-case condition exceeds specified maximum junction temperature. Normally this extreme case will
not be encountered. Careful attention to internal power
dissipation is required.
30
20
10
0
–10
–20
–30
Time (20ns/div)
FIGURE 12. Disable/Enable Glitch.
THERMAL ANALYSIS
Due to the high output power capability of the OPA2691,
heatsinking or forced airflow may be required under extreme
operating conditions. Maximum desired junction temperature
will set the maximum allowed internal power dissipation as
described below. In no case should the maximum junction
temperature be allowed to exceed 175°C. Operating junction
temperature (TJ) is given by TA + PD • θJA. The total internal
power dissipation (PD) is the sum of quiescent power (PDQ)
and additional power dissipation in the output stage (PDL) to
Achieving optimum performance with a high-frequency amplifier like the OPA2691 requires careful attention to board
layout parasitics and external component types. Recommendations that will optimize performance include:
a) Minimize parasitic capacitance to any AC ground for all
of the signal I/O pins. Parasitic capacitance on the output and
inverting input pins can cause instability: on the noninverting
input, it can react with the source impedance to cause
unintentional bandlimiting. To reduce unwanted capacitance,
a window around the signal I/O pins should be opened in all
of the ground and power planes around those pins. Otherwise, ground and power planes should be unbroken elsewhere on the board.
b) Minimize the distance (< 0.25") from the power-supply
pins to high-frequency 0.1µF decoupling capacitors. At the
device pins, the ground and power plane layout should not
be in close proximity to the signal I/O pins. Avoid narrow
power and ground traces to minimize inductance between
the pins and the decoupling capacitors. The power-supply
connections (on pins 4 and 7) should always be decoupled
with these capacitors. An optional supply decoupling capacitor across the two power supplies (for bipolar operation) will
improve 2nd-harmonic distortion performance. Larger (2.2µF
to 6.8µF) decoupling capacitors, effective at lower frequency,
should also be used on the main supply pins. These may be
placed somewhat farther from the device and may be shared
among several devices in the same area of the PCB.
c) Careful selection and placement of external components will preserve the high-frequency performance of
the OPA2691. Resistors should be a very low reactance
type. Surface-mount resistors work best and allow a tighter
overall layout. Metal film and carbon composition axiallyleaded resistors can also provide good high-frequency performance. Again, keep their leads and PCB trace length as
OPA2691
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19
short as possible. Never use wirewound type resistors in a
high-frequency application. Since the output pin and inverting input pin are the most sensitive to parasitic capacitance,
always position the feedback and series output resistor, if
any, as close as possible to the output pin. Other network
components, such as noninverting input termination resistors, should also be placed close to the package. Where
double-side component mounting is allowed, place the feedback resistor directly under the package on the other side of
the board between the output and inverting input pins. The
frequency response is primarily determined by the feedback
resistor value as described previously. Increasing its value
will reduce the bandwidth, while decreasing it will give a more
peaked frequency response. The 402Ω feedback resistor
used in the electrical characteristics at a gain of +2 on ±5V
supplies is a good starting point for design. Note that a 453Ω
feedback resistor, rather than a direct short, is recommended
for the unity-gain follower application. A current-feedback op
amp requires a feedback resistor even in the unity-gain
follower configuration to control stability.
d) Connections to other wideband devices on the board
may be made with short direct traces or through onboard
transmission lines. For short connections, consider the trace
and the input to the next device as a lumped capacitive load.
Relatively wide traces (50mils to 100mils) should be used,
preferably with ground and power planes opened up around
them. Estimate the total capacitive load and set RS from the
plot of Recommended RS vs Capacitive Load. Low parasitic
capacitive loads (< 5pF) may not need an RS since the
OPA2691 is nominally compensated to operate with a 2pF
parasitic load. If a long trace is required, and the 6dB signal
loss intrinsic to a doubly-terminated transmission line is
acceptable, implement a matched impedance transmission
line using microstrip or stripline techniques (consult an ECL
design handbook for microstrip and stripline layout techniques). A 50Ω environment is normally not necessary on
board, and in fact a higher impedance environment will
improve distortion as shown in the Distortion vs Load plots.
With a characteristic board trace impedance defined based
on board material and trace dimensions, a matching series
resistor into the trace from the output of the OPA2691 is used
as well as a terminating shunt resistor at the input of the
destination device. Remember also that the terminating impedance will be the parallel combination of the shunt resistor
and the input impedance of the destination device: this total
effective impedance should be set to match the trace impedance. The high output voltage and current capability of the
OPA2691 allows multiple destination devices to be handled
20
as separate transmission lines, each with their own series
and shunt terminations. If the 6dB attenuation of a doublyterminated transmission line is unacceptable, a long trace
can be series-terminated at the source end only. Treat the
trace as a capacitive load in this case and set the series
resistor value as shown in the plot of RS vs Capacitive Load.
This will not preserve signal integrity as well as a doublyterminated line. If the input impedance of the destination
device is low, there will be some signal attenuation due to the
voltage divider formed by the series output into the terminating impedance.
e) Socketing a high-speed part like the OPA2691 is not
recommended. The additional lead length and pin-to-pin
capacitance introduced by the socket can create an extremely troublesome parasitic network which can make it
almost impossible to achieve a smooth, stable frequency
response. Best results are obtained by soldering the OPA2691
onto the board.
INPUT AND ESD PROTECTION
The OPA2691 is built using a very high-speed complementary bipolar process. The internal junction breakdown voltages are relatively low for these very small geometry devices. These breakdowns are reflected in the Absolute Maximum Ratings table. All device pins have limited ESD protection using internal diodes to the power supplies, as shown in
Figure 13.
These diodes provide moderate protection to input overdrive
voltages above the supplies as well. The protection diodes
can typically support 30mA continuous current. Where higher
currents are possible (for example, in systems with ±15V
supply parts driving into the OPA2691), current-limiting series resistors should be added into the two inputs. Keep
these resistor values as low as possible since high values
degrade both noise performance and frequency response.
+V CC
External
Pin
Internal
Circuitry
–V CC
FIGURE 12. Internal ESD Protection.
OPA2691
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SBOS224D
Revision History
DATE
REVISION
7/08
D
2/07
C
PAGE
SECTION
2
Abs Max Ratings
3, 4
Electrical Characteristics,
Power Supply
8
Typical Characteristics
DESCRIPTION
Changed Storage Temperature Range from −40°C to +125C to
−65°C to +125C.
Added minimum supply voltage.
Changed Closed-Loop Output Impedance vs Frequency plot.
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
OPA2691
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21
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
OPA2691I-14D
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
OPA2691
OPA2691I-14DG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
OPA2691
OPA2691I-14DR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
OPA2691
OPA2691I-14DRG4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
OPA2691
OPA2691ID
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
OPA
2691
OPA2691IDG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
OPA
2691
OPA2691IDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
OPA
2691
OPA2691IDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
OPA
2691
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
OPA2691I-14DR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
OPA2691IDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
OPA2691I-14DR
SOIC
D
14
2500
367.0
367.0
38.0
OPA2691IDR
SOIC
D
8
2500
367.0
367.0
35.0
Pack Materials-Page 2
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