NCP186 Fast Transient Response Low Voltage 1 A LDO The NCP186x series are CMOS LDO regulators featuring 1 A output current. The input voltage is as low as 1.8 V and the output voltage can be set from 1.2 V. www.onsemi.com Features • • • • • • • • • • • • Operating Input Voltage Range: 1.8 V to 5.5 V Output Voltage Range: 1.2 to 3.9 V Quiescent Current typ. 90 mA Low Dropout: 100 mV typ. at 1 A, VOUT = 3.0 V High Output Voltage Accuracy ±1% Stable with Small 1 mF Ceramic Capacitors Over−current Protection Built−in Soft Start Circuit to Suppress Inrush Current Thermal Shutdown Protection: 165°C With (NCP186A) and Without (NCP186B) Output Discharge Function Available in Small xDFN8 1.2 x 1.6 mm Package These are Pb−free Devices Typical Applications • Battery Powered Equipment • Portable Communication Equipment • Cameras, Image Sensors and Camcorders VIN PIN CONNECTIONS OUT 1 8 IN OUT 2 7 IN N/C 3 6 EN FB 4 5 GND (Top View) MARKING DIAGRAM VOUT IN CIN 1 mF XDFN8 MX SUFFIX CASE 711AS OUT ON EN GND XXMG G COUT 1 mF NCP186 FB XX = Specific Device Code M = Date Code G = Pb−Free Package OFF Figure 1. Typical Application Schematic (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the ordering information section on page 4 of this data sheet. © Semiconductor Components Industries, LLC, 2015 June, 2015 − Rev. 0 1 Publication Order Number: NCP186/D NCP186 IN OUT VOLTAGE REFERENCE AND SOFT−START IN OUT VOLTAGE REFERENCE AND SOFT−START FB FB EN EN 0.7 V 0.7 V GND THERMAL SHUTDOWN GND THERMAL SHUTDOWN NCP186A (with output discharge) NCP186B (without output discharge) Figure 2. Internal Block Diagram Table 1. PIN FUNCTION DESCRIPTION Pin No. XDFN6 Pin Name Description 1 OUT LDO output pin 3 N/C Not internally connected. This pin can be tied to the ground plane to improve thermal dissipation. 4 FB Feedback input pin 5 GND Ground pin 6 EN Chip enable input pin (active “H”) 7 IN Power supply input pin EPAD It’s recommended to connect the EPAD to GND, but leaving it open is also acceptable 2 8 EPAD Table 2. ABSOLUTE MAXIMUM RATINGS Rating Input Voltage (Note 1) Output Voltage Chip Enable Input Symbol Value Unit IN −0.3 to 6.0 V OUT −0.3 to VIN + 0.3 V EN −0.3 to 6.0 V IOUT Internally Limited mA TJ(MAX) 150 °C TSTG −55 to 150 °C ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V ESD Capability, Machine Model (Note 2) ESDMM 200 V Output Current Maximum Junction Temperature Storage Temperature Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114) ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115) Latchup Current Maximum Rating tested per JEDEC standard: JESD78 Table 3. THERMAL CHARACTERISTICS Rating Thermal Resistance, Junction−to−Air, XDFN8 1.2 mm x 1.6 mm www.onsemi.com 2 Symbol Value Unit RqJA 111 °C/W NCP186 Table 4. ELECTRICAL CHARACTERISTICS VIN = VOUT_NOM + 0.5 V or VIN = 1.8 V whichever is greater; IOUT = 1 mA; CIN = COUT = 1.0 mF (effective capacitance) (Note 3); VEN = 1.2 V; TJ = 25°C; unless otherwise noted. The specifications in bold are guaranteed at −40°C ≤ TJ ≤ 125°C. Parameter Test Conditions Operating Input Voltage Output Voltage VOUT_NOM + 0.5 V ≤ VIN ≤ 5.5 V, IOUT = 0 to 1 A, −40°C ≤ TJ ≤ 85°C Symbol Min VIN VOUT VOUT_NOM + 0.5 V ≤ VIN ≤ 5.5 V, IOUT = 0 to 1 A, −40°C ≤ TJ ≤ 125°C Typ Max Unit 1.8 5.5 V −1.0 1.0 % −2.0 1.0 Load Regulation IOUT = 1 mA to 1000 mA LoadReg 0.7 5.0 mV Line Regulation VIN = VOUT_NOM + 0.5 V to 5.0 V LineReg 0.002 0.1 %/V Dropout Voltage IOUT = 1 A VDO 405 585 mV VOUT_NOM = 1.75 V 180 295 VOUT_NOM = 1.8 V 175 285 VOUT_NOM = 1.85 V 170 280 VOUT_NOM = 2.5 V 120 190 VOUT_NOM = 2.8 V 110 170 VOUT_NOM = 3.0 V 100 160 VOUT_NOM = 3.3 V 95 145 VOUT_NOM = 3.5 V 92 135 VOUT_NOM = 3.9 V 86 130 IQ 90 140 mA 0.1 1.5 mA VOUT_NOM = 1.2 V When VOUT falls to VOUT_NOM – 100 mV Quiescent Current IOUT = 0 mA Standby Current VEN = 0 V ISTBY Output Current Limit VOUT = 90% of VOUT_NOM IOCL 1100 1400 mA Output Short Circuit Current VOUT = 0 V IOSC 1100 1400 mA Enable Input Current Enable Threshold Voltage IEN 0.15 0.6 mA V EN Input Voltage “H” VENH EN Input Voltage “L” VENL Power Supply Rejection Ratio VIN = VOUT_NOM + 1.0 V, Ripple 0.2 Vp−p, IOUT = 30 mA, f = 1 kHz PSRR 75 dB Output Noise f = 10 Hz to 100 kHz VN 48 mVRMS Output Discharge Resistance (NCP186A option only) VIN = 5.5 V, VEN = 0 V, VOUT = 1.8 V RAD 34 W Thermal Shutdown Temperature Temperature rising from TJ = +25°C TSD 165 °C TSDH 20 °C Thermal Shutdown Hysteresis Temperature falling from TSD 1.0 0.4 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. Effective capacitance, including the effect of DC bias, tolerance and temperature. See the Application Information section for more information. www.onsemi.com 3 NCP186 ORDERING INFORMATION TABLE Part Number Voltage Option Marking Option NCP186AMX120TAG 1.2 V FA With active discharge NCP186AMX175TAG 1.75 V FC With active discharge NCP186AMX180TAG 1.8 V FD With active discharge NCP186AMX185TAG 1.85 V FL With active discharge NCP186AMX250TAG 2.5 V FE With active discharge NCP186AMX280TAG 2.8 V FF With active discharge NCP186AMX300TAG 3.0 V FG With active discharge NCP186AMX330TAG 3.3 V FH With active discharge NCP186AMX350TAG 3.5 V FJ With active discharge NCP186AMX390TAG 3.9 V FK With active discharge NCP186BMX120TAG 1.2 V HA Without active discharge NCP186BMX175TAG 1.75 V HC Without active discharge NCP186BMX180TAG 1.8 V HD Without active discharge NCP186BMX185TAG 1.85 V HL Without active discharge NCP186BMX250TAG 2.5 V HE Without active discharge NCP186BMX280TAG 2.8 V HF Without active discharge NCP186BMX300TAG 3.0 V HG Without active discharge NCP186BMX330TAG 3.3 V HH Without active discharge NCP186BMX350TAG 3.5 V HJ Without active discharge NCP186BMX390TAG 3.9 V HK Without active discharge Package Shipping XDFN−8 (Pb−Free) 3000/Tape&Reel 711AS XDFN−8 (Pb−Free) 3000/Tape&Reel 711AS www.onsemi.com 4 NCP186 TYPICAL CHARACTERISTICS 1.212 1.209 1.814 1.206 1.809 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) VIN = VOUT−NOM + 0.5 V or VIN = 1.8 V, whichever is greater, VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C. 1.203 1.200 1.197 1.194 1.191 1.188 1.185 1.182 1.179 1.176 −40 0 20 40 60 80 100 120 1.789 1.784 1.779 40 60 80 100 120 3.932 3.922 3.284 3.274 3.264 3.254 VOUT−NOM = 3.3 V −20 0 20 40 60 80 3.912 3.902 3.892 3.882 3.872 3.862 3.852 VOUT−NOM = 3.9 V 3.842 3.244 100 3.832 3.822 −40 120 −20 0 20 40 60 80 100 TEMPERATURE (°C) TEMPERATURE (°C) Figure 5. Output Voltage vs. Temperature Figure 6. Output Voltage vs. Temperature 0.10 120 5 VOUT−NOM = 1.2 V VOUT−NOM = 1.8 V VOUT−NOM = 3.3 V VOUT−NOM = 3.9 V VOUT−NOM = 1.2 V VOUT−NOM = 1.8 V VOUT−NOM = 3.3 V VOUT−NOM = 3.9 V 4 LOAD REGULATION (mV) LINE REGULATION (%/V) 20 Figure 4. Output Voltage vs. Temperature 3.294 0.04 0 Figure 3. Output Voltage vs. Temperature 3.304 0.06 −20 TEMPERATURE (°C) 3.314 0.08 VOUT−NOM = 1.8 V TEMPERATURE (°C) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 1.794 1.769 1.764 −40 3.324 3.234 −40 1.799 1.774 VOUT−NOM = 1.2 V −20 1.804 0.02 0 −0.02 −0.04 −0.06 VIN = VOUT−NOM + 0.5 V to 5.0 V, VIN ≥ 1.8 V −0.08 −0.10 −40 −20 0 20 40 60 80 100 120 3 2 1 0 −1 −2 IOUT = 1 mA to 1000 mA −3 −4 −5 −40 −20 0 20 40 60 80 100 TEMPERATURE (°C) TEMPERATURE (°C) Figure 7. Line Regulation vs. Temperature Figure 8. Load Regulation vs. Temperature www.onsemi.com 5 120 NCP186 TYPICAL CHARACTERISTICS VIN = VOUT−NOM + 0.5 V or VIN = 1.8 V, whichever is greater, VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C. 275 275 250 VOUT−NOM = 1.8 V DROPOUT VOLTAGE (mV) DROPOUT VOLTAGE (mV) 250 TJ = 125°C 225 TJ = 25°C 200 175 150 125 TJ = −40°C 100 75 50 25 0 0 200 400 600 800 1000 175 150 125 IOUT = 500 mA 100 75 IOUT = 200 mA 50 −20 0 20 40 IOUT = 10 mA 100 120 80 60 OUTPUT CURRENT (mA) TEMPERATURE (°C) Figure 9. Dropout Voltage vs. Output Current Figure 10. Dropout Voltage vs. Temperature 140 TJ = 125°C VOUT−NOM = 3.3 V VOUT−NOM = 3.3 V 120 DROPOUT VOLTAGE (mV) DROPOUT VOLTAGE (mV) IOUT = 1000 mA 200 25 0 −40 140 TJ = 25°C 100 80 60 TJ = −40°C 40 120 IOUT = 1000 mA 100 80 IOUT = 500 mA 60 40 IOUT = 200 mA 20 20 0 0 200 400 600 800 IOUT = 10 mA 0 −40 1000 −20 0 20 40 60 80 100 120 OUTPUT CURRENT (mA) TEMPERATURE (°C) Figure 11. Dropout Voltage vs. Output Current Figure 12. Dropout Voltage vs. Temperature 450 120 QUIESCENT CURRENT (mA) TJ = 125°C TJ = 25°C 400 GROUND CURRENT (mA) VOUT−NOM = 1.8 V 225 350 TJ = −40°C 300 250 200 150 100 50 110 100 VOUT−NOM = 1.2 V 90 VOUT−NOM = 1.8 V VOUT−NOM = 3.3 V 80 VOUT−NOM = 3.9 V 70 VOUT−NOM = 1.8 V IOUT = 0 mA 0 0 200 400 600 800 60 −40 1000 −20 0 20 40 60 80 100 120 OUTPUT CURRENT (mA) TEMPERATURE (°C) Figure 13. Ground Current vs. Output Current Figure 14. Quiescent Current vs. Temperature www.onsemi.com 6 NCP186 TYPICAL CHARACTERISTICS VIN = VOUT−NOM + 0.5 V or VIN = 1.8 V, whichever is greater, VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C. 120 110 100 TJ = −40°C 90 80 70 VOUT−NOM = 1.8 V IOUT = 0 mA 60 2.5 3.0 3.5 4.5 4.0 5.0 5.5 0.6 0.5 0.4 0.3 0.2 VEN = 0 V −20 0 20 40 60 80 100 120 TEMPERATURE (°C) Figure 15. Quiescent Current vs. Input Voltage Figure 16. Standby Current vs. Temperature OUTPUT CURRENT LIMIT (A) 1.9 2.0 VOUT−NOM = 3.9 V VOUT−NOM = 3.3 V 1.8 1.7 VOUT−NOM = 1.2 V 1.6 1.5 1.4 VOUT−NOM = 1.8 V 1.3 1.2 1.1 −40 VOUT−FORCED = 0 V −20 0 20 40 60 80 100 120 VOUT−NOM = 1.8 V 1.9 VOUT−NOM = 3.9 V VOUT−NOM = 3.3 V 1.8 1.7 VOUT−NOM = 1.2 V 1.6 1.5 1.4 1.3 1.2 1.1 −40 VOUT−FORCED = 90% of VOUT−NOM −20 0 20 40 60 80 100 TEMPERATURE (°C) TEMPERATURE (°C) Figure 17. Short Circuit Current vs. Temperature Figure 18. Output Current Limit vs. Temperature 120 0.6 1.0 0.9 ENABLE INPUT CURRENT (mA) SHORT CIRCUIT CURRENT (A) 0.7 INPUT VOLTAGE (V) 2.0 ENABLE THRESHOLD VOLTAGE (V) 0.8 0.1 0 −40 50 2.0 VOUT−NOM = 1.2 V VOUT−NOM = 1.8 V VOUT−NOM = 3.3 V VOUT−NOM = 3.9 V 0.9 STANDBY CURRENT (mA) QUIESCENT CURRENT (mA) 1.0 TJ = 125°C TJ = 25°C OFF −> ON 0.8 ON −> OFF 0.7 0.6 0.5 0.4 −40 −20 0 20 40 60 80 100 0.5 0.4 0.3 0.2 0.1 0 −40 120 VOUT−NOM = 1.2 V VOUT−NOM = 1.8 V VOUT−NOM = 3.3 V VOUT−NOM = 3.9 V −20 0 20 40 60 80 100 TEMPERATURE (°C) TEMPERATURE (°C) Figure 19. Enable Threshold Voltage vs. Temperature Figure 20. Enable Input Current vs. Temperature www.onsemi.com 7 120 NCP186 TYPICAL CHARACTERISTICS 90 50 45 VOUT−FORCED = VOUT−NOM VIN = 5.5 V VEN = 0 V 80 70 60 PSRR (dB) 40 35 30 20 −40 50 COUT = 1 mF X7R 0805 40 30 20 VOUT−NOM = 1.2 V VOUT−NOM = 3.3 V 25 VOUT−NOM = 1.8 V, VIN = 2.8 V VOUT−NOM = 3.3 V, VIN = 4.3 V 10 0 −20 0 20 40 60 80 100 120 10 100 1k 10k 100k 1M TEMPERATURE (°C) FREQUENCY (Hz) Figure 21. Output Discharge Resistance vs. Temperature (NCP186A option only) Figure 22. Power Supply Rejection Ratio OUTPUT VOLTAGE NOISE (nV/√Hz) 6 VOUT−NOM = 1.8 V, VIN = 2.8 V VOUT−NOM = 3.9 V, VIN = 4.9 V 5 COUT = 1 mF X7R 0805 4 Integral Noise: VOUT−NOM = 1.8 V 10 Hz − 100 kHz: 45 mVrms 10 Hz − 1 MHz: 61 mVrms VOUT−NOM = 3.9 V 10 Hz − 100 kHz: 52 mVrms 10 Hz − 1 MHz: 68 mVrms 3 2 1 0 10 100 1K 10K 100K 1M FREQUENCY (Hz) Figure 23. Output Voltage Noise Spectral Density 100 mA/div VOUT−NOM = 1.2 V IIN VIN VOUT 1 V/div 50 mA/div VOUT−NOM = 1.2 V 1 V/div OUTPUT DISCHARGE RESISTANCE (W) VIN = VOUT−NOM + 0.5 V or VIN = 1.8 V, whichever is greater, VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C. IIN VIN VOUT 1 ms/div 20 ms/div Figure 24. Turn−ON/OFF − VIN driven (slow) Figure 25. Turn−ON − VIN driven (fast) www.onsemi.com 8 10M NCP186 TYPICAL CHARACTERISTICS VIN = VOUT−NOM + 0.5 V or VIN = 1.8 V, whichever is greater, VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C. VOUT−NOM = 3.9 V 100 mA/div 50 mA/div VOUT−NOM = 3.9 V IIN VIN IIN VIN VOUT 1 V/div 1 V/div VOUT 20 ms/div 1 ms/div 500 mV/div 1 V/div VEN VOUT−NOM = 1.2 V Device with output discharge VEN VOUT VOUT−NOM = 1.8 V Device without output discharge 50 mA/div 50 mA/div VOUT Figure 27. Turn−ON − VIN driven (fast) 500 mV/div 1 V/div Figure 26. Turn−ON/OFF − VIN driven (slow) IIN IIN 200 ms/div 200 ms/div Figure 28. Turn−ON/OFF − EN driven Figure 29. Turn−ON/OFF − EN driven VOUT−NOM = 3.9 V 500 mV/div VIN tR = tF = 1 ms 1.8 V 10 mV/div 10 mV/div 500 mV/div VOUT−NOM = 1.2 V 2.8 V VOUT 1.2 V 5.4 V VIN tR = tF = 1 ms 4.4 V VOUT 3.9 V 10 ms/div 10 ms/div Figure 30. Line Transient Response Figure 31. Line Transient Response www.onsemi.com 9 NCP186 TYPICAL CHARACTERISTICS 1 V/div VIN 500 mA/div 1000 mA tR = tF = 1 ms 1 mA 1.2 V VIN 1000 mA tR = tF = 1 ms IOUT 1 mA VOUT 3.9 V VOUT−NOM = 1.2 V VOUT−NOM = 3.9 V 10 ms/div 10 ms/div Figure 32. Load Transient Response Figure 33. Load Transient Response 220 1.6 200 PD(MAX), 2 oz Cu 1.4 180 1.2 160 PD(MAX), 1 oz Cu 1.0 140 0.8 120 qJA, 1 oz Cu 0.6 100 qJA, 2 oz Cu 0.4 80 0.2 60 0 100 200 300 400 500 0 600 PCB COPPER AREA (mm2) Figure 34. qJA and PD(MAX) vs. Copper Area www.onsemi.com 10 PD(MAX), MAXIMUM POWER DISSIPATION (W) VOUT 50 mV/div IOUT qJA, JUNCTION−TO−AMBIENT THERMAL RESISTANCE (°C/W) 50 mV/div 500 mA/div 1 V/div VIN = VOUT−NOM + 0.5 V or VIN = 1.8 V, whichever is greater, VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C. NCP186 APPLICATIONS INFORMATION General Enable Operation The NCP186 is a high performance 1 A low dropout linear regulator (LDO) delivering excellent noise and dynamic performance. Thanks to its adaptive ground current behavior the device consumes only 90 mA typ. of quiescent current (no−load condition). The regulator features low noise of 48 mVRMS, PSRR of 75 dB at 1 kHz and very good line/load transient performance. Such excellent dynamic parameters, small dropout voltage and small package size make the device an ideal choice for powering the precision noise sensitive circuitry in portable applications. A logic EN input provides ON/OFF control of the output voltage. When the EN is low the device consumes as low as 100 nA typ. from the IN pin. The device is fully protected in case of output overload, output short circuit condition or overheating, assuring a very robust design. The LDO uses the EN pin to enable/disable its operation and to deactivate/activate the output discharge function (A−version only). If the EN pin voltage is < 0.4 V the device is disabled and the pass transistor is turned off so there is no current flow between the IN and OUT pins. On A−version the active discharge transistor is active so the output voltage is pulled to GND through 34 W (typ.) resistor. If the EN pin voltage is > 1.0 V the device is enabled and regulates the output voltage. The active discharge transistor is turned off. The EN pin has internal pull−down current source with value of 150 nA typ. which assures the device is turned off when the EN pin is unconnected. In case when the EN function isn’t required the EN pin should be tied directly to IN pin. Output Current Limit Output current is internally limited to a 1.4 A typ. The LDO will source this current when the output voltage drops down from the nominal output voltage (test condition is VOUT−NOM – 100mV). If the output voltage is shorted to ground, the short circuit protection will limit the output current to 1.4 A typ. The current limit and short circuit protection will work properly over the whole temperature and input voltage ranges. There is no limitation for the short circuit duration. Input Capacitor Selection (CIN) Input capacitor connected as close as possible is necessary to ensure device stability. The X7R or X5R capacitor should be used for reliable performance over temperature range. The value of the input capacitor should be 1 mF or greater for the best dynamic performance. This capacitor will provide a low impedance path for unwanted AC signals or noise modulated onto the input voltage. There is no requirement for the ESR of the input capacitor but it is recommended to use ceramic capacitor for its low ESR and ESL. A good input capacitor will limit the influence of input trace inductance and source resistance during load current changes. Thermal Shutdown When the LDO’s die temperature exceeds the thermal shutdown threshold value the device is internally disabled. The IC will remain in this state until the die temperature decreases by value called thermal shutdown hysteresis. Once the IC temperature falls this way the LDO is back enabled. The thermal shutdown feature provides the protection against overheating due to some application failure and it is not intended to be used as a normal working function. Output Capacitor Selection (COUT) The LDO requires an output capacitor connected as close as possible to the output and ground pins. The recommended capacitor value is 1 mF, ceramic X7R or X5R type due to its low capacitance variations over the specified temperature range. The LDO is designed to remain stable with minimum effective capacitance of 0.8 mF. When selecting the capacitor the changes with temperature, DC bias and package size needs to be taken into account. Especially for small package size capacitors such as 0201 the effective capacitance drops rapidly with the applied DC bias voltage (refer the capacitor’s datasheet for details). There is no requirement for the minimum value of equivalent series resistance (ESR) for the COUT but the maximum value of ESR should be less than 0.5 W. Larger capacitance and lower ESR improves the load transient response and high frequency PSRR. Only ceramic capacitors are recommended, the other types like tantalum capacitors not due to their large ESR. Power Dissipation Power dissipation caused by voltage drop across the LDO and by the output current flowing through the device needs to be dissipated out from the chip. The maximum power dissipation is dependent on the PCB layout, number of used Cu layers, Cu layers thickness and the ambient temperature. The maximum power dissipation can be computed by following equation: P D(MAX) + TJ * TA [W] q JA (eq. 1) Where (TJ − TA) is the temperature difference between the junction and ambient temperatures and θJA is the thermal resistance (dependent on the PCB as mentioned above). www.onsemi.com 11 NCP186 The power dissipated by the LDO for given application conditions can be calculated by the next equation: P D + V IN @ I GND ) ǒV IN * V OUTǓ @ I OUT [W] 100 kHz) can be tuned by the selection of COUT capacitor and proper PCB layout. A simple LC filter could be added to the LDO’s IN pin for further PSRR improvement. (eq. 2) Enable Turn−On Time Where IGND is the LDO’s ground current, dependent on the output load current. Connecting the exposed pad and N/C pin to a large ground planes helps to dissipate the heat from the chip. The relation of θJA and PD(MAX) to PCB copper area and Cu layer thickness could be seen on the Figure 34. The enable turn−on time is defined as the time from EN assertion to the point in which VOUT will reach 98% of its nominal value. This time is dependent on various application conditions such as VOUT−NOM, COUT and TA. PCB Layout Recommendations To obtain good transient performance and good regulation characteristics place CIN and COUT capacitors as close as possible to the device pins and make the PCB traces wide. In order to minimize the solution size, use 0402 or 0201 capacitors size with appropriate effective capacitance. Larger copper area connected to the pins will also improve the device thermal resistance. The actual power dissipation can be calculated from the equation above (Power Dissipation section). Exposed pad and N/C pin should be tied to the ground plane for good power dissipation. Reverse Current The PMOS pass transistor has an inherent body diode which will be forward biased in the case when VOUT > VIN. Due to this fact in cases, where the extended reverse current condition can be anticipated the device may require additional external protection. Power Supply Rejection Ratio The LDO features very high power supply rejection ratio. The PSRR at higher frequencies (in the range above www.onsemi.com 12 NCP186 PACKAGE DIMENSIONS XDFN8 1.6x1.2, 0.4P CASE 711AS ISSUE A D 8X ÍÍÍ ÍÍÍ ÍÍÍ 0.10 C 0.10 C 2X 0.10 C L1 DETAIL A OPTIONAL CONSTRUCTION E PIN ONE IDENTIFIER 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. L A B DIM A A1 b D D2 E E2 e L L1 ÉÉ ÉÉ ÇÇ EXPOSED Cu TOP VIEW MOLD CMPD DETAIL B OPTIONAL CONSTRUCTION A DETAIL B MILLIMETERS MIN MAX 0.30 0.45 0.00 0.05 0.13 0.23 1.60 BSC 1.20 1.40 1.20 BSC 0.20 0.40 0.40 BSC 0.15 0.25 0.05 REF A1 8X RECOMMENDED MOUNTING FOOTPRINT* 0.08 C NOTE 3 C SIDE VIEW 1.44 PACKAGE OUTLINE 8X 0.35 D2 DETAIL A 1 8X SEATING PLANE 1.40 4 E2 L1 0.44 8X 1 0.26 0.40 PITCH DIMENSIONS: MILLIMETERS 8 8X L 5 8X e e/2 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. b 0.10 C A B 0.05 C BOTTOM VIEW ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 www.onsemi.com 13 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCP186/D