LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 LMV321-N/LMV321-N-Q1/LMV358-N/LMV358-N-Q1/LMV324-N/LMV324-N-Q1 Single/Dual/Quad General Purpose, Low Voltage, Rail-to-Rail Output Operational Amplifiers Check for Samples: LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1, LMV324-N, LMV324-N-Q1 FEATURES DESCRIPTION 1 • • • • • • • • • • • • − + (For V = 5V and V = 0V, unless otherwise specified) LMV321-N, LMV358-N, and LMV324-N are available in Automotive AEC-Q100 Grade 1 & 3 versions Guaranteed 2.7V and 5V performance No crossover distortion Industrial temperature range −40°C to +125°C Gain-bandwidth product 1 MHz Low supply current LMV321-N 130 μA LMV358-N 210 μA LMV324-N 410 μA Rail-to-rail output swing @ 10 kΩ V+− 10 mV & V−+ 65 mV VCM Range −0.2V to V+− 0.8V APPLICATIONS • • • Active filters General purpose low voltage applications General purpose portable devices Gain and Phase vs. Capacitive Load The LMV358-N/LMV324-N are low voltage (2.7V to 5.5V) versions of the dual and quad commodity op amps LM358/LM324 (5V to 30V). The LMV321-N is the single channel version. The LMV321-N/LMV358N/LMV324-N are the most cost effective solutions for applications where low voltage operation, space efficiency, and low price are important. They offer specifications that meet or exceed the familiar LM358/LM324. The LMV321-N/LMV358-N/LMV324-N have rail-to-rail output swing capability and the input common-mode voltage range includes ground. They all exhibit excellent speed to power ratio, achieving 1 MHz of bandwidth and 1 V/µs slew rate with low supply current. The LMV321-N is available in the space saving 5-Pin SC70, which is approximately half the size of the 5Pin SOT23. The small package saves space on PC boards and enables the design of small portable electronic devices. It also allows the designer to place the device closer to the signal source to reduce noise pickup and increase signal integrity. The chips are built with Texas Instruments's advanced submicron silicon-gate BiCMOS process. The LMV321-N/LMV358-N/LMV324-N have bipolar input and output stages for improved noise performance and higher output current drive. Output Voltage Swing vs. Supply Voltage 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2013, Texas Instruments Incorporated LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings ESD Tolerance (1) (2) (3) Human Body Model LMV358-N/LMV324-N 2000V LMV321-N 900V Machine Model 100V Differential Input Voltage ±Supply Voltage −0.3V to +Supply Voltage Input Voltage Supply Voltage (V+–V −) 5.5V Output Short Circuit to V + (4) Output Short Circuit to V − (5) Soldering Information Infrared or Convection (30 sec) 260°C −65°C to 150°C Storage Temp. Range Junction Temperature (1) (2) (3) (4) (5) (6) (6) 150°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for availability and specifications. Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC Shorting output to V+ will adversely affect reliability. Shorting output to V-will adversely affect reliability. The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board. Operating Ratings (1) Supply Voltage 2.7V to 5.5V Temperature Range (2) −40°C to +125°C LMV321-N/LMV358-N/LMV324-N Thermal Resistance (θ JA) (1) (2) (3) 2 (3) 5-pin SC70 478°C/W 5-pin SOT23 265°C/W 8-Pin SOIC 190°C/W 8-Pin MSOP 235°C/W 14-Pin SOIC 145°C/W 14-Pin TSSOP 155°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board. All numbers are typical, and apply for packages soldered directly onto a PC board in still air. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 2.7V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = 1.0V, VO = V+/2 and RL > 1 MΩ. Symbol Parameter Conditions Min (1) Typ Max 1.7 7 (2) (1) Units VOS Input Offset Voltage TCVOS Input Offset Voltage Average Drift 5 IB Input Bias Current 11 250 nA IOS Input Offset Current 5 50 nA CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 1.7V 50 63 dB PSRR Power Supply Rejection Ratio 2.7V ≤ V+ ≤ 5V VO = 1V 50 60 dB VCM Input Common-Mode Voltage Range For CMRR ≥ 50 dB 0 −0.2 1.9 V+ −100 mV µV/°C V 1.7 V V+ −10 VO Output Swing RL = 10 kΩ to 1.35V 60 180 mV IS Supply Current LMV321-N 80 170 µA LMV358-N Both amplifiers 140 340 LMV324-N All four amplifiers 260 680 (1) (2) mV µA µA All limits are guaranteed by testing or statistical analysis. Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. 2.7V AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for T J = 25°C, V+ = 2.7V, V− = 0V, VCM = 1.0V, VO = V+/2 and RL > 1 MΩ. Symbol Parameter Conditions (1) Typ (2) GBWP Gain-Bandwidth Product Φm Gm en Input-Referred Voltage Noise f = 1 kHz 46 in Input-Referred Current Noise f = 1 kHz 0.17 (1) (2) CL = 200 pF Min Max (1) Units 1 MHz Phase Margin 60 Deg Gain Margin 10 dB All limits are guaranteed by testing or statistical analysis. Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 3 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com 5V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for T J = 25°C, V+ = 5V, V− = 0V, VCM = 2.0V, VO = V+/2 and R L > 1 MΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (1) Typ Max Units 1.7 7 9 mV (2) (1) VOS Input Offset Voltage TCVOS Input Offset Voltage Average Drift 5 IB Input Bias Current 15 250 500 nA IOS Input Offset Current 5 50 150 nA CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 4V µV/°C 50 65 dB + PSRR Power Supply Rejection Ratio 2.7V ≤ V ≤ 5V VO = 1V, VCM = 1V 50 60 dB VCM Input Common-Mode Voltage Range For CMRR ≥ 50 dB 0 −0.2 V AV Large Signal Voltage Gain RL = 2 kΩ 15 10 100 VO Output Swing RL = 2 kΩ to 2.5V V+ − 300 V+ − 400 V+ −40 4.2 (3) RL = 2 kΩ to 2.5V RL = 10 kΩ to 2.5V 120 V+ − 100 V+ − 200 RL = 2 kΩ to 2.5V, 125°C IO IS (1) (2) (3) 4 Output Short Circuit Current Supply Current 4 V V/mV 300 400 mV V+ − 10 65 Sourcing, VO = 0V 5 60 Sinking, VO = 5V 10 160 180 280 mV mA LMV321-N 130 250 350 LMV358-N (both amps) 210 440 615 LMV324-N (all four amps) 410 830 1160 µA All limits are guaranteed by testing or statistical analysis. Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. RL is connected to V-. The output voltage is 0.5V ≤ VO ≤ 4.5V. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 5V AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 5V, V− = 0V, VCM = 2.0V, VO = V+/2 and R L > 1 MΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions (3) Min (1) Typ (2) SR Slew Rate GBWP Gain-Bandwidth Product Φm Gm en Input-Referred Voltage Noise f = 1 kHz 39 in Input-Referred Current Noise f = 1 kHz 0.21 (1) (2) (3) Max (1) Units 1 V/µs 1 MHz Phase Margin 60 Deg Gain Margin 10 dB CL = 200 pF All limits are guaranteed by testing or statistical analysis. Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Connected as voltage follower with 3V step input. Number specified is the slower of the positive and negative slew rates. CONNECTION DIAGRAM 5-Pin SC70/SOT23 8-Pin SOIC/MSOP Figure 1. Top View Figure 2. Top View 14-Pin SOIC/TSSOP Figure 3. Top View Devices with an asterisk (*) are future products. Please contact the factory for availability. Automotive Grade (Q) product incorporates enhanced manufacturing and support processes for the automotive market, includingdefect detection methodologies. Reliability qualification is compliant with the requirements and temperature grades defined in the AEC Q100 standard. Automotive Grade products are identified with the letter Q. Fully compliant PPAP documentation is available.For more information go to http://www.national.com/automotive. Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 5 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com Typical Performance Characteristics Unless otherwise specified, VS = +5V, single supply, TA = 25°C. 6 Supply Current vs. Supply Voltage (LMV321-N) Input Current vs. Temperature Figure 4. Figure 5. Sourcing Current vs. Output Voltage Sourcing Current vs. Output Voltage Figure 6. Figure 7. Sinking Current vs. Output Voltage Sinking Current vs. Output Voltage Figure 8. Figure 9. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 Typical Performance Characteristics (continued) Unless otherwise specified, VS = +5V, single supply, TA = 25°C. Output Voltage Swing vs. Supply Voltage Input Voltage Noise vs. Frequency Figure 10. Figure 11. Input Current Noise vs. Frequency Input Current Noise vs. Frequency Figure 12. Figure 13. Crosstalk Rejection vs. Frequency PSRR vs. Frequency Figure 14. Figure 15. Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 7 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, VS = +5V, single supply, TA = 25°C. 8 CMRR vs. Frequency CMRR vs. Input Common Mode Voltage Figure 16. Figure 17. CMRR vs. Input Common Mode Voltage ΔVOS vs. CMR Figure 18. Figure 19. ΔV OS vs. CMR Input Voltage vs. Output Voltage Figure 20. Figure 21. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 Typical Performance Characteristics (continued) Unless otherwise specified, VS = +5V, single supply, TA = 25°C. Input Voltage vs. Output Voltage Open Loop Frequency Response Figure 22. Figure 23. Open Loop Frequency Response Open Loop Frequency Response vs. Temperature Figure 24. Figure 25. Gain and Phase vs. Capacitive Load Gain and Phase vs. Capacitive Load Figure 26. Figure 27. Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 9 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, VS = +5V, single supply, TA = 25°C. 10 Slew Rate vs. Supply Voltage Non-Inverting Large Signal Pulse Response Figure 28. Figure 29. Non-Inverting Large Signal Pulse Response Non-Inverting Large Signal Pulse Response Figure 30. Figure 31. Non-Inverting Small Signal Pulse Response Non-Inverting Small Signal Pulse Response Figure 32. Figure 33. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 Typical Performance Characteristics (continued) Unless otherwise specified, VS = +5V, single supply, TA = 25°C. Non-Inverting Small Signal Pulse Response Inverting Large Signal Pulse Response Figure 34. Figure 35. Inverting Large Signal Pulse Response Inverting Large Signal Pulse Response Figure 36. Figure 37. Inverting Small Signal Pulse Response Inverting Small Signal Pulse Response Figure 38. Figure 39. Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 11 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, VS = +5V, single supply, TA = 25°C. 12 Inverting Small Signal Pulse Response Stability vs. Capacitive Load Figure 40. Figure 41. Stability vs. Capacitive Load Stability vs. Capacitive Load Figure 42. Figure 43. Stability vs. Capacitive Load THD vs. Frequency Figure 44. Figure 45. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 Typical Performance Characteristics (continued) Unless otherwise specified, VS = +5V, single supply, TA = 25°C. Open Loop Output Impedance vs. Frequency Short Circuit Current vs. Temperature (Sinking) Figure 46. Figure 47. Short Circuit Current vs. Temperature (Sourcing) Figure 48. Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 13 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com APPLICATION INFORMATION BENEFITS OF THE LMV321-N/LMV358-N/LMV324-N Size The small footprints of the LMV321-N/LMV358-N/LMV324-N packages save space on printed circuit boards, and enable the design of smaller electronic products, such as cellular phones, pagers, or other portable systems. The low profile of the LMV321-N/LMV358-N/LMV324-N make them possible to use in PCMCIA type III cards. Signal Integrity Signals can pick up noise between the signal source and the amplifier. By using a physically smaller amplifier package, the LMV321-N/LMV358-N/LMV324-N can be placed closer to the signal source, reducing noise pickup and increasing signal integrity. Simplified Board Layout These products help you to avoid using long PC traces in your PC board layout. This means that no additional components, such as capacitors and resistors, are needed to filter out the unwanted signals due to the interference between the long PC traces. Low Supply Current These devices will help you to maximize battery life. They are ideal for battery powered systems. Low Supply Voltage Texas Instruments provides guaranteed performance at 2.7V and 5V. These guarantees ensure operation throughout the battery lifetime. Rail-to-Rail Output Rail-to-rail output swing provides maximum possible dynamic range at the output. This is particularly important when operating on low supply voltages. Input Includes Ground Allows direct sensing near GND in single supply operation. Protection should be provided to prevent the input voltages from going negative more than −0.3V (at 25°C). An input clamp diode with a resistor to the IC input terminal can be used. Ease of Use and Crossover Distortion The LMV321-N/LMV358-N/LMV324-N offer specifications similar to the familiar LM324-N. In addition, the new LMV321-N/LMV358-N/LMV324-N effectively eliminate the output crossover distortion. The scope photos in Figure 49 and Figure 50 compare the output swing of the LMV324-N and the LM324-N in a voltage follower configuration, with VS = ± 2.5V and RL (= 2 kΩ) connected to GND. It is apparent that the crossover distortion has been eliminated in the new LMV324-N. Figure 49. Output Swing of LMV324 14 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 Figure 50. Output Swing of LM324 CAPACITIVE LOAD TOLERANCE The LMV321-N/LMV358-N/LMV324-N can directly drive 200 pF in unity-gain without oscillation. The unity-gain follower is the most sensitive configuration to capacitive loading. Direct capacitive loading reduces the phase margin of amplifiers. The combination of the amplifier's output impedance and the capacitive load induces phase lag. This results in either an underdamped pulse response or oscillation. To drive a heavier capacitive load, the circuit in Figure 51 can be used. Figure 51. Indirectly Driving a Capacitive Load Using Resistive Isolation In Figure 51 , the isolation resistor RISO and the load capacitor CL form a pole to increase stability by adding more phase margin to the overall system. The desired performance depends on the value of RISO. The bigger the RISO resistor value, the more stable VOUT will be. Figure 52 is an output waveform of Figure 51 using 620Ω for RISO and 510 pF for CL.. Figure 52. Pulse Response of the LMV324 Circuit in Figure 51 The circuit in Figure 53 is an improvement to the one in Figure 51 because it provides DC accuracy as well as AC stability. If there were a load resistor in Figure 51, the output would be voltage divided by RISO and the load resistor. Instead, in Figure 53, RF provides the DC accuracy by using feed-forward techniques to connect VIN to RL. Caution is needed in choosing the value of RF due to the input bias current of theLMV321-N/LMV358N/LMV324-N. CF and RISO serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier's inverting input, thereby preserving phase margin in the overall feedback loop. Increased capacitive drive is possible by increasing the value of CF . This in turn will slow down the pulse response. Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 15 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com Figure 53. Indirectly Driving A Capacitive Load with DC Accuracy INPUT BIAS CURRENT CANCELLATION The LMV321-N/LMV358-N/LMV324-N family has a bipolar input stage. The typical input bias current of LMV321N/LMV358-N/LMV324-N is 15 nA with 5V supply. Thus a 100 kΩ input resistor will cause 1.5 mV of error voltage. By balancing the resistor values at both inverting and non-inverting inputs, the error caused by the amplifier's input bias current will be reduced. The circuit in Figure 54 shows how to cancel the error caused by input bias current. Figure 54. Cancelling the Error Caused by Input Bias Current TYPICAL SINGLE-SUPPLY APPLICATION CIRCUITS Difference Amplifier The difference amplifier allows the subtraction of two voltages or, as a special case, the cancellation of a signal common to two inputs. It is useful as a computational amplifier, in making a differential to single-ended conversion or in rejecting a common mode signal. 16 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 Figure 55. Difference Amplifier Instrumentation Circuits The input impedance of the previous difference amplifier is set by the resistors R1, R2, R3, and R4. To eliminate the problems of low input impedance, one way is to use a voltage follower ahead of each input as shown in the following two instrumentation amplifiers. Three-Op-Amp Instrumentation Amplifier The quad LMV324 can be used to build a three-op-amp instrumentation amplifier as shown in Figure 56. Figure 56. Three-Op-Amp Instrumentation Amplifier The first stage of this instrumentation amplifier is a differential-input, differential-output amplifier, with two voltage followers. These two voltage followers assure that the input impedance is over 100 MΩ. The gain of this instrumentation amplifier is set by the ratio of R2/R1. R3 should equal R1, and R4 equal R2. Matching of R3 to R1 and R4 to R2 affects the CMRR. For good CMRR over temperature, low drift resistors should be used. Making R4 slightly smaller than R2 and adding a trim pot equal to twice the difference between R2 and R4 will allow the CMRR to be adjusted for optimum performance. Two-Op-Amp Instrumentation Amplifier A two-op-amp instrumentation amplifier can also be used to make a high-input-impedance DC differential amplifier (Figure 57). As in the three-op-amp circuit, this instrumentation amplifier requires precise resistor matching for good CMRR. R4 should equal R1 and, R3 should equal R2. Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 17 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com Figure 57. Two-Op-Amp Instrumentation Amplifier Single-Supply Inverting Amplifier There may be cases where the input signal going into the amplifier is negative. Because the amplifier is operating in single supply voltage, a voltage divider using R3 and R4 is implemented to bias the amplifier so the input signal is within the input common-mode voltage range of the amplifier. The capacitor C1 is placed between the inverting input and resistor R1 to block the DC signal going into the AC signal source, VIN. The values of R1 and C1 affect the cutoff frequency, fc = 1/2πR1C1. As a result, the output signal is centered around mid-supply (if the voltage divider provides V+/2 at the noninverting input). The output can swing to both rails, maximizing the signal-to-noise ratio in a low voltage system. Figure 58. Single-Supply Inverting Amplifier ACTIVE FILTER Simple Low-Pass Active Filter The simple low-pass filter is shown in Figure 59. Its low-frequency gain (ω → 0) is defined by −R3/R1. This allows low-frequency gains other than unity to be obtained. The filter has a −20 dB/decade roll-off after its corner frequency fc. R2 should be chosen equal to the parallel combination of R1 and R3 to minimize errors due to bias current. The frequency response of the filter is shown in Figure 60. 18 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 Figure 59. Simple Low-Pass Active Filter Figure 60. Frequency Response of Simple Low-Pass Active Filter in Figure 11 Note that the single-op-amp active filters are used in the applications that require low quality factor, Q( ≤ 10), low frequency (≤ 5 kHz), and low gain (≤ 10), or a small value for the product of gain times Q (≤ 100). The op amp should have an open loop voltage gain at the highest frequency of interest at least 50 times larger than the gain of the filter at this frequency. In addition, the selected op amp should have a slew rate that meets the following requirement: Slew Rate ≥ 0.5 × (ω HVOPP) × 10−6 V/µsec (1) where ωH is the highest frequency of interest, and VOPP is the output peak-to-peak voltage. Sallen-Key 2nd-Order Active Low-Pass Filter The Sallen-Key 2nd-order active low-pass filter is illustrated in Figure 61. The DC gain of the filter is expressed as (2) Its transfer function is Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 19 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com (3) Figure 61. Sallen-Key 2nd-Order Active Low-Pass Filter The following paragraphs explain how to select values for R1, R2, R3, R4, C1, and C 2 for given filter requirements, such as ALP, Q, and fc. The standard form for a 2nd-order low pass filter is (4) where Q: Pole Quality Factor ωC: Corner Frequency A comparison between Equation 3 and Equation 4 yields (5) (6) To reduce the required calculations in filter design, it is convenient to introduce normalization into the components and design parameters. To normalize, let ωC = ωn = 1 rad/s, and C1 = C2 = Cn = 1F, and substitute these values into Equation 5 and Equation 6. From Equation 5, we obtain (7) From Equation 6, we obtain (8) For minimum DC offset, V+ = V−, the resistor values at both inverting and non-inverting inputs should be equal, which means (9) 20 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 From Equation 2 and Equation 9, we obtain (10) (11) The values of C1 and C2 are normally close to or equal to (12) As a design example: Require: ALP = 2, Q = 1, fc = 1 kHz Start by selecting C1 and C2. Choose a standard value that is close to (13) (14) From Equation 7 Equation 8 Equation 10 Equation 11, R1= R2= R3= R4= 1Ω 1Ω 4Ω 4Ω (15) (16) (17) (18) The above resistor values are normalized values with ωn = 1 rad/s and C1 = C2 = Cn = 1F. To scale the normalized cutoff frequency and resistances to the real values, two scaling factors are introduced, frequency scaling factor (kf) and impedance scaling factor (km). (19) Scaled values: R2 = R1 = 15.9 kΩ R3 = R4 = 63.6 kΩ C1 = C2 = 0.01 µF (20) (21) (22) An adjustment to the scaling may be made in order to have realistic values for resistors and capacitors. The actual value used for each component is shown in the circuit. 2nd-Order High Pass Filter A 2nd-order high pass filter can be built by simply interchanging those frequency selective components (R1, R2, C1, C2) in the Sallen-Key 2nd-order active low pass filter. As shown in Figure 62, resistors become capacitors, and capacitors become resistors. The resulted high pass filter has the same corner frequency and the same maximum gain as the previous 2nd-order low pass filter if the same components are chosen. Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 21 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com Figure 62. Sallen-Key 2nd-Order Active High-Pass Filter State Variable Filter A state variable filter requires three op amps. One convenient way to build state variable filters is with a quad op amp, such as the LMV324 (Figure 63). This circuit can simultaneously represent a low-pass filter, high-pass filter, and bandpass filter at three different outputs. The equations for these functions are listed below. It is also called "Bi-Quad" active filter as it can produce a transfer function which is quadratic in both numerator and denominator. Figure 63. State Variable Active Filter 22 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 (23) where for all three filters, (24) (25) A design example for a bandpass filter is shown below: Assume the system design requires a bandpass filter with f are capacitor and resistor values. O = 1 kHz and Q = 50. What needs to be calculated First choose convenient values for C1, R1 and R2: C1 = 1200 pF 2R2 = R1 = 30 kΩ (26) (27) Then from Equation 24, (28) From Equation 25, (29) From the above calculated values, the midband gain is H0 = R3/R2 = 100 (40 dB). The nearest 5% standard values have been added to Figure 63. Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 23 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com PULSE GENERATORS AND OSCILLATORS A pulse generator is shown in Figure 64. Two diodes have been used to separate the charge and discharge paths to capacitor C. Figure 64. Pulse Generator When the output voltage VO is first at its high, VOH, the capacitor C is charged toward VOH through R2. The voltage across C rises exponentially with a time constant τ = R2C, and this voltage is applied to the inverting input of the op amp. Meanwhile, the voltage at the non-inverting input is set at the positive threshold voltage (VTH+) of the generator. The capacitor voltage continually increases until it reaches VTH+, at which point the output of the generator will switch to its low, VOL which 0V is in this case. The voltage at the non-inverting input is switched to the negative threshold voltage (VTH−) of the generator. The capacitor then starts to discharge toward VOL exponentially through R1, with a time constant τ = R1C. When the capacitor voltage reaches VTH−, the output of the pulse generator switches to VOH. The capacitor starts to charge, and the cycle repeats itself. 24 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 Figure 65. Waveforms of the Circuit in Figure 16 As shown in the waveforms in Figure 65, the pulse width (T1) is set by R2, C and VOH, and the time between pulses (T2) is set by R1, C and VOL. This pulse generator can be made to have different frequencies and pulse width by selecting different capacitor value and resistor values. Figure 66 shows another pulse generator, with separate charge and discharge paths. The capacitor is charged through R1 and is discharged through R2. Figure 66. Pulse Generator Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 25 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com Figure 67 is a squarewave generator with the same path for charging and discharging the capacitor. Figure 67. Squarewave Generator CURRENT SOURCE AND SINK The LMV321-N/LMV358-N/LMV324-N can be used in feedback loops which regulate the current in external PNP transistors to provide current sources or in external NPN transistors to provide current sinks. Fixed Current Source A multiple fixed current source is shown in Figure 68. A voltage (VREF = 2V) is established across resistor R3 by the voltage divider (R3 and R4). Negative feedback is used to cause the voltage drop across R1 to be equal to VREF. This controls the emitter current of transistor Q1 and if we neglect the base current of Q1 and Q2, essentially this same current is available out of the collector of Q1. Large input resistors can be used to reduce current loss and a Darlington connection can be used to reduce errors due to the β of Q1. The resistor, R2, can be used to scale the collector current of Q2 either above or below the 1 mA reference value. Figure 68. Fixed Current Source 26 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 High Compliance Current Sink A current sink circuit is shown in Figure 69. The circuit requires only one resistor (RE) and supplies an output current which is directly proportional to this resistor value. Figure 69. High Compliance Current Sink POWER AMPLIFIER A power amplifier is illustrated in Figure 70. This circuit can provide a higher output current because a transistor follower is added to the output of the op amp. Figure 70. Power Amplifier LED DRIVER The LMV321-N/LMV358-N/LMV324-N can be used to drive an LED as shown in Figure 71. Figure 71. LED Driver Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 27 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 www.ti.com COMPARATOR WITH HYSTERESIS The LMV321-N/LMV358-N/LMV324-N can be used as a low power comparator. Figure 72 shows a comparator with hysteresis. The hysteresis is determined by the ratio of the two resistors. VTH+ = VREF/(1+R 1/R2)+VOH/(1+R2/R1) VTH− = VREF/(1+R 1/R2)+VOL/(1+R2/R1) VH = (VOH−VOL)/(1+R 2/R1) (30) (31) (32) where VTH+: Positive Threshold Voltage VTH−: Negative Threshold Voltage VOH: Output Voltage at High VOL: Output Voltage at Low VH: Hysteresis Voltage Since LMV321-N/LMV358-N/LMV324-N have rail-to-rail output, the (VOH−VOL) is equal to VS, which is the supply voltage. VH = VS/(1+R2/R1) (33) The differential voltage at the input of the op amp should not exceed the specified absolute maximum ratings. For real comparators that are much faster, we recommend you use Texas Instruments's LMV331/LMV93/LMV339, which are single, dual and quad general purpose comparators for low voltage operation. Figure 72. Comparator with Hysteresis 28 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 LMV321-N, LMV321-N-Q1, LMV358-N, LMV358-N-Q1 LMV324-N, LMV324-N-Q1 www.ti.com SNOS012I – AUGUST 2000 – REVISED FEBRUARY 2013 REVISION HISTORY Changes from Revision H (February 2013) to Revision I • Page Changed layout of National Data Sheet to TI format .......................................................................................................... 28 Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LMV321-N LMV321-N-Q1 LMV358-N LMV358-N-Q1 LMV324-N LMV324-N-Q1 29 PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMV321M5 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 A13 LMV321M5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A13 LMV321M5X NRND SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 85 A13 LMV321M5X/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A13 LMV321M7 NRND SC70 DCK 5 1000 TBD Call TI Call TI -40 to 85 A12 LMV321M7/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A12 LMV321M7X NRND SC70 DCK 5 3000 TBD Call TI Call TI -40 to 85 A12 LMV321M7X/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A12 LMV321Q1M5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AYA LMV321Q1M5X/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AYA LMV321Q3M5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 AZA LMV321Q3M5X/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 AZA LMV324M NRND SOIC D 14 55 TBD Call TI Call TI -40 to 85 LMV324M LMV324M/NOPB ACTIVE SOIC D 14 55 Green (RoHS & no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LMV324M LMV324MT NRND TSSOP PW 14 94 TBD Call TI Call TI -40 to 85 LMV324 MT LMV324MT/NOPB ACTIVE TSSOP PW 14 94 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMV324 MT LMV324MTX NRND TSSOP PW 14 2500 TBD Call TI Call TI -40 to 85 LMV324 MT LMV324MTX/NOPB ACTIVE TSSOP PW 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 LMV324 MT LMV324MX NRND SOIC D 14 2500 TBD Call TI Call TI -40 to 85 LMV324M Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2014 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMV324MX/NOPB ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LMV324M LMV324Q1MA/NOPB ACTIVE SOIC D 14 55 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV324Q1 MA LMV324Q1MAX/NOPB ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV324Q1 MA LMV324Q1MT/NOPB ACTIVE TSSOP PW 14 94 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV324 Q1MT LMV324Q1MTX/NOPB ACTIVE TSSOP PW 14 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV324 Q1MT LMV324Q3MA/NOPB ACTIVE SOIC D 14 55 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMV324Q3 MA LMV324Q3MAX/NOPB ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMV324Q3 MA LMV324Q3MT/NOPB ACTIVE TSSOP PW 14 94 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMV324 Q3MT LMV324Q3MTX/NOPB ACTIVE TSSOP PW 14 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMV324 Q3MT LMV358M NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LMV 358M LMV358M/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMV 358M LMV358MM NRND VSSOP DGK 8 1000 TBD Call TI Call TI -40 to 85 V358 LMV358MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 V358 LMV358MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 V358 LMV358MX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LMV 358M LMV358MX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMV 358M LMV358Q1MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV35 8Q1MA LMV358Q1MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV35 8Q1MA Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 5-Feb-2014 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMV358Q1MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AFAA LMV358Q1MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AFAA LMV358Q3MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMV35 8Q3MA LMV358Q3MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMV35 8Q3MA LMV358Q3MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 AHAA LMV358Q3MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 AHAA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 3 Samples PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2014 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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OTHER QUALIFIED VERSIONS OF LMV321-N, LMV321-N-Q1, LMV324-N, LMV324-N-Q1, LMV358-N, LMV358-N-Q1 : • Catalog: LMV321-N, LMV324-N, LMV358-N • Automotive: LMV321-N-Q1, LMV324-N-Q1, LMV358-N-Q1 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 4 PACKAGE MATERIALS INFORMATION www.ti.com 21-Feb-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ LMV321M5 SOT-23 LMV321M5X LMV321M7 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 3.2 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.2 1.4 4.0 8.0 Q3 DBV 5 1000 178.0 8.4 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV321M7/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV321M7X SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV321M7X/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV321Q1M5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMV321Q1M5X/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMV321Q3M5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMV321Q3M5X/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMV324MTX TSSOP PW 14 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.0 Q1 LMV324MTX/NOPB TSSOP PW 14 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.0 Q1 LMV324MX SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1 LMV324MX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1 LMV324Q1MAX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1 LMV324Q1MTX/NOPB TSSOP PW 14 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.0 Q1 LMV324Q3MAX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1 LMV324Q3MTX/NOPB TSSOP PW 14 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 21-Feb-2014 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LMV358MM VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMV358MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMV358MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMV358MX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMV358MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMV358Q1MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMV358Q1MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMV358Q1MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMV358Q3MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMV358Q3MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMV358Q3MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMV321M5 SOT-23 DBV 5 1000 210.0 185.0 35.0 LMV321M5X SOT-23 DBV 5 3000 210.0 185.0 35.0 LMV321M7 SC70 DCK 5 1000 210.0 185.0 35.0 LMV321M7/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LMV321M7X SC70 DCK 5 3000 210.0 185.0 35.0 LMV321M7X/NOPB SC70 DCK 5 3000 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 21-Feb-2014 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMV321Q1M5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMV321Q1M5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMV321Q3M5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMV321Q3M5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMV324MTX TSSOP PW 14 2500 367.0 367.0 35.0 LMV324MTX/NOPB TSSOP PW 14 2500 367.0 367.0 35.0 LMV324MX SOIC D 14 2500 367.0 367.0 35.0 LMV324MX/NOPB SOIC D 14 2500 367.0 367.0 35.0 LMV324Q1MAX/NOPB SOIC D 14 2500 367.0 367.0 35.0 LMV324Q1MTX/NOPB TSSOP PW 14 2500 367.0 367.0 35.0 LMV324Q3MAX/NOPB SOIC D 14 2500 367.0 367.0 35.0 LMV324Q3MTX/NOPB TSSOP PW 14 2500 367.0 367.0 35.0 LMV358MM VSSOP DGK 8 1000 210.0 185.0 35.0 LMV358MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LMV358MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LMV358MX SOIC D 8 2500 367.0 367.0 35.0 LMV358MX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMV358Q1MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMV358Q1MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LMV358Q1MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LMV358Q3MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMV358Q3MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LMV358Q3MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 Pack Materials-Page 3 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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