PHILIPS I74F776A Pi-bus transceiver Datasheet

INTEGRATED CIRCUITS
74F776
Pi-bus transceiver
Product specification
IC15 Data Handbook
1990 Dec 19
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
FEATURES
consumption and a series diode on the drivers to reduce capacitive
loading. Incident wave switching is employed, therefore BTL
propagation delays are short. Although the voltage swing is less for
BTL, so is its receiver threshold, therefore noise margins are excellent.
• Octal latched transceiver
• Drives heavily loaded backplanes with equivalent load impedances
down to 10 ohms
• High drive (100mA) open collector drivers on B port
• Reduced voltage swing (1 volt) produces less noise and reduces
power consumption
• High speed operation enhances performance of backplane buses
and facilitates incident wave switching
• Compatible with Pi–bus and IEEE 896 Futurebus standards
• Built–in precision band–gap reference provides accurate receiver
thresholds and improved noise immunity
• Controlled output ramp and multiple GND pins minimize ground
bounce
• Glitch–free power up/power down operation
• Multiple package options
• Industrial temperature range available (–40°C to +85°C)
BTL offers low power consumption, low ground bounce, EMI and
crosstalk, low capacitive loading, superior noise margin and low
propagation delays. This results in a high bandwidth, reliable
backplane.
The 74F776 A port has TTL 3–state drivers and TTL receivers with a
latch function. A separate high–level control voltage input (VX) is
provided to limit the A side output level to a given voltage level (such
as 3.3V). For 5.0V systems, VX is simply tied to VCC.
The 74F776 has a designed feature to control the B output transitions
during power sequencing. There are two possible sequencing, They
are as follows:
1.When LE = low and OEBn = low then the B outputs are disabled until
the LE circuitry takes control. Then the B outputs will follow the A inputs,
making a maximum of one transition during power–up (or down).
2. If LE = high or OEBn = high then the B outputs will be disabled during
power–up (or down).
DESCRIPTION
The 74F776 is an octal bidirectional latched transceiver and is
intended to provide the electrical interface to a high performance
wired–OR bus. The B port inverting drivers are low–capacitance open
collector with controlled ramp and are designed to sink 100mA from 2
volts. The B port inverting receivers have a 100 mV threshold region
and a 4ns glitch filter.
TYPE
74F776
TYPICAL PROPAGATION DELAY
TYPICAL SUPPLY
CURRENT( TOTAL)
6.5ns
80mA
The 74F776 B port interfaces to ’Backplane Transceiver Logic’ (BTL).
BTL features a reduced (1V to 2V) voltage swing for lower power
ORDERING INFORMATION
ORDER CODE
COMMERCIAL RANGE
INDUSTRIAL RANGE
DESCRIPTION
VCC = 5V ±10%, Tamb = 0°C to +70°C
VCC = 5V ±10%, Tamb = –40°C to +85°C
PKG DWG #
28–pin plastic DIP (600 mil)
N74F776N
I74F776N
SOT117-2
28–pin PLCC
N74F776A
I74F776A
SOT261-2
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
A0 – A7
PNP latched inputs
3.5/0.117
70µA/70µA
B0 – B7
Data inputs with threshold circuitry
5.0/0.167
100µA/100µA
OEA
A output enable input (active high)
1.0/0.033
20µA/20µA
OEB0, OEB1
B output enable inputs (active low)
1.0/0.033
20µA/20µA
Latch enable input (active low)
1.0/0.033
20µA/20µA
150/40
3mA/24mA
OC/166.7
OC/100mA
LE
A0 – A7
3–state outputs
B0 – B7
Open collector outputs
Notes to input and output loading and fan out table
One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
OC = Open collector.
December 19, 1990
2
853 1121 01321
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
PIN CONFIGURATION
IEC/IEEE SYMBOL
VCC 1
28 LE
OEA 2
27 B0
A0 3
26 B1
&
15
EN2
16
GND 4
28
25 GND
A1 5
24 B2
A2 6
23 B3
A3 7
22 GND
EN1
2
EN3
3
ID
27
2
3
GND 8
21 B4
5
26
A4 9
20 B5
6
24
19 B6
7
23
18 GND
9
21
10
20
12
19
13
17
A5 10
GND 11
A6 12
17 B7
A7 13
16 OEB1
VX 14
15 OEB0
SF00422
SF00424
PIN CONFIGURATION PLCC
LOGIC SYMBOL
GND A0 OEA VCC LE
4
3
2
1
28
B0
B1
27
26
3
A1
5
25 GND
A2
6
24 B2
A3
7
23 B3
GND
8
A4
9
15
2
PLCC
22 GND
21 B4
A5 10
6
7
9
10 12 13
A0 A1 A2 A3 A4 A5 A6 A7
OEB0
OEA
28
LE
16
OEB1
B0 B1 B2 B3 B4 B5 B6 B7
20 B5
GND 11
5
19 B6
12
13
A6
A7 VX OEB0 OEB1 B7 GND
14
15
16
17
18
27 26 24 23 21 20 19 17
VCC = Pin 1, VX = Pin 14
GND = Pin 4, 8, 11, 18, 22, 25
SF00423
SF00425
PIN DESCRIPTION
SYMBOL
PINS
TYPE
A0 – A7
3, 5, 6, 7, 9, 10, 12, 13
I/O
PNP latched input/3–state output (with VX control option)
B0 – B7
27, 26, 24, 23, 21, 20, 19, 17
I/O
Data input with special threshold circuitry to reject noise/ open collector output, high
current drive
OEB0
15
Input
OEB1
16
Input
OEA
2
Input
Enables the A outputs when high
LE
28
Input
Latched when high (a special feature is built in for proper enabling times)
VX
14
Input
Clamping voltage keeping VOH from rising above VX (VX = Vcc for normal use)
December 19, 1990
NAME AND FUNCTION
Enables the B outputs when both pins are low
3
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
LOGIC DIAGRAM
OEB0
OEB1
OEA
15
16
2
LE
28
A0
3
Data
Q
27 B0
Q
26 B1
Q
24 B2
Q
23 B3
Q
21 B4
Q
20 B5
Q
19 B6
Q
17 B7
LE
A1
5
Data
LE
A2
6
Data
LE
A3
7
Data
LE
A4
9
Data
LE
A5
10
Data
LE
A6
12
Data
LE
A7
13
Data
LE
VCC = Pin 1, VX = Pin 14,
GND = Pin 4, 8, 11, 18, 22, 25
SF00426
December 19, 1990
4
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
FUNCTION TABLE
INPUTS
LATCH
OUTPUTS
An
Bn*
LE
OEA
OEB0
OEB1
STATE
An
Bn
H
X
L
L
L
L
H
Z
Z
OPERATING MODE
A 3–state, data from A to B
L
X
L
L
L
L
L
Z
L
X
X
H
L
L
L
Qn
Z
Qn
A 3–state, latched data to B
–
–
L
H
L
L
(1)
(1)
(1)
Feedback: A to B, B to A
–
H
H
H
L
L
H (2)
H
Z(2)
–
L
H
H
L
L
H (2)
L
Z(2)
–
–
H
H
L
L
Qn
Qn
Qn
H
X
L
L
H
X
H
Z
Z
L
X
L
L
H
X
L
Z
Z
X
X
H
L
H
X
Qn
Z
Z
–
H
L
H
H
X
H
H
Z
–
L
L
H
H
X
L
L
Z
–
H
H
H
H
X
Qn
H
Z
–
L
H
H
H
X
Qn
L
Z
H
X
L
L
X
H
H
Z
Z
L
X
L
L
X
H
L
Z
Z
X
X
H
L
X
H
Qn
Z
Z
–
H
L
H
X
H
H
H
Z
–
L
L
H
X
H
L
L
Z
–
H
H
H
X
H
Qn
H
Z
–
L
H
H
X
H
Qn
L
Z
Preconditioned latch enabling data transfer from B to A
Latch state to A and B
B and A 3–state
B 3–state, data from B to A
B and A 3–state
B 3–state, data from B to A
Notes to function table
H = High voltage level
L = Low voltage level
X = Don’t care
– = Input not externally driven
Z = High impedance ”off” state
Qn = High or Low voltage level one setup time prior to the low–to–high LE transition.
(1) = Condition will cause a feedback loop path: A to B and B to A.
(2) = The latch must be preconditioned such that B inputs may assume a high or low level while OEB0 and OEB1 are low and LE is high.
B* = Precaution should be taken to insure the B inputs do not float. If they do they are equal to low state.
December 19, 1990
5
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
VCC
Supply voltage
–0.5 to +7.0
V
VX
Threshold control
–0.5 to +7.0
V
VIN
Input voltage
OEBn, OEA, LE
–0.5 to +7.0
V
A0 – A7, B0 – B7
–0.5 to +5.5
V
IIN
Input current
–40 to +5
mA
VOUT
Voltage applied to output in high output state
–0.5 to VCC
V
IOUT
Current applied to output in low output state
A0 – A7
48
mA
B0 – B7
200
mA
Commercial range
0 to +70
°C
Industrial range
–40 to +85
°C
–65 to +150
°C
Tamb
Tstg
Operating free air temperature range
Storage temperature range
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
Supply voltage
VIH
High–level input voltage
VIL
IIk
Low–level input voltage
Input clamp current
LIMITS
UNIT
MIN
NOM
MAX
4.5
5.0
5.5
V
Except B0 – B7
2.0
V
B0 – B7
1.6
V
Except B0 – B7
0.8
V
B0 – B7
1.45
V
Except A0 – A7
–18
mA
A0 – A7
–40
mA
–3
mA
IOH
High–level output current
A0 – A7
IOL
Low–level output current
A0 – A7
24
mA
B0 – B7
100
mA
Tamb
Operating free air temperature
range
December 19, 1990
Commercial range
0
+70
°C
Industrial range
–40
+85
°C
6
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
PARAMETER
SYMBOL
TEST
LIMITS
CONDITIONS1
IOH
High–level output current
B0 – B7
VCC = MAX, VIL = MAX, VIH = MIN, VOH = 2.1V
IOFF
Power–off output current
B0 – B7
VCC = 0.0V, VIL = MAX, VIH = MIN, VOH = 2.1V
VCC = MIN,
VOH
High-level output voltage
A0 –
A74
VIL = MAX, VIH = MIN
IOH = –3mA, VX =VCC
IOH = –4mA,
VX =3.13V and 3.47V
MIN
TYP2
2.5
UNIT
MAX
100
µA
100
µA
VCC
V
2.5
V
A0 – A74
VCC = MIN,
IOL = 20mA, VX = VCC
0.50
V
VIL = MAX
IOL = 100mA
1.15
V
VIH = MIN
IOL = 4mA
VOL
Low-level output voltage
B0 – B7
VIK
Input clamp voltage
A0 – A7
VCC = MIN, II = IIK
-0.5
Except A0 – A7
VCC = MIN, II = IIK
-1.2
V
II
Input current at
OEBn, OEA, LE
VCC = 0.0V, VI = 7.0V
100
µA
0.40
V
V
maximum input voltage
A0 – A7, B0 – B7
VCC = MAX, VI = 5.5V
1
mA
IIH
High–level input current
OEBn, OEA, LE
VCC = MAX, VI = 2.7V, Bn –An =0V
20
µA
B0 – B7
VCC = MAX, VI = 2.1V
100
µA
IIL
Low–level input current
OEBn, OEA, LE
VCC = MAX, VI = 0.5V
–20
µA
B0 – B7
VCC = MAX, VI = 0.3V
–100
µA
IOZH + IIH
Off state output current,
high level voltage applied
A0 – A7
VCC = MAX, VO = 2.7V
70
µA
IOZL + IIL
Off state output current,
low level voltage applied
A0 – A7
VCC = MAX, VO = 0.5V
–70
µA
IX
High–level control current
IOS
Short circuit output
current3
ICC
Supply current (total)
A0 – A7 only
VCC = MAX, VX = VCC, LE = OEA = OEBn =
2.7V, A0 – A7 = 2.7V, B0 – B7 = 2.0V,
–100
100
µA
VCC = MAX, VX = 3.13 & 3.47V, LE = OEA =
2.7V, OEBn = A0 – A7 = 2.7V, B0 – B7 = 2.0V,
–10
10
µA
VCC = MAX, Bn = 1.8V, OEA = 2.0V,
OEBn = 2.7V
-60
-150
mA
ICCH
VCC = MAX
65
100
mA
ICCL
VCC = MAX, VIL = 0.5V
100
145
mA
ICCZ
75
100
mA
Notes to DC electrical characteristics
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
Unless otherwise specified, VX = VCC for all test conditions.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
4. Due to test equipment limitations, actual test conditions are for VIH =1.8v and VIL = 1.3V.
December 19, 1990
7
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
AC ELECTRICAL CHARACTERISTICS
A PORT LIMITS
Tamb = +25°C
SYMBOL
PARAMETER
TEST
CONDITION
VCC = +5.0V
CL = 50pF,
RL = 500Ω
Tamb = 0°C to
+70°C± 10%
VCC = +5.0V
CL = 50pF,
RL = 500Ω
Tamb = –40°C to +85°C
VCC = +5.0V ± 10%
CL = 50pF,
RL = 500Ω
UNIT
MIN
TYP
MAX
MIN
MAX
MIN
MAX
Waveform 1
5.5
4.5
8.0
6.0
12.0
9.0
5.5
4.5
12.0
9.0
5.5
4.5
12.0
9.0
ns
tPLH
tPHL
Propagation delay
Bn to An
tPZH
tPZL
Output enable time to high
or low, OEA to An
Waveform 3, 4
8.0
8.5
10.5
11.0
13.5
13.5
7.5
8.0
15.0
15.5
7.5
8.0
15.5
15.5
ns
tPHZ
tPLZ
Output disable time from
high or low, OEA to An
Waveform 3, 4
2.0
2.0
3.5
4.5
6.0
7.0
1.5
2.0
6.5
7.5
1.5
2.0
6.5
7.5
ns
B PORT LIMITS
Tamb = +25°C
Tamb = 0°C to
+70°C
TEST
SYMBOL
PARAMETER
CONDITION
VCC = +5.0V
CD = 30pF, RU = 9Ω
Tamb = –40°C to +85°C
VCC = +5.0V ± 10%
CD = 30pF, RU = 9Ω
VCC = +5.0V ± 10%
CD = 30pF, RU = 9Ω
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
tPLH
tPHL
Propagation delay
An to Bn
Waveform 1
3.0
3.0
5.0
4.5
7.0
7.5
2.5
2.5
8.0
8.5
2.0
2.5
9.0
8.5
ns
tPLH
tPHL
Propagation delay
LE to Bn
Waveform 1
3.5
3.5
5.0
5.0
8.0
8.0
3.0
2.5
9.0
9.0
2.5
2.5
9.5
9.5
ns
tPLH
tPHL
Enable/disable time
OEBn to An
Waveform 1
3.0
3.5
4.5
5.5
7.0
9.0
2.5
3.5
8.0
10.0
2.5
3.5
8.5
10.5
ns
tTLH
tTHL
Transition time, B port
1.3V to 1.7V, 1.7V to 1.3V
Test Circuit and
Waveforms
0.5
0.5
2.0
2.0
4.5
4.5
0.5
0.5
5.0
4.5
0.5
0.5
5.0
4.5
ns
AC SETUP REQUIREMENTS
LIMITS
Tamb = +25°C
TEST
SYMBOL
PARAMETER
CONDITION
VCC = +5.0V
CL = 50pF,
RL = 500Ω
MIN
TYP
MAX
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF,
RL = 500Ω
MIN
Tamb = –40°C to +85°C
VCC = +5.0V ± 10%
CL = 50pF,
RL = 500Ω
MAX
MIN
UNIT
MAX
tsu (H)
tsu (L)
Setup time, high or low
An to LE
Waveform 2
3.5
4.5
4.5
5.0
4.5
5.0
ns
th(H)
th (L)
Hold time, high or low
An to LE
Waveform 2
0.0
0.0
0.0
0.0
0.0
0.0
ns
tw (L)
LE pulse width, low
Waveform 2
4.0
5.0
5.0
ns
AC WAVEFORMS
An, Bn, OEBn
VM
VM
tPLH
An
VM
VM
VM
th(L)
tPHL
VM
VM
LE
VM
VM
VM
SF00428
SF00427
Waveform 1. Propagation delay for data to output
December 19, 1990
th(H)
ts(H)
tw(L)
tsu(L)
An, Bn
VM
Waveform 2. Data setup and hold times and LE pulse width
8
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
AC WAVEFORMS (Continued)
OEA
VM
VM
tPZH
tPHZ
An
OEA
VOH -0.3V
VM
VM
tPZL
tPLZ
VM
An
VM
0V
VOL +0.3V
SF00429
SF00430
Waveform 3. 3-state output enable time to high level and output
Waveform 4. 3-state output enable time to low level and output
disable time from high level
disable time from low level
Notes to AC waveforms
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
TEST CIRCUIT AND WAVEFORMS
SWITCH POSITION
TEST
SWITCH
tPLZ, tPZL
closed
All other
open
tw
90%
NEGATIVE
PULSE
VCC
VM
VIN
RL
VOUT
AMP (V)
VM
10%
7.0V
PULSE
GENERATOR
90%
10%
tTHL (tf )
tTLH (tr )
tTLH (tr )
tTHL (tf )
low V
D.U.T.
RT
CL
AMP (V)
RL
90%
90%
POSITIVE
PULSE
VM
VM
10%
VCC
7.0V
10%
tw
Test circuit for 3–State outputs on A port
low V
Input pulse definition
INPUT PULSE REQUIREMENTS
VIN
RU
VOUT
PULSE
GENERATOR
family
amplitude Low V
D.U.T.
RT
CD
VM
rep. rate
tw
tTLH
tTHL
A port
3.0V
0.0V
1.5V
1MHz
500ns 2.5ns
2.5ns
B port
2.0V
1.0V
1.0V
1MHz
500ns 4.0ns
4.0ns
Test circuit for outputs on B port
DEFINITIONS:
RL = Load resistor; see AC electrical characteristics for value.
CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value.
RU = Pull up resistor; see AC electrical characteristics for value.
CD = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value.
RT = Termination resistance should be equal to ZOUT of pulse generators.
December 19, 1990
9
SF00431
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
DIP28: plastic dual in-line package; 28 leads (600 mil); long body
1990 Dec 19
10
SOT117-2
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
PLCC28: plastic leaded chip carrier; 28 leads
1990 Dec 19
SOT261-2
11
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
Data sheet status
Data sheet
status
Product
status
Definition [1]
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
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otherwise specified.
 Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
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