Intersil ISL55011IEZ-T7 Mmic silicon bipolar broadband amplifier Datasheet

ISL55011
®
Data Sheet
May 22, 2006
MMIC Silicon Bipolar Broadband Amplifier
Features
The ISL55005, ISL55007, ISL55008 and ISL55009,
ISL55010, ISL55011 constitute a family of high performance
gain blocks featuring a Darlington configuration using high ft
transistors and excellent thermal performance. They are an
ideal choice for DVB-S LNB cable receiver applications.
• Input impedance of 50Ω
ISL55005, ISL55007, ISL55008 offer higher OIP3
performance while the ISL55009, ISL55010, ISL55011 offer
lower operating supply currents.
• Low supply current of 14mA
ISL55005 and ISL55009 match a 75Ω source to a 50Ω load.
ISL55007 and ISL55010 match a 75Ω source to a 75Ω load.
ISL55008 and ISL55011 match a 50Ω source to a 50Ω load.
FN6218.0
• Output impedance of 50Ω
• Noise figure of 3.9dB
• OIP3 of 10dBm
• Low input and output return losses
• Pb-free plus anneal available (RoHS compliant)
Applications
• LNB and LNB-T line amplifiers
• IF gain blocks for satellite and terrestrial HDTV STBs
Ordering Information
PART
NUMBER
(Note)
PART
MARKING
ISL55011IEZ-T7 CBH
• PA driver amplifier
TAPE &
REEL
PACKAGE
(Pb-Free)
7” (3k pcs) 6 Ld SC-70
PKG.
DWG. #
P6.049
• Wireless data, satellite
• Bluetooth/WiFi
• Satellite locator and signal strength meters
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Typical Application Circuit
Pinout
6 LD SC-70
+3.3V
0.1µF
100pF
100pF
3
4
6
68pF
0.1µF
GND
1
6
OUT
GND
2
5
GND
IN
3
4
VSP
100nH
68pF
1, 2, 5
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2006. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL55011
Absolute Maximum Ratings (TA = 25°C)
Supply Voltage from VSP to GND . . . . . . . . . . . . . . . . . . . . . . . . 6V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . VS+ +0.3V to GND -0.3V
Power Dissipation . . . . . . . . . . . . See Packging Information Section
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +125°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . .3000V
Machine Model (Per EIAJ ED-4701 Method C-111). . . . . . . .300V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
Gt
P1dB
OIP3
VSP = +3.3V, Zrsc = Zload = 50Ω, TA = 25°C, unless otherwise specified.
DESCRIPTION
CONDITIONS
Small Signal Gain
Output Power at 1dB Compression
Output Third Order Intercept Point
MIN
TYP
MAX
UNIT
1.0GHz
13.4
14.4
15.4
dB
1.5GHz
13.3
14.3
15.3
dB
2.0GHz
13.1
14.1
15.1
dB
1.0GHz
-0.8
1.2
3.2
dBm
2.0GHz
-0.7
0.8
2.3
dBm
1.0GHz
10.9
dBm
2.0GHz
10.3
dBm
BW
3dB Bandwidth
3dB below Gain @ 500MHz
3.4
GHz
IRL
Input Return Loss
1.0GHz
11.1
dB
ORL
Output Return Loss
1.0GHz
13.5
dB
RISOL
Reverse Isolation
2.0GHz
19.6
dB
NF
Noise Figure
2.0GHz
3.9
dB
ID
Device Operating Current
11.5
13.7
15.5
mA
Device Test Setup
Agilent _8753ES
VNA
50Ω
50Ω
CONNECTORLESS
PLATFORM
50Ω
PIN 3
DC BLOCK
PIN 6
PICOSECOND LABS
MODEL 5542
50Ω
DUT
BIAS TEE
3.3V
PICOSECOND LABS
MODEL 5508-110
I1
I2
IDEVICE
INPUT
REFERENCE
PLANE
2
OUTPUT
REFERENCE
PLANE
3.3V
POWER
SUPPLY
FN6218.0
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ISL55011
Typical Performance Curves 50Ω environment
14
12
ORL (dB)
IRL (dB)
13
11
10
12
11
10
9
9
0.5
1.0
1.5
2.0
2.5
0.5
3.0
Frequency (GHz)
1.0
1.5
2.0
2.5
3.0
Frequency (GHz)
FIGURE 1. INPUT RETURN LOSS vs FREQUENCY
FIGURE 2. OUTPUT RETURN LOSS vs FREQUENCY
-6
20
S11 (dB)
S21 (dB)
18
16
14
-8
-10
12
10
-12
0.5
1.0
1.5
2.0
Frequency (GHz)
2.5
3.0
0.5
FIGURE 3. |S21| vs FREQUENCY
2.5
3.0
FIGURE 4. |S11| vs FREQUENCY
-16
-8
S22 (dB)
-18
S12 (dB)
1.0
1.5
2.0
Frequency (GHz)
-20
-10
-12
-22
-14
-24
0.5
1.0
1.5
2.0
Frequency (GHz)
2.5
FIGURE 5. |S12| vs FREQUENCY
3
3.0
0.5
1.0
1.5
2.0
Frequency (GHz)
2.5
3.0
FIGURE 6. |S22| vs FREQUENCY
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ISL55011
4
12
3
dBm
13
11
2
1
10
0
9
1.0
1.5
2.0
Frequency (GHz)
2.5
0.5
3.0
1.0
1.5
2.0
Frequency (GHz)
2.5
3.0
FIGURE 8. P1dB vs FREQUENCY
FIGURE 7. OIP3 vs FREQUENCY
Noise Figure (dB)
6
5
4
3
2
1
0
0.5
1.0
1.5
2.0
Frequency (GHz)
2.5
3.0
1.8
0.6
1.6
0.7
1.4
1.2
0.8
0.9
1.0
FIGURE 9. NOISE FIGURE vs FREQUENCY
2.0
0.2
0.4
0.4
3.0
0.6
0.3
0.8
4.0
1.0
5.0
1.0
0.2
6.0
0.8
7.0
8.0
9.0
10
0.6
0.1
0.4
20
50
50
10
20
4.0
3.0
2.0
1.8
1.6
1.4
1.2
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0
S22
50
0.1
0.2
3 GHz
5.0
0.5
0.5
0.2
0.5 GHz 0.5 GHz
1.0
1.0
20
0.4
0.6
0.8
2.2
6.0
S11
1.0
3 GHz
5.0
1.0
4.0
2.2
0.2
7.0
0.1
8.0
9.0
10
0.8
0.3
0.6
3.0
0.4
0.4
1.8
2.0
0.5
1.4
1.2
1.0
0.9
0.8
0.7
1.6
0.6
0.2
OIP3 (dBm)
Typical Performance Curves 50Ω environment (Continued)
RF Café 2002
FIGURE 10. S11 AND S22 vs FREQUENCY
4
FN6218.0
May 22, 2006
ISL55011
Packaging Information
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
POWER DISSIPATION (W)
0.3
0.25
0.2
0.15
176mW
θ
JA
0.1
SC
7
=5 0-6
67
°C
/W
0.05
0
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 11. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
5
FN6218.0
May 22, 2006
ISL55011
Small Outline Transistor Plastic Packages (SC70-6)
0.20 (0.008) M
VIEW C
C
P6.049
CL
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
e
b
6
INCHES
5
4
CL
CL
E1
E
1
2
3
e1
C
D
CL
A
A2
A1
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.031
0.043
0.80
1.10
-
A1
0.000
0.004
0.00
0.10
-
A2
0.031
0.039
0.00
1.00
-
b
0.006
0.012
0.15
0.30
b1
0.006
0.010
0.15
0.25
c
0.003
0.009
0.08
0.22
6
c1
0.003
0.009
0.08
0.20
6
D
0.073
0.085
1.85
2.15
3
E
0.071
0.094
1.80
2.40
-
E1
0.045
0.053
1.15
1.35
3
SEATING
PLANE
e
-C-
e1
L
0.10 (0.004) C
MILLIMETERS
0.0256 Ref
0.65 Ref
0.0512 Ref
0.010
0.018
-
1.30 Ref
0.26
-
0.46
L1
0.017 Ref.
0.420 Ref.
L2
0.006 BSC
0.15 BSC
WITH
b
N
PLATING
b1
R
0.004
-
0.10
-
R1
0.004
0.010
0.15
0.25
α
0o
8o
0o
8o
c
c1
6
4
6
5
Rev. 2 9/03
BASE METAL
NOTES:
1. Dimensioning and tolerance per ASME Y14.5M-1994.
4X θ1
2. Package conforms to EIAJ SC70 and JEDEC MO203AB.
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
R1
4. Footlength L measured at reference to gauge plane.
R
5. “N” is the number of terminal positions.
GAUGE PLANE
SEATING
PLANE
L
C
L1
4X θ1
α
L2
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only
VIEW C
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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6
FN6218.0
May 22, 2006
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