Product Folder Sample & Buy Support & Community Tools & Software Technical Documents LM8262 SNOS975G – MAY 2001 – REVISED AUGUST 2015 LM8262 Dual RRIO, High Output Current and Unlimited Cap Load Op Amp in VSSOP 1 Features (VS = 5V, TA = 25°C, Typical Values Unless Specified). 1 • • • • • • • • • • • GBWP 21MHz Wide Supply Voltage Range 2.5 V to 22 V Slew Rate 12V/µs Supply Current/channel 1.15 mA Cap Load Limit Unlimited Output Short Circuit Current +53mA/−75 mA +/−5% Settling Time 400ns (500 pF, 100 mVPP step) Input Common Mode Voltage 0.3 V Beyond Rails Input Voltage Noise 15nV/√Hz Input Current Noise 1pA/√Hz THD+N < 0.05% 2 Applications • • • • TFT-LCD Flat Panel VCOM driver A/D Converter Buffer High Side/low Side Sensing Headphone Amplifier 3 Description The LM8262 is a Rail-to-Rail input and output Op Amp which can operate with a wide supply voltage range. This device has high output current drive, greater than Rail-to-Rail input common mode voltage range, unlimited capacitive load drive capability, and provides tested and ensured high speed and slew rate. It is specifically designed to handle the requirements of flat panel TFT panel VCOM driver applications as well as being suitable for other low power and medium speed applications which require ease of use and enhanced performance over existing devices. Greater than Rail-to-Rail input common mode voltage range with 50 dB of Common Mode Rejection allows high side and low side sensing for many applications without concern for exceeding the range and with no compromise in accuracy. In addition, most device parameters are insensitive to power supply variations. This design enhancement is yet another step in simplifying its usage. The output stage has low distortion (0.05% THD+N) and can supply a respectable amount of current (15 mA) with minimal headroom from either rail (300 mV). The LM8262 is offered in the space saving VSSOP package. Device Information(1) PART NUMBER LM8262 PACKAGE VSSOP (8) BODY SIZE (NOM) 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Gain/Phase vs. Frequency Output Response with Heavy Capacitive Load 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM8262 SNOS975G – MAY 2001 – REVISED AUGUST 2015 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 4 4 4 4 Absolute Maximum Ratings ..................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. 6.5 2.7V Electrical Characteristics ................................. 6.6 5V Electrical Characteristics .................................... 6.7 +/−11V Electrical Characteristics ............................. 6.8 Typical Performance Characteristics ........................ 7 Device and Documentation Support.................. 12 7.1 7.2 7.3 7.4 8 5 6 7 9 Community Resources............................................ Trademarks ............................................................. Electrostatic Discharge Caution .............................. Glossary .................................................................. 12 12 12 12 Mechanical, Packaging, and Orderable Information ........................................................... 12 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision F (August 2014) to Revision G Page • Changed pin 5 From: -IN B To: +IN B Non-Inverting Input B in the Pin Functions table ....................................................... 3 • Changed pin 6 From: +IN B To: -IN B Inverting Input B in the Pin Functions table............................................................... 3 • Moved "Storage temperature range" to the Absolute Maximum Ratings • Changed Handling Ratings To: ESD Ratings ........................................................................................................................ 4 (1) (2) Changes from Revision E (April 2013) to Revision F ....................................................................... 4 Page • Changed data sheet structure and organization. Added, updated, or renamed the following sections: Device and Documentation Support; Mechanical, Packaging, and Ordering Information......................................................................... 1 • Changed from "Junction Temperature Range" to "Operating Temperature Range".............................................................. 4 • Deleted TJ = 25°C, ................................................................................................................................................................. 5 • Deleted TJ = 25°C, ................................................................................................................................................................. 6 • Deleted TJ = 25°C................................................................................................................................................................... 7 Changes from Revision D (April 2013) to Revision E • 2 Page Changed layout of National Data Sheet to TI format ........................................................................................................... 10 Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: LM8262 LM8262 www.ti.com SNOS975G – MAY 2001 – REVISED AUGUST 2015 5 Pin Configuration and Functions 8-Pin VSSOP Top View Pin Functions PIN I/O DESCRIPTION NUMBER NAME 1 OUT A O Output A 2 -IN A I Inverting Input A 3 +IN A I Non-Inverting Input A 4 V- I Negative Supply 5 +IN B I Non-Inverting Input B 6 -IN B I Inverting Input B 7 OUT B O Output B 8 V+ I Positive Supply Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: LM8262 3 LM8262 SNOS975G – MAY 2001 – REVISED AUGUST 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings (1) (2) over operating free-air temperature range (unless otherwise noted) (3) MIN VIN Differential Output Short Circuit Duration MAX UNIT +/−10 V (4) (5) See Supply Voltage (V+ - V−) 24 V V+ +0.8, V− −0.8 V +150 °C +150 °C Infrared or Convection (20 sec.) 235 °C Wave Soldering (10 sec.) 260 °C Voltage at Input/Output pins Junction Temperature (6) −65 Storage temperature range, Tstg Soldering Information: (1) (2) (3) (4) (5) (6) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Rating indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Output short circuit duration is infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms. The maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) - TA)/RθJA. All numbers apply for packages soldered directly onto a PC board. 6.2 ESD Ratings VALUE V(ESD) (1) (2) (3) Electrostatic discharge (1) Human Body Model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (2) ±2000 Machine Model (MM) (3) ±200 UNIT V Human Body Model, 1.5 kΩ in series with 100 pF. Machine Model, 0 Ω is series with 200 pF. JEDEC document JEP155 states that 2000-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 200-V MM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) Supply Voltage (V+ - V−) Operating Temperature Range (1) (1) MIN MAX 2.5 22 UNIT V −40 +85 °C The maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) - TA)/RθJA. All numbers apply for packages soldered directly onto a PC board. 6.4 Thermal Information THERMAL METRIC (1) RθJA (1) (2) 4 Junction-to-ambient thermal resistance (2) DGK 8 PINS 235 UNIT °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. The maximum power dissipation is a function of TJ(max),RθJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) - TA)/RθJA. All numbers apply for packages soldered directly onto a PC board. Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: LM8262 LM8262 www.ti.com 6.5 SNOS975G – MAY 2001 – REVISED AUGUST 2015 2.7V Electrical Characteristics Unless otherwise specified, all limits ensured for V+ = 2.7V, V− = 0V, VCM = 0.5V, VO = V+/2, and RL > 1MΩ to V−. Boldface limits apply at the temperature extremes. PARAMETER TEST CONDITIONS MIN (1) TYP (2) MAX (1) VOS Input Offset Voltage VCM = 0.5V & VCM = 2.2V – +/−0.7 +/−5 +/−7 TC VOS Input Offset Average Drift VCM = 0.5V & VCM = 2.2V – +/−2 – IB Input Bias Current VCM = 0.5V – −1.20 −2.00 −2.70 VCM = 2.2V – +0.49 +1.00 +1.60 – 20 250 400 76 60 100 – (3) (4) (4) IOS Input Offset Current VCM = 0.5V & VCM = 2.2V CMRR Common Mode Rejection Ratio VCM stepped from 0V to 1.0V VCM stepped from 1.7V to 2.7V – 100 – VCM stepped from 0V to 2.7V 58 50 70 – 78 74 104 – – −0.3 −0.1 0.0 2.8 2.7 3.0 – VO = 0.5 to 2.2V, RL = 10k to V− 70 67 78 – VO = 0.5 to 2.2V, RL = 2k to V− 67 63 73 – RL = 10k to V− 2.49 2.46 2.59 – RL = 2k to V− 2.45 2.41 2.53 – – 90 100 120 +PSRR Positive Power Supply Rejection Ratio V+ = 2.7V to 5V CMVR Input Common-Mode Voltage Range CMRR > 50dB AVOL VO Large Signal Voltage Gain Output Swing High ISC UNIT mV µV/C µA nA dB dB V V dB dB V Output Swing Low RL = 10k to V− Output Short Circuit Current Sourcing to V− VID = 200mV (5) (6) 30 20 48 – Sinking to V+ VID = −200mV 50 30 65 – – 2.0 2.5 3.0 mA – 9 – V/µs MHz IS Supply Current (both amps) SR Slew Rate (7) (5) (6) No load, VCM = 0.5V AV = +1,VI = 2VPP + mV mA fu Unity Gain-Frequency VI = 10mV, RL = 2kΩ to V /2 – 10 – GBWP Gain Bandwidth Product f = 50KHz 15.5 14 21 – Phim Phase Margin VI = 10mV – 50 – Deg en Input-Referred Voltage Noise f = 2KHz, RS = 50Ω – 15 – nV/ √Hz in Input-Referred Current Noise f = 2KHz – 1 – pA/ √Hz – 1 – MHz fmax (1) (2) (3) (4) (5) (6) (7) Full Power Bandwidth + ZL = (20pF || 10kΩ) to V /2 MHz All limits are ensured by testing or statistical analysis. Typical Values represent the most likely parametric norm. Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change. Positive current corresponds to current flowing into the device. Short circuit test is a momentary test. Output short circuit duration is infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms. Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower. Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: LM8262 5 LM8262 SNOS975G – MAY 2001 – REVISED AUGUST 2015 6.6 www.ti.com 5V Electrical Characteristics Unless otherwise specified, all limits ensured for V+ = 5V, V− = 0V, VCM = 1V, VO = V+/2, and RL > 1MΩ to V−. Boldface limits apply at the temperature extremes. PARAMETER TEST CONDITIONS MIN (1) TYP (2) MAX (1) VOS Input Offset Voltage VCM = 1V & VCM = 4.5V – +/−0.7 +/−5 +/− 7 TC VOS Input Offset Average Drift VCM = 1V & VCM = 4.5V – +/−2 – IB Input Bias Current VCM = 1V – −1.18 −2.00 −2.70 VCM = 4.5V – +0.49 +1.00 +1.60 – 20 250 400 84 72 110 – VCM stepped from 4V to 5V – 100 – VCM stepped from 0V to 5V 64 61 80 – 78 74 104 – – −0.3 −0.1 0.0 5.1 5.0 5.3 – VO = 0.5 to 4.5V, RL = 10k to V− 74 70 84 – VO = 0.5 to 4.5V, RL = 2k to V− 70 66 80 – RL = 10k to V− 4.75 4.72 4.87 – RL = 2k to V− 4.70 4.66 4.81 – – 86 125 135 (3) (4) (4) IOS Input Offset Current VCM = 1V & VCM = 4.5V CMRR Common Mode Rejection Ratio VCM stepped from 0V to 3.3V +PSRR Positive Power Supply Rejection Ratio V+ = 2.7V to 5V, VCM = 0.5V CMVR Input Common-Mode Voltage Range CMRR > 50dB AVOL VO Large Signal Voltage Gain Output Swing High ISC mV µV/°C µA nA dB dB V V dB V Output Swing Low RL = 10k to V− Output Short Circuit Current Sourcing to V− VID = 200mV (5) (6) 35 20 53 – Sinking to V+ VID = −200mV 60 50 75 – No load, VCM = 1V – 2.3 2.8 3.5 AV = +1, VI = 5VPP 10 7 12 – – 10.5 – (5) (6) UNIT mV mA IS Supply Current (both amps) SR Slew Rate fu Unity Gain Frequency VI = 10mV, RL = 2kΩ to V+/2 GBWP Gain-Bandwidth Product f = 50KHz 16 15 21 – Phim Phase Margin VI = 10mV – 53 – Deg en Input-Referred Voltage Noise f = 2KHz, RS = 50Ω – 15 – nV/ √Hz in Input-Referred Current Noise f = 2KHz – 1 – pA/ √Hz (1) (2) (3) (4) (5) (6) (7) 6 (7) mA V/µs MHz MHz All limits are ensured by testing or statistical analysis. Typical Values represent the most likely parametric norm. Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change. Positive current corresponds to current flowing into the device. Short circuit test is a momentary test. Output short circuit duration is infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms. Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower. Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: LM8262 LM8262 www.ti.com SNOS975G – MAY 2001 – REVISED AUGUST 2015 5V Electrical Characteristics (continued) Unless otherwise specified, all limits ensured for V+ = 5V, V− = 0V, VCM = 1V, VO = V+/2, and RL > 1MΩ to V−. Boldface limits apply at the temperature extremes. PARAMETER TEST CONDITIONS MIN (1) TYP (2) MAX (1) UNIT fmax Full Power Bandwidth ZL = (20pF || 10kΩ) to V+/2 – 900 – KHz tS Settling Time (+/−5%) 100mVPP Step, 500pF load – 400 – ns THD+N Total Harmonic Distortion + Noise RL = 1kΩ to V+/2 f = 10KHz to AV= +2, 4VPP swing – 0.05% – 6.7 +/−11V Electrical Characteristics Unless otherwise specified, all limits ensured for V+ = 11V, V− = −11V, VCM = 0V, VO = 0V, and RL > 1MΩ to 0V. Boldface limits apply at the temperature extremes. PARAMETER TEST CONDITIONS MIN (1) TYP (2) MAX (1) VOS Input Offset Voltage VCM = −10.5V & VCM = 10.5V – +/−0.7 +/−7 +/− 9 TC VOS Input Offset Average Drift VCM = −10.5V & VCM = 10.5V – +/−2 – IB Input Bias Current VCM = −10.5V – −1.05 −2.00 −2.80 VCM = 10.5V – +0.49 +1.00 +1.50 (3) (4) (4) IOS Input Offset Current VCM = −10.5V & VCM = 10.5V – 30 275 550 CMRR Common Mode Rejection Ratio VCM stepped from −11V to 9V 84 80 100 – VCM stepped from 10V to 11V – 100 – VCM stepped from −11V to 11V 74 72 88 – 70 66 100 – 70 66 100 – – −11.3 −11.1 −11.0 11.1 11.0 11.3 – VO = 0V to +/−9V, RL = 10kΩ 78 74 85 – VO = 0V to +/−9V, RL = 2kΩ 72 66 79 – RL = 10kΩ 10.65 10.61 10.77 – RL = 2kΩ 10.6 10.55 10.69 – RL = 10kΩ – −10.98 −10.75 −10.65 RL = 2kΩ – −10.91 −10.65 −10.6 + +PSRR Positive Power Supply Rejection Ratio −PSRR Negative Power Supply Rejection V− = −9V to −11V Ratio CMVR Input Common-Mode Voltage Range AVOL VO Large Signal Voltage Gain Output Swing High Output Swing Low (1) (2) (3) (4) V = 9V to 11V CMRR > 50dB UNIT mV µV/°C µA nA dB dB dB V V dB V V All limits are ensured by testing or statistical analysis. Typical Values represent the most likely parametric norm. Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change. Positive current corresponds to current flowing into the device. Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: LM8262 7 LM8262 SNOS975G – MAY 2001 – REVISED AUGUST 2015 www.ti.com +/−11V Electrical Characteristics (continued) Unless otherwise specified, all limits ensured for V+ = 11V, V− = −11V, VCM = 0V, VO = 0V, and RL > 1MΩ to 0V. Boldface limits apply at the temperature extremes. MIN (1) TYP (2) MAX (1) Sourcing to ground VID = 200mV (5) (6) 40 25 60 – Sinking to ground VID = 200mV (5) (6) 65 55 100 – – 2.5 4 5 10 8 15 – PARAMETER ISC Output Short Circuit Current TEST CONDITIONS UNIT mA IS Supply Current No load, VCM = 0V SR Slew Rate AV = +1, VI = 16VPP fU Unity Gain Frequency VI = 10mV, RL = 2kΩ – 13 – GBWP Gain-Bandwidth Product f = 50KHz 18 16 24 – Phim Phase Margin VI = 10mV – 58 – Deg en Input-Referred Voltage Noise f = 2KHz, RS = 50Ω – 15 – nV/ √Hz in Input-Referred Current Noise f = 2KHz – 1 – pA/ √Hz tS Settling Time (+/−1%, AV = +1) Positive Step, 5VPP – 320 – Negative Step, 5VPP – 600 – (7) THD+N Total Harmonic Distortion +Noise RL = 1kΩ, f = 10KHz, AV = +2, 15VPP swing – 0.01% – CTREJ Cross-Talk Rejection f = 5MHz, Driver RL = 10kΩ – 68 – (5) (6) (7) 8 mA V/µs MHz MHz ns dB Short circuit test is a momentary test. Output short circuit duration is infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms. Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower. Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: LM8262 LM8262 www.ti.com SNOS975G – MAY 2001 – REVISED AUGUST 2015 6.8 Typical Performance Characteristics TA = 25°C, Unless Otherwise Noted Figure 1. VOS vs. VCM for 3 Representative Units Figure 2. VOS vs. VCM for 3 Representative Units Figure 3. VOS vs. VCM for 3 Representative Units Figure 4. VOS vs. VS for 3 Representative Units Figure 5. VOS vs. VS for 3 Representative Units Figure 6. VOS vs. VS for 3 Representative Units Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: LM8262 9 LM8262 SNOS975G – MAY 2001 – REVISED AUGUST 2015 www.ti.com Typical Performance Characteristics (continued) TA = 25°C, Unless Otherwise Noted 10 Figure 7. IB vs. VCM Figure 8. IB vs. VS Figure 9. IS vs. VCM Figure 10. IS vs. VCM Figure 11. IS vs. VCM Figure 12. IS vs. VS (PNP side) Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: LM8262 LM8262 www.ti.com SNOS975G – MAY 2001 – REVISED AUGUST 2015 Typical Performance Characteristics (continued) TA = 25°C, Unless Otherwise Noted Figure 13. IS vs. VS (NPN side) Figure 14. Gain/Phase vs. Frequency Figure 15. Unity Gain Frequency vs. VS Figure 16. Phase Margin vs. VS Figure 17. Unity Gain Freq. and Phase Margin vs. VS Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: LM8262 11 LM8262 SNOS975G – MAY 2001 – REVISED AUGUST 2015 www.ti.com 7 Device and Documentation Support 7.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 7.2 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 7.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 7.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 8 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 12 Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: LM8262 PACKAGE OPTION ADDENDUM www.ti.com 29-Jul-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM8262MM NRND VSSOP DGK 8 1000 TBD Call TI Call TI -40 to 85 A46 LM8262MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A46 LM8262MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A46 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 29-Jul-2015 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 29-Jul-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM8262MM VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM8262MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM8262MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 29-Jul-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM8262MM VSSOP DGK 8 1000 210.0 185.0 35.0 LM8262MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM8262MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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