ON NCV8177AMX250TCG Linear voltage regulator fast transient response Datasheet

NCV8177
Linear Voltage Regulator
Fast Transient Response
500 mA with Enable
The NCV8177 is CMOS LDO regulator featuring 500 mA output
current. The input voltage is as low as 1.6 V and the output voltage can
be set from 0.75 V. It provides very stable and accurate voltage with
low noise and high Power Supply Rejection Ratio (PSRR) suitable for
RF applications. The NCV8177 is suitable for powering RF blocks of
automotive infotainment systems and other power sensitive device.
Due to low power consumption the NCV8177 offers high efficiency
and low thermal dissipation. Small 4−pin XDFN4 1.0 mm x 1.0 mm or
WDFNW8 2 mm x 2 mm packages make the device especially
suitable for space constrained applications.
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XDFN4
CASE 711AJ
•
•
•
Operating Input Voltage Range: 1.6 V to 5.5 V
Output Voltage Range: 0.7 V to 3.6 V
Quiescent Current typ. 60 mA
Low Dropout: 200 mV Typ. at 500 mA, VOUT−NOM = 1.8 V
High Output Voltage Accuracy ±0.8%
Stable with Small 1 mF Ceramic Capacitors
Over−current Protection
Thermal Shutdown Protection: 175°C
With (NCV8177A) and Without (NCV8177B) Output Discharge
Function
Available in XDFN4 1 mm x 1 mm x 0.4 mm and
WDFNW8 2 mm x 2 mm Packages
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
This is a Pb−Free Device
Typical Applications
• Lights
• Instrument Equipment
• Cameras, Camcorders, Sensors
NCV8177 in WDFNW8
VIN
CIN
1 μF
WDFNW8
CASE 511CL
MARKING DIAGRAMS
Features
•
•
•
•
•
•
•
•
•
1
1
ON
IN
OUT
IN
OUT
EN
GND
1
XX M
XX MG
G
(XDFN4)
(WDFNW8)
1
XX = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
PINOUT DIAGRAMS
IN
4
EN
3
EPAD
1
OUT
2
GND
XDFN4
IN
IN
NC
EN
8
7
6
5
VOUT
EPAD
COUT
1 μF
FB
OFF
NCV8177 in XDFN4
VIN
IN
CIN
1 μF
1
VOUT
OUT
COUT
1 μF
ON
EN
GND
4
GND
See detailed ordering, marking and shipping information on
page 11 of this data sheet.
Figure 1. Typical Application Schematics
March, 2018 − Rev. 5
3
ORDERING INFORMATION
OFF
© Semiconductor Components Industries, LLC, 2016
2
OUT OUT FB
WDFNW8
1
Publication Order Number:
NCV8177/D
NCV8177
Figure 2. Internal Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
XDFN4
WDFNW8
Pin
Name
1
1
OUT
Regulated output voltage pin
−
2
OUT
Regulated output voltage pin (Must be connected to pin 1)
4
8
IN
Power supply input voltage pin
−
7
IN
Power supply input voltage pin (Must be connected to pin 8)
2
4
GND
3
5
EN
Enable pin (active “H”)
−
3
FB
Feedback input pin (Must be connected to output voltage pin)
−
6
NC
Not internally connected. This pin can be tied to the ground plane to improve thermal dissipation.
−
−
EPAD
Description
Power supply ground pin
Exposed pad should be tied to ground plane for better power dissipation
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NCV8177
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
IN
−0.3 to 6.0
V
OUT
−0.3 to VIN + 0.3
V
Chip Enable Input
EN
−0.3 to 6.0
V
Feedback Input
FB
−0.3 to 6.0
V
Output Current
IOUT
Internally Limited
mA
Input Voltage (Note 1)
Output Voltage
TA
−40 to +125
°C
TJ(MAX)
150
°C
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Operating Ambient Temperature Range
Maximum Junction Temperature
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per JESD22−A114
ESD Machine Model tested per JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, XDFN4 (Note 3)
Thermal Resistance, Junction−to−Air
RqJA
223
°C/W
Thermal Characteristics, WDFNW8 (Note 3)
Thermal Resistance, Junction−to−Ambient
RqJA
72
°C/W
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7
RECOMMENDED OPERATING CONDITIONS
Symbol
Min
Max
Unit
Input Voltage
Rating
VIN
1.6
5.5
V
Junction Temperature
TJ
−40
125
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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NCV8177
ELECTRICAL CHARACTERISTICS
VIN = VOUT−NOM + 0.5 V or VIN = 1.6 V (whichever is higher), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C
The specifications in bold are guaranteed at −40°C ≤ TJ ≤ 125°C.
Parameter
Test Conditions
Max
Unit
1.6
5.5
V
−0.8
0.8
%
−40°C ≤ TJ ≤ 125°C
−2.0
1.0
TJ = +25°C
−1.2
1.2
−40°C ≤ TJ ≤ 125°C
−2.5
1.5
Input Voltage
Output Voltage
VOUT_NOM ≥ 1.8 V
TJ = +25°C
VOUT_NOM < 1.8 V
Symbol
Min
VIN
VOUT
Typ
Line Regulation
VIN = VOUT−NOM + 0.5 V to 5.25 V
VIN ≥ 1.6 V
LineReg
0.02
0.15
%/V
Load Regulation
1 mA ≤ IOUT ≤ 500 mA
LoadReg
1
10
mV
VDO
295
410
mV
1.8 V ≤ VOUT < 2.1 V
200
305
2.1 V ≤ VOUT < 2.5 V
160
260
2.5 V ≤ VOUT < 3.0 V
130
220
Dropout Voltage (Note 4)
IOUT = 500 mA
1.4 V ≤ VOUT < 1.8 V
3.0 V ≤ VOUT < 3.6 V
110
190
IOUT = 0 mA
IQ
60
90
mA
VEN = 0 V
ISTBY
0.1
1.5
mA
Output Current Limit
VOUT = VOUT−NOM − 100 mV
VIN = VOUT−NOM + 0.5 V or VIN = 1.7 V
(whichever is higher)
IOUT
510
800
mA
Short Circuit Current
VOUT = 0 V
ISC
510
800
mA
EN Input Voltage “H”
VENH
1.0
EN Input Voltage “L”
VENL
VEN = VIN = 5.5 V
IEN
0.15
f = 1 kHz, Ripple 0.2 Vp−p,
VIN = VOUT−NOM + 1.0 V, IOUT = 30 mA
(VOUT ≤ 2.0 V, VIN = 3.0 V)
PSRR
75
dB
54
mVRMS
Quiescent Current
Standby Current
EN Pin Threshold Voltage
Enable Input Current
Power Supply Rejection Ratio
Output Noise
Output Discharge Resistance
(NCV8177A option only)
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
f = 10 Hz to 100 kHz
V
0.4
0.6
mA
VIN = 4.0 V, VEN = 0 V, VOUT = VOUT−NOM
RACTDIS
60
W
Temperature rising from 25°C
TSD_TEMP
175
°C
Temperature falling from TSD_TEMP
TSD_HYST
20
°C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Measured when the output voltage falls 3% below the nominal output voltage (the voltage measured under the condition VIN = VOUT−NOM
+ 0.5 V).
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NCV8177
TYPICAL CHARACTERISTICS
0.710
1.82
0.705
1.81
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
VIN = VOUT−NOM + 0.5 V or VIN = 1.6 V (whichever is higher), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C
0.700
0.695
0.690
VOUT−NOM = 0.7 V
1.80
1.79
1.78
VOUT−NOM = 1.8 V
1.77
0.685
−20
0
20
40
60
80
100
1.76
−40
120
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 3. Output Voltage vs. Temperature
Figure 4. Output Voltage vs. Temperature
3.33
0.10
3.32
0.08
3.31
3.30
3.29
3.28
3.27
VOUT−NOM = 3.3 V
3.26
3.25
3.24
−40 −20
0
20
40
60
80
100
VOUT−NOM = 3.3 V
VIN = 3.8 V to 5.25 V
0.04
0.02
0
−0.02
−0.04
−0.06
−0.08
−0.10
−40
120
−20
0
20
40
60
80
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature
Figure 6. Line Regulation vs. Temperature
250
VOUT−NOM = 3.3 V
IOUT = 1 mA to 500 mA
3
2
1
0
−1
−2
−3
−4
−5
−40 −20
120
TJ = 125°C
VOUT−NOM = 1.8 V
DROPOUT VOLTAGE (mV)
4
120
0.06
5
LOAD REGULATION (mV)
−20
TEMPERATURE (°C)
LINE REGULATION (%/V)
OUTPUT VOLTAGE (V)
0.680
−40
200
TJ = 25°C
150
TJ = −40°C
100
50
0
0
20
40
60
80
100
0
120
100
200
300
400
500
TEMPERATURE (°C)
OUTPUT CURRENT (mA)
Figure 7. Load Regulation vs. Temperature
Figure 8. Dropout Voltage vs. Output Current
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NCV8177
TYPICAL CHARACTERISTICS
VIN = VOUT−NOM + 0.5 V or VIN = 1.6 V (whichever is higher), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C
250
160
TJ = 125°C
IOUT = 500 mA
200
DROPOUT VOLTAGE (mV)
DROPOUT VOLTAGE (mV)
VOUT−NOM = 1.8 V
150
IOUT = 250 mA
100
IOUT = 100 mA
50
100
80
TJ = −40°C
60
40
20
40
60
80
100
120
0
100
200
300
400
500
TEMPERATURE (°C)
OUTPUT CURRENT (mA)
Figure 9. Dropout Voltage vs. Temperature
Figure 10. Dropout Voltage vs. Output Current
0.6
VEN = 0 V
STANDBY CURRENT (mA)
VOUT−NOM = 3.3 V
140
DROPOUT VOLTAGE (mV)
TJ = 25°C
120
0
0
160
IOUT = 500 mA
120
100
IOUT = 250 mA
80
60
40
IOUT = 100 mA
20
0
−40 −20
IOUT = 10 mA
0
20
40
60
80
100
0.5
VOUT−NOM = 0.7 V to 3.3 V
0.4
0.3
0.2
0.1
0
−40 −20
120
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 11. Dropout Voltage vs. Temperature
Figure 12. Standby Current vs. Temperature
85
90
IOUT = 0 mA
80
QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)
VOUT−NOM = 3.3 V
20
IOUT = 10 mA
0
−40 −20
140
VOUT−NOM = 3.3 V
70
60
VOUT−NOM = 0.7 V
50
VOUT−NOM = 1.8 V
40
30
20
IOUT = 0 mA
10
0
−40
80
75
TJ = −40°C
70
65
60
TJ = 25°C
TJ = 125°C
55
VOUT−NOM = 1.8 V
50
−20
0
20
40
60
80
100
2.0
120
2.5
3.0
3.5
4.0
4.5
5.0
5.5
TEMPERATURE (°C)
INPUT VOLTAGE (V)
Figure 13. Quiescent Current vs. Temperature
Figure 14. Quiescent Current vs. Input Voltage
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NCV8177
TYPICAL CHARACTERISTICS
VIN = VOUT−NOM + 0.5 V or VIN = 1.6 V (whichever is higher), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C
1000
SHORT CIRCUIT CURRENT (mA)
GROUND CURRENT (mA)
300
250
200 TJ = −40°C
150
TJ = 25°C
100
TJ = 125°C
50
VOUT−NOM = 1.8 V
0
0
100
200
300
400
500
1.8 V
800
1.4 V
750
3.3 V
700
650
VOUT−NOM = 0.7 V
600
550
500
−40 −20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 15. Ground Current vs. Output Current
Figure 16. Short Circuit Current vs.
Temperature
ENABLE THRESHOLD VOLTAGE (V)
950
VOUT−FORCED = VOUT−NOM − 0.1 V
900
1.8 V
850
800
1.4 V
750
3.3 V
700
650
VOUT−NOM = 0.7 V
600
550
500
−40 −20
0
20
40
60
80
100
120
OFF −> ON
0.8
ON −> OFF
0.7
0.6
0.5
VOUT−NOM = 1.8 V
0.4
−40 −20
0
20
40
60
80
100
Figure 17. Output Current Limit vs.
Temperature
Figure 18. Enable Threshold Voltage vs.
Temperature
VOUT−NOM = 1.8 V
VIN = 5.5 V
VEN = 5.5 V
0.5
0.4
0.3
0.2
0.1
0
−40
0.9
TEMPERATURE (°C)
0.6
−20
0
20
40
60
80
100
120
120
1.0
TEMPERATURE (°C)
OUTPUT DISCHARGE RESISTANCE (W)
OUTPUT CURRENT LIMIT (mA)
900
850
OUTPUT CURRENT (mA)
1000
ENABLE INPUT CURRENT (mA)
VOUT−FORCED = 0 V
950
120
80
70
60
50
40
30
VOUT−NOM = 1.8 V
VIN = 4 V
VEN = 0 V
VOUT−FORCED = VOUT−NOM
20
10
0
−40
−20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 19. Enable Input Current vs.
Temperature
Figure 20. Output Discharge Resistance vs.
Temperature (NCV8177A option only)
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NCV8177
TYPICAL CHARACTERISTICS
VIN = VOUT−NOM + 0.5 V or VIN = 1.6 V (whichever is higher), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C
90
6
OUTPUT VOLTAGE NOISE (mV/√Hz)
COUT = 1 mF X7R 0805
80
60
50
40
30
20
VOUT_NOM = 1.8 V, VIN = 3.0 V
VOUT_NOM = 3.3 V, VIN = 4.3 V
10
COUT = 1 mF X7R 0805
4
Integral Noise:
10 Hz − 100 kHz: 54 mVrms
10 Hz − 1 MHz: 62 mVrms
3
2
1
0
0
10
100
1k
10k
100k
1M
10M
10
100
1k
100k
FREQUENCY (Hz)
Figure 21. Power Supply Rejection Ratio
Figure 22. Output Voltage Noise Spectral
Density
IIN
VIN
500 mV/div
VIN
1 V/div
50 mA/div
IIN
VOUT
1 V/div
VOUT
50 ms/div
1 ms/div
Figure 23. Turn−ON/OFF − VIN Driven (slow)
Figure 24. Turn−ON − VIN Driven (fast)
VIN
VOUT−NOM = 1.8 V
500 mV/div
2 V/div
1M
VOUT−NOM = 1.8 V
VOUT−NOM = 1.8 V
50 mA/div
10k
FREQUENCY (Hz)
VOUT−NOM = 1.8 V
VEN
IIN
3.3 V
VIN
tR = tF = 1 ms
2.3 V
500 mV/div
Without output discharge
With output discharge
5 mV/div
PSRR (dB)
70
VOUT_NOM = 1.8 V, VIN = 3.0 V
VOUT_NOM = 3.3 V, VIN = 4.3 V
5
VOUT
1.8 V
VOUT
5 ms/div
1 ms/div
Figure 25. Turn−ON/OFF − EN Driven
Figure 26. Line Transient Response
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NCV8177
TYPICAL CHARACTERISTICS
VIN
500 mA
VOUT−NOM = 1.8 V
tR = tF = 1 ms
1 mA
IOUT
VOUT
1.8 V
PD(MAX), 2 oz Cu
350
0.7
0.6
330
310
PD(MAX), 1 oz Cu 0.5
290
0.4
270
0.3
250
qJA, 1 oz Cu
0.2
230
0.1
210
qJA, 2 oz Cu
190
0
20 ms/div
100
200
300
400
0
500
600
PCB COPPER AREA (mm2)
PD(MAX), MAXIMUM POWER DISSIPATION (W)
370
qJA, JUNCTION TO AMBIENT
THERMAL RESISTANCE (°C/W)
50 mV/div
200 mA/div
1 V/div
VIN = VOUT−NOM + 0.5 V or VIN = 1.6 V (whichever is higher), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C
Figure 28. qJA and PD(MAX) vs. Copper Area
Figure 27. Load Transient Response
APPLICATIONS INFORMATION
General
Output Capacitor Selection (COUT)
The NCV8177 is a high performance 500 mA low dropout
linear regulator (LDO) delivering excellent noise and
dynamic performance. Thanks to its adaptive ground current
behavior the device consumes only 60 mA of quiescent
current (no−load condition).
The regulator features low noise of 48 mVRMS, PSRR of
75 dB at 1 kHz and very good line/load transient
performance. Such excellent dynamic parameters, small
dropout voltage and small package size make the device an
ideal choice for powering the precision noise sensitive
circuitry in portable applications.
A logic EN input provides ON/OFF control of the output
voltage. When the EN is low the device consumes as low as
100 nA typ. from the IN pin.
The device is fully protected in case of output overload,
output short circuit condition or overheating, assuring a very
robust design.
The LDO requires an output capacitor connected as close
as possible to the output and ground pins. The recommended
capacitor value is 1 mF, ceramic X7R or X5R type due to its
low capacitance variations over the specified temperature
range. The LDO is designed to remain stable with minimum
effective capacitance of 0.8 mF. When selecting the capacitor
the changes with temperature, DC bias and package size
needs to be taken into account. Especially for small package
size capacitors such as 0201 the effective capacitance drops
rapidly with the applied DC bias voltage (refer the
capacitor’s datasheet for details).
There is no requirement for the minimum value of
equivalent series resistance (ESR) for the COUT but the
maximum value of ESR should be less than 0.5 W. Larger
capacitance and lower ESR improves the load transient
response and high frequency PSRR. Only ceramic
capacitors are recommended, the other types like tantalum
capacitors not due to their large ESR.
Input Capacitor Selection (CIN)
Input capacitor connected as close as possible is necessary
to ensure device stability. The X7R or X5R capacitor should
be used for reliable performance over temperature range.
The value of the input capacitor should be 1 mF or greater for
the best dynamic performance. This capacitor will provide
a low impedance path for unwanted AC signals or noise
modulated onto the input voltage.
There is no requirement for the ESR of the input capacitor
but it is recommended to use ceramic capacitor for its low
ESR and ESL. A good input capacitor will limit the
influence of input trace inductance and source resistance
during load current changes.
Enable Operation
The LDO uses the EN pin to enable/disable its operation
and to deactivate/activate the output discharge function
(A−version only).
If the EN pin voltage is < 0.4 V the device is disabled and
the pass transistor is turned off so there is no current flow
between the IN and OUT pins. On A−version the active
discharge transistor is active so the output voltage is pulled
to GND through 60 W (typ.) resistor.
If the EN pin voltage is > 1.0 V the device is enabled and
regulates the output voltage. The active discharge transistor
is turned off.
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NCV8177
The power dissipated by the LDO for given application
conditions can be calculated by the next equation:
The EN pin has internal pull−down current source with
value of 300 nA typ. which assures the device is turned off
when the EN pin is unconnected. In case when the EN
function isn’t required the EN pin should be tied directly to
IN pin.
P D + V IN @ I GND ) ǒV IN * V OUTǓ @ I OUT [W]
Where: IGND is the LDO’s ground current, dependent on the
output load current.
Connecting the exposed pad and N/C pin to a large ground
planes helps to dissipate the heat from the chip.
The relation of θJA and PD(MAX) to PCB copper area and
Cu layer thickness could be seen on the Figure 26.
Output Current Limit
Output current is internally limited to a 750 mA typ. The
LDO will source this current when the output voltage drops
down from the nominal output voltage (test condition is
VOUT−NOM – 100 mV). If the output voltage is shorted to
ground, the short circuit protection will limit the output
current to 700 mA typ. The current limit and short circuit
protection will work properly over the whole temperature
and input voltage ranges. There is no limitation for the short
circuit duration.
Reverse Current
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case when VOUT > VIN.
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
Thermal Shutdown
When the LDO’s die temperature exceeds the thermal
shutdown threshold value the device is internally disabled.
The IC will remain in this state until the die temperature
decreases by value called thermal shutdown hysteresis.
Once the IC temperature falls this way the LDO is back
enabled. The thermal shutdown feature provides the
protection against overheating due to some application
failure and it is not intended to be used as a normal working
function.
Power Supply Rejection Ratio
The LDO features very high power supply rejection ratio.
The PSRR at higher frequencies (in the range above
100 kHz) can be tuned by the selection of COUT capacitor
and proper PCB layout. A simple LC filter could be added
to the LDO’s IN pin for further PSRR improvement.
Enable Turn−On Time
The enable turn−on time is defined as the time from EN
assertion to the point in which VOUT will reach 98% of its
nominal value. This time is dependent on various
application conditions such as VOUT−NOM, COUT and TA.
Power Dissipation
Power dissipation caused by voltage drop across the LDO
and by the output current flowing through the device needs
to be dissipated out from the chip. The maximum power
dissipation is dependent on the PCB layout, number of used
Cu layers, Cu layers thickness and the ambient temperature.
The maximum power dissipation can be computed by
following equation:
P D(MAX) +
TJ * TA
125 * T A
+
[W]
q JA
q JA
(eq. 2)
PCB Layout Recommendations
To obtain good transient performance and good regulation
characteristics place CIN and COUT capacitors as close as
possible to the device pins and make the PCB traces wide.
In order to minimize the solution size, use 0402 or 0201
capacitors size with appropriate effective capacitance.
Larger copper area connected to the pins will also improve
the device thermal resistance. The actual power dissipation
can be calculated from the equation above (Power
Dissipation section). Exposed pad and N/C pin should be
tied to the ground plane for good power dissipation.
(eq. 1)
Where: (TJ − TA) is the temperature difference between the
junction and ambient temperatures and θJA is the thermal
resistance (dependent on the PCB as mentioned above).
For reliable operation junction temperature should be
limited to +125°C.
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NCV8177
ORDERING INFORMATION
Part Number
Voltage Option
Option
Marking
NCV8177AMX075TCG
0.75 V
VA
NCV8177AMX090TCG
0.90 V
VH
NCV8177AMX120TCG
1.20 V
VC
NCV8177AMX150TCG
1.50 V
NCV8177AMX180TCG
1.80 V
NCV8177AMX250TCG
2.50 V
VF
NCV8177AMX330TCG
3.30 V
VG
NCV8177BMX075TCG
0.75 V
V2
NCV8177BMX090TCG
0.90 V
VZ
NCV8177BMX120TCG
1.20 V
V3
NCV8177BMX150TCG
1.50 V
NCV8177BMX180TCG
1.80 V
V5
NCV8177BMX250TCG
2.50 V
V6
NCV8177BMX330TCG
3.30 V
V7
NCV8177AMTW090TCG
0.90 V
TH
NCV8177AMTW110TCG
1.10 V
NCV8177AMTW120TCG
1.20 V
With output discharge
Package
Shipping†
XDFN4
(Pb−Free)
3000 / Tape & Reel
WDFNW8
Wettable Flank
(Pb−Free)
3000 / Tape & Reel
VD
VE
Without output discharge
With output discharge
V4
TC
TK
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
11
NCV8177
PACKAGE DIMENSIONS
WDFNW8 2x2, 0.5P
CASE 511CL
ISSUE O
ÇÇ
ÇÇ
PIN ONE
REFERENCE
L3
B
A
D
L
E
L3
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. THIS DEVICE CONTAINS WETTABLE FLANK
DESIGN FEATURES TO AID IN FILLET FORMATION ON THE LEADS DURING MOUNTING.
L
ALTERNATE
CONSTRUCTION
DETAIL A
EXPOSED
COPPER
TOP VIEW
A4
A1
DETAIL B
A
0.10 C
A1
A4
A3
C
0.08 C
NOTE 4
C
SIDE VIEW
SEATING
PLANE
8X
A4
PLATED
SURFACES
D2
1
ALTERNATE
CONSTRUCTION
DETAIL B
C
DETAIL A
PLATING
L
8
5
e
e/2
8X
RECOMMENDED
SOLDERING FOOTPRINT*
PACKAGE
OUTLINE
b
0.10 C A B
0.05 C
MILLIMETERS
MIN
NOM
MAX
0.70
0.75
0.80
0.00
0.03
0.05
0.20 REF
0.05
0.10
0.15
0.20
0.25
0.30
1.90
2.00
2.10
1.50
1.60
1.70
1.90
2.00
2.10
0.80
0.90
1.00
0.50 BSC
0.25
−−−
−−−
0.20
0.30
0.40
0.00
0.05
0.10
SECTION C−C
4
E2
K
L3
DIM
A
A1
A3
A4
b
D
D2
E
E2
e
K
L
L3
1.70
8X
0.65
NOTE 3
BOTTOM VIEW
2.60
1.00
1
0.50
PITCH
8X
0.30
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
12
NCV8177
PACKAGE DIMENSIONS
XDFN4 1.0x1.0, 0.65P
CASE 711AJ
ISSUE A
PIN ONE
REFERENCE
0.05 C
2X
4X
A
B
D
ÉÉ
ÉÉ
E
4X
L2
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM THE TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
b2
DETAIL A
DIM
A
A1
A3
b
b2
D
D2
E
e
L
L2
0.05 C
2X
TOP VIEW
(A3)
0.05 C
A
0.05 C
NOTE 4
A1
SIDE VIEW
C
SEATING
PLANE
MILLIMETERS
MIN
MAX
0.33
0.43
0.00
0.05
0.10 REF
0.15
0.25
0.02
0.12
1.00 BSC
0.43
0.53
1.00 BSC
0.65 BSC
0.20
0.30
0.07
0.17
e
RECOMMENDED
MOUNTING FOOTPRINT*
e/2
DETAIL A
1
4X
2
L
0.65
PITCH
D2
45 5
D2
4
2X
0.52
PACKAGE
OUTLINE
3
4X
4X
b
0.05
BOTTOM VIEW
4X
M
0.11
0.39
1.20
C A B
NOTE 3
4X
0.24
4X
0.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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NCV8177/D