BCM48B x 120 y 300A00 PRELIMINARY DATASHEET BCM™ Bus Converter S ® US C C FEATURES US DESCRIPTION The V•I Chip™ bus converter is a high efficiency (>96%) Sine Amplitude Converter™ (SAC™) operating from a 38 to 55 Vdc primary bus to deliver an isolated, unregulated 9.5 to 13.8 output. The Sine Amplitude Converter offers a low AC impedance beyond the bandwidth of most downstream regulators; therefore capacitance normally at the load can be located at the input to the Sine Amplitude Converter. Since the transformation ratio of the BCM48BF120T300A00 is 1/4, the capacitance value can be reduced by a factor of 16x, resulting in savings of board area, materials and total system cost. The BCM48BF120T300A00 is provided in a V•I Chip package compatible with standard pick-and-place and surface mount assembly processes. The co-molded V•I Chip package provides enhanced thermal management due to a large thermal interface area and superior thermal conductivity. The high conversion efficiency of the BCM48BF120T300A00 increases overall system efficiency and lowers operating costs compared to conventional approaches. • 48 Vdc – 12 Vdc 300 W Bus Converter • High efficiency (>96%) reduces system power consumption • High power density (>1022 W/in3) reduces power system footprint by >40% • Contains built-in protection features: - NRTL Undervoltage Overvoltage Lockout Overcurrent Protection Short circuit Protection Overtemperature Protection • Provides enable/disable control, internal temperature monitoring • Can be paralleled to create multi-kW arrays TYPICAL APPLICATIONS PART NUMBERING • High End Computing Systems • Automated Test Equipment • High Density Power Supplies • Communications Systems PART NUMBER BCM48B x 120 y 300A00 PACKAGE STYLE F = J-Lead T = Through hole PRODUCT GRADE T = -40° to 125°C M = -55° to 125°C For Storage and Operating Temperatures see Section 6.0 General Characteristics TYPICAL APPLICATION enable / disable switch PC TM TM SW1 BCM Bus Converter F1 +In +Out -In -Out VIN L O A D V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 1 of 18 v i c o r p o w e r. c o m BCM48B x 120 y 300A00 PRELIMINARY DATASHEET 1.0 ABSOLUTE MAXIMUM VOLTAGE RATINGS The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device. MIN MAX UNIT MAX UNIT MIN +IN to –IN . . . . . . . . . . . . . . . . . . . . . . . -1 VIN slew rate (operational) . . . . . . . . . -1 Isolation voltage, input to output . . . . +OUT to –OUT . . . . . . . . . . . . . . . . . . . Output current transient (< = 10 ms, < = 10% DC) . . . . . . . . . . . . -1 -3 60 V Output current average . . . . . . . . . . . . -2 30 A 1 V/µs V PC to –IN . . . . . . . . . . . . . . . . . . . . . . . . -0.3 20 V 2250 TM to –IN . . . . . . . . . . . . . . . . . . . . . . . -0.3 7 V 16 V Operating IC junction temperature . . -40 125 °C Storage temperature . . . . . . . . . . . . . . -40 125 °C 37.5 A 2.0 ELECTRICAL CHARACTERISTICS Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40°C < TC < 100°C (T-Grade); All other specifications are at TC = 25ºC unless otherwise noted. ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN TYP MAX UNIT 38 55 V 38 55 V POWERTRAIN Input voltage range, continuous Input voltage range, transient Quiescent current VIN_DC VIN_TRANS IQ VIN to VOUT time TON1 Full current or power supported, 50 ms max, 10% duty cycle max Disabled, PC Low VIN = 48 V, PC floating 340 VIN = 48 V, TC = 25ºC No load power dissipation PNL VIN = 48 V ms 5.3 6.5 3 15 VIN = 38 V to 55 V 17 Worse case of: VIN = 55 V, COUT = 1000 µF, RLOAD = 391 mΩ DC input current IIN_DC At POUT = 300 W Output power (average) mA 9 IINR_P K 1.0 620 VIN = 38 V to 55 V, TC = 25ºC Inrush current peak Transformation ratio 0.5 450 10 8.8 K = VOUT / VIN, at no load 1/4 POUT_AVG Output power (peak) POUT_PK Output current (average) IOUT_AVG Output current (peak) IOUT_PK ηAMB Efficiency (ambient) ηHOT η20% Efficiency (hot) Efficiency (over load range) Output resistance Switching frequency 300 W W 30 A 10 ms max, IOUT_AVG ≤ 30 A 37.5 A VIN = 48 V, IOUT = 25 A; Tc = 25°C 95.0 VIN = 38 V to 55 V, IOUT = 25 A; Tc = 25°C 93.5 VIN = 48 V, IOUT = 13 A; Tc = 25°C 94.5 95.5 VIN = 48 V, IOUT = 25 A; Tc = 100°C 94.5 95.6 80 IOUT = 25 A, Tc = -40°C 4.9 ROUT_AMB IOUT = 25 A, Tc = 25°C ROUT_HOT IOUT = 25 A, TC = 100°C FSW Output inductance (parasitic) LOUT_PAR Output capacitance (internal) COUT_INT COUT_EXT Output capacitance (external) A V/V 350 5 A < IOUT < 25 A VOUT_PP A 10 ms max, POUT_AVG ≤ 300 W ROUT_COLD Output voltage ripple 20 W 96.0 % % % 6.7 9.0 mΩ 6.3 9.0 13.4 mΩ 8.8 11.5 14.0 mΩ 1.85 1.95 2.05 MHz 150 285 mV COUT = 0 F, IOUT = 25 A, VIN = 48 V, 20 MHz BW, Section 10 Frequency up to 30 MHz, Simulated J-lead model 600 Effective value at 12 VOUT pH 47 0 V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 µF 1000 µF Rev. 1.2 7/2011 Page 2 of 18 v i c o r p o w e r. c o m BCM48B x 120 y 300A00 PRELIMINARY DATASHEET 2.0 ELECTRICAL CHARACTERISTICS (CONT.) ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN TYP MAX UNIT VIN_OVLO+ 55.1 58.5 60.0 V Input overvoltage recovery threshold VIN_OVLO- 55.1 58.0 60.0 Input overvoltage lockout hysteresis VIN_OVLO_HYST PROTECTION Input overvoltage lockout threshold Overvoltage lockout response time Fault recovery time V 1.2 TOVLO V 8 µs TAUTO_RESTART 240 300 380 ms VIN_UVLOVIN_UVLO+ 28.5 31.1 37.4 V Input undervoltage recovery threshold 28.5 33.7 37.4 V Input undervoltage lockout hysteresis VIN_UVLO_HYST 1.6 V Undervoltage lockout response time TUVLO 8 µs Input undervoltage lockout threshold Output overcurrent trip threshold IOCP Output overcurrent response time constant TOCP Short circuit protection trip threshold ISCP Short circuit protection response time TSCP Thermal shutdown threshold 30 Effective internal RC filter 39 55 A 5.3 ms 1 µs 30 TJ_OTP A ºC 125 50.00 350 43.75 325 37.50 300 31.25 275 25.00 250 18.75 225 12.50 200 6.25 8.70 9.23 9.76 10.29 10.82 11.36 11.89 12.42 12.95 13.48 Output Current (A) Output Power (W) Safe Operating Area Average & Peak 375 14.01 Output Voltage (V) P (ave) P (pk), < 10 ms I (ave) I (pk), < 10 ms Figure 1 — Safe operating area V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 3 of 18 v i c o r p o w e r. c o m BCM48B x 120 y 300A00 PRELIMINARY DATASHEET 3.0 SIGNAL CHARACTERISTICS Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40°C < TC < 100°C (T-Grade); All other specifications are at TC = 25°C unless otherwise noted. PRIMARY CONTROL : PC • The PC pin enables and disables the BCM. When held low, • PC pin outputs 5 V during normal operation. PC pin internal bias the BCM is disabled. level drops to 2.5 V during fault mode, provided VIN remains in the valid range. • In an array of BCM modules, PC pins should be interconnected to synchronize start up and permit start up into full load conditions. SIGNAL TYPE STATE Regular Operation ANALOG OUTPUT Standby Transition DIGITAL INPUT / OUPUT ATTRIBUTE MIN TYP VPC 4.7 5.0 5.3 V PC available current IPC_OP 2.0 3.5 5.0 mA PC source (current) IPC_EN 50 100 50 150 PC voltage PC resistance (internal) PC capacitance (internal) SYMBOL CONDITIONS / NOTES RPC_INT CPC_INT Internal pull down resistor To permit regular operation Section 7 MAX UNIT µA 400 kΩ 1000 pF Start Up PC load resistance RPC_S Start Up PC time to start TON1 340 450 620 ms VPC_EN 2.0 2.5 3.0 V Regular Operation PC enable threshold Standby PC disable duration PC threshold hysteresis Transition PC enable to VOUT time 60 TPC_DIS_T Minimum time before attempting re-enable VPC_HYSTER TON2 PC disable to standby time TPC-DIS PC fault response time TFR_PC kΩ 1 s 50 VIN = 48 V for at least TON1 ms 50 From fault to PC = 2 V mV 100 150 µs 4 10 µs 100 µs TEMPERATURE MONITOR : TM • The TM pin monitors the internal temperature of the controller IC • Can be used as a "Power Good" flag to verify that within an accuracy of ±5°C. the BCM module is operating. • Is used to drive the internal comparator for Overtemperature Shutdown. SIGNAL TYPE STATE ATTRIBUTE TM voltage range ANALOG OUTPUT Regular Operation Transition Standby CONDITIONS / NOTES VTM TM voltage reference VTM_AMB TM available current ITM TM gain DIGITAL OUTPUT (FAULT FLAG) SYMBOL MIN TJ controller = 27°C 2.95 VTM_PP TM capacitance (external) CTM_EXT TM fault response time TFR_TM TM voltage VTM_DIS TM pull down (internal) RTM_INT MAX UNIT 4.04 3.00 3.05 100 ATM TM voltage ripple TYP 2.12 10 120 From fault to TM = 1.5 V 10 mV/°C 200 mV 50 pF µs 0 25 V µA CTM = 0 pF, VIN = 48 V, IOUT = 25 A Internal pull down resistor V 40 V 50 kΩ RESERVED : RSV Reserved for factory use. No connection should be made to this pin. V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 4 of 18 v i c o r p o w e r. c o m v i c o r p o w e r. c o m NL 5V 2.5 V 5V 3V PC VUVLO+ VUVLO– V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 1 A E: TON2 F: TOCP G: TPC–DIS H: TSCP** B D 1: Controller start 2: Controller turn off 3: PC release C *Min value switching off **From detection of error to power train shutdown A: TON1 B: TOVLO* C: TAUTO_RESTART D:TUVLO 0.4 V 3 V @ 27°C TM LL • K Vout C 500mS before retrial 3V VIN VOVLO+ VOVLO– 2 F 4: PC pulled low 5: PC released on output SC 6: SC removed IOCP ISSP IOUT E 3 G 4 Notes: H 5 – Timing and signal amplitudes are not to scale – Error pulse width is load dependent 6 PRELIMINARY DATASHEET BCM48B x 120 y 300A00 4.0 TIMING DIAGRAM Rev. 1.2 7/2011 Page 5 of 18 BCM48B x 120 y 300A00 PRELIMINARY DATASHEET 5.0 APPLICATION CHARACTERISTICS The following values, typical of an application environment, are collected at TC = 25ºC unless otherwise noted. See associated figures for general trend data. Full Load Efficiency vs. TCASE 96.5 11 Full Load Efficiency (%) 10 9 8 7 6 5 96.0 95.5 95.0 94.5 4 94.0 38 40 42 44 46 47 49 51 53 55 -40 -20 Input Voltage (V) -40°C 25°C 100°C VIN : 30 20 PD 15 77 10 72 5 67 10 15 38 V 48 V 55 V η 88 48 V 55 V 6 5 10 38 V VIN: 6 78 15 55 V 38 V 48 V 55 V Rout (mΩ) 12 10 8 6 -40 -20 0 20 40 60 80 100 Case Temperature (°C) Load Current (A) 48 V 55 V 4 0 25 20 48 V 14 Power Dissipation (W) Efficiency (%) 12 PD 38 V 0 25 20 ROUT vs. TCASE at VIN = 48 V 18 83 VIN: 15 Figure 5 — Efficiency and power dissipation at TC = 25°C η 10 12 83 24 5 18 PD Efficiency & Power Dissipation 100°C Case 0 55 V Load Current (A) 38 V 98 88 48 V 93 0 Figure 4 — Efficiency and power dissipation at TC = -40°C 93 100 24 Load Current (A) 38 V VIN: 80 78 0 25 20 Efficiency (%) Efficiency (%) 25 87 5 60 98 Power Dissipation (W) η 0 40 Efficiency & Power Dissipation 25°C Case Efficiency & Power Dissipation -40°C Case 97 82 20 Figure 3 — Full load efficiency vs. temperature; VIN Figure 2 — No load power dissipation vs. VIN 92 0 Case Temperature (°C) Power Dissipation (W) No Load Power Dissipation (W) No Load Power Dissipation vs. Line 12 38 V 48 V Figure 6 — Efficiency and power dissipation at TC = 100°C 55 V I OUT : 12.5 A 25 A Figure 7 — ROUT vs. temperature V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 6 of 18 v i c o r p o w e r. c o m BCM48B x 120 y 300A00 PRELIMINARY DATASHEET Output Voltage Ripple vs. Load 145 Ripple (mV pk-pk) 125 105 85 65 45 25 0 5 10 15 20 25 Load Current (A) VIN : 48 V Figure 8 — VRIPPLE vs. IOUT ; No external COUT. Board mounted module, scope setting : 20 MHz analog BW Figure 9 — Full load ripple, 330 µF CIN; No external COUT. Board mounted module, scope setting : 20 MHz analog BW Figure 10 — Start up from application of PC; VIN pre-applied COUT = 1000 µF Figure 11 — 0 A– 25 A transient response: CIN = 330 µF, IIN measured prior to CIN , no external COUT Figure 12 — 25 A – 0 A transient response: CIN = 330 µF, IIN measured prior to CIN , no external COUT V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 7 of 18 v i c o r p o w e r. c o m BCM48B x 120 y 300A00 PRELIMINARY DATASHEET 6.0 GENERAL CHARACTERISTICS Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40ºC < TJ < 100ºC (T-Grade); All other specifications are at TJ = 25°C unless otherwise noted. ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN TYP MAX UNIT MECHANICAL Length L 32.25 / [1.270] 32.50 / [1.280] 32.75 / [1.289] mm/[in] Width W 21.75 / [0.856] 22.00 / [0.866] 22.25 / [0.876] mm/[in] Height H 6.48 / [0.255] 6.73 / [0.265] 6.98 / [0.275] mm/[in] Volume Vol Weight W Lead finish No heat sink 4.81 / [0.294] cm3/[in3] 14.5 / [0.512] g/[oz] Nickel 0.51 2.03 Palladium 0.02 0.15 Gold 0.003 0.051 BCM48BF120T300A00 (T-Grade) -40 125 °C BCM48BF120M300A00 (M-Grade) Isothermal heatsink and isothermal internal PCB -55 125 °C µm THERMAL Operating temperature TJ φJC Thermal resistance Thermal capacity 1 °C/W 5 Ws/°C ASSEMBLY Peak compressive force applied to case (Z-axis) Supported by J-lead only Storage temperature TST Moisture sensitivity level MSL lbs lbs / in2 BCM48BF120T300A00 (T-Grade) -40 125 °C BCM48BF120M300A00 (M-Grade) -65 125 °C MSL 4 ESDHBM Human Body Model, "JEDEC JESD 22-A114D.01"Class 1D 1000 ESDCDM Charge Device Model, "JEDEC JESD 22-C101-D" 400 ESD withstand 6 5.41 V SOLDERING 245 MSL 4 Peak temperature during reflow °C °C Peak time above 217°C 60 90 s Peak heating rate during reflow 1.5 3 °C/s Peak cooling rate post reflow 1.5 6 °C/s 60 VDC SAFETY Working voltage (IN – OUT) VIN_OUT Isolation voltage (hipot) VHIPOT 2,250 Isolation capacitance CIN_OUT Unpowered unit Isolation resistance RIN_OUT At 500 Vdc MIL-HDBK-217Plus Parts Count 25°C Ground Benign, Stationary, Indoors / Computer Profile Telcordia Issue 2 - Method I Case III; 25°C Ground Benign, Controlled MTBF Agency approvals / standards 2500 VDC 3200 10 3800 pF MΩ 6.03 MHrs 7.94 MHrs cTUVus cURus CE Mark RoHS 6 of 6 V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 8 of 18 v i c o r p o w e r. c o m PRELIMINARY DATASHEET BCM48B x 120 y 300A00 7.0 USING THE CONTROL SIGNALS PC, TM Primary Control (PC) pin can be used to accomplish the following functions: • Logic enable and disable for module: Once Ton1 time has been satisfied, a PC voltage greater than Vpc_en will cause the module to start. Bringing PC lower than Vpc_dis will cause the module to enter standby. • Auxiliary voltage source: Once enabled in regular operational conditions (no fault), each BCM module PC provides a regulated 5 V, 3.5 mA voltage source. • Synchronized start up: In an array of parallel modules, PC pins should be connected to synchronize start up across units. This permits the maximum load and capacitance to scale by the number of paralleled modules. • Output disable: PC pin can be actively pulled down in order to disable the module. Pull down impedance shall be lower than 60 Ω. • Fault detection flag: The PC 5 V voltage source is internally turned off as soon as a fault is detected. • Note that PC can not sink significant current during a fault condition. The PC pin of a faulted module will not cause interconnected PC pins of other modules to be disabled. Temperature Monitor (TM) pin provides a voltage proportional to the absolute temperature of the converter control IC. It can be used to accomplish the following functions: • Monitor the control IC temperature: The temperature in Kelvin is equal to the voltage on the TM pin scaled by 100. (i.e. 3.0 V = 300 K = 27ºC). If a heat sink is applied, TM can be used to protect the system thermally. • Fault detection flag: The TM voltage source is internally turned off as soon as a fault is detected. For system monitoring purposes microcontroller interface faults are detected on falling edges of TM signal. V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 9 of 18 v i c o r p o w e r. c o m v i c o r p o w e r. c o m PC -Vin +Vin 1000 pF 3.1 V Vcc 100 uA 150 K 2.5 V PC Pull-Up & Source One shot delay Ton1 5 V, 2 mA min 18.5 V “Wake-Up” Power And Logic Vin Gate Drive supply UVLO OVLO Adaptive Soft Start Vcc Start up & Fault logic Enable Modulator V2 Primary current sensing Q2 Overtemperature Protection Primary Gate Drive Q1 Temp_Vref Lr Q4 Vref Temperature dependent voltage source Cr Primary Stage & Resonant Tank Q3 Slow current limit ∫ Fast current Limit Q6 40 K Overcurrent Protection Secondary Gate Drive Power Transformer 1K Q5 0.01 F Synchronous Rectification TM -Vout COUT +Vout PRELIMINARY DATASHEET BCM48B x 120 y 300A00 8.0 BCM48BF120T300A00 BLOCK DIAGRAM V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 10 of 18 BCM48B x 120 y 300A00 PRELIMINARY DATASHEET 9.0 SINE AMPLITUDE CONVERTER™ POINT OF LOAD CONVERSION 973 pH IOUT IOUT LLININ== 5.7 5 nH nH OUT RROUT + 9.0 mΩ + R RCIN CIN 0.57 mΩ CCININ 2 µF RRCOUT COUT 3.13 Ω V•I 1/4 • IOUT VIN V IN LOUT = 600 pH + + – – 430 µΩ 1/4 • VIN COUT COUT IIQQ 109 mA 47 µF VOUT VOUT K – – Figure 13 — V•I ChipTM module AC model The Sine Amplitude Converter (SAC™) uses a high frequency resonant tank to move energy from input to output. (The resonant tank is formed by Cr and leakage inductance Lr in the power transformer windings as shown in the BCM™ module Block Diagram. See Section 8). The resonant LC tank, operated at high frequency, is amplitude modulated as a function of input voltage and output current. A small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieving power density. The BCM48BF120T300A00 SAC can be simplified into the preceeding model. ROUT represents the impedance of the SAC, and is a function of the RDSON of the input and output MOSFETs and the winding resistance of the power transformer. IQ represents the quiescent current of the SAC control, gate drive circuitry, and core losses. The use of DC voltage transformation provides additional interesting attributes. Assuming that ROUT = 0 Ω and IQ = 0 A, Eq. (3) now becomes Eq. (1) and is essentially load independent, resistor R is now placed in series with VIN. At no load: R VOUT = VIN • K (1) VVin IN + – SAC™ SAC 1/4 KK==1/32 Vout V OUT K represents the “turns ratio” of the SAC. Rearranging Eq (1): V K = OUT VIN (2) The relationship between VIN and VOUT becomes: VOUT = (VIN – IIN • R) • K In the presence of load, VOUT is represented by: VOUT = VIN • K – IOUT • ROUT (3) and IOUT is represented by: IOUT = IIN – IQ K Figure 14 — K = 1/4 Sine Amplitude Converter™ with series input resistor (5) Substituting the simplified version of Eq. (4) (IQ is assumed = 0 A) into Eq. (5) yields: VOUT = VIN • K – IOUT • R • K2 (6) (4) V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 11 of 18 v i c o r p o w e r. c o m BCM48B x 120 y 300A00 PRELIMINARY DATASHEET This is similar in form to Eq. (3), where ROUT is used to represent the characteristic impedance of the SAC™. However, in this case a real R on the input side of the SAC is effectively scaled by K2 with respect to the output. Assuming that R = 1 Ω, the effective R as seen from the secondary side is 62.5 mΩ, with K = 1/4 . A similar exercise should be performed with the additon of a capacitor or shunt impedance at the input to the SAC. A switch in series with VIN is added to the circuit. This is depicted in Figure 15. S VVin IN + – C SAC™ SAC K = 1/4 K = 1/32 VVout OUT Figure 15 — Sine Amplitude Converter™ with input capacitor A change in VIN with the switch closed would result in a change in capacitor current according to the following equation: IC(t) = C dVIN dt PDISSIPATED = PNL + PROUT Assume that with the capacitor charged to VIN, the switch is opened and the capacitor is discharged through the idealized SAC. In this case, (8) POUT = PIN – PDISSIPATED = PIN – PNL – PROUT C K2 • dVOUT dt η = = (9) The equation in terms of the output has yielded a K2 scaling factor for C, specified in the denominator of the equation. A K factor less than unity results in an effectively larger capacitance on the output when expressed in terms of the input. With a K = 1/4 as shown in Figure 15, C=1 µF would appear as C=16 µF when viewed from the output. (11) The above relations can be combined to calculate the overall module efficiency: substituting Eq. (1) and (8) into Eq. (7) reveals: IOUT = (10) Therefore, (7) IC = IOUT • K Low impedance is a key requirement for powering a highcurrent, low-voltage load efficiently. A switching regulation stage should have minimal impedance while simultaneously providing appropriate filtering for any switched current. The use of a SAC between the regulation stage and the point of load provides a dual benefit of scaling down series impedance leading back to the source and scaling up shunt capacitance or energy storage as a function of its K factor squared. However, the benefits are not useful if the series impedance of the SAC is too high. The impedance of the SAC must be low, i.e. well beyond the crossover frequency of the system. A solution for keeping the impedance of the SAC low involves switching at a high frequency. This enables small magnetic components because magnetizing currents remain low. Small magnetics mean small path lengths for turns. Use of low loss core material at high frequencies also reduces core losses. The two main terms of power loss in the BCM™ module are: - No load power dissipation (PNL): defined as the power used to power up the module with an enabled powertrain at no load. - Resistive loss (ROUT): refers to the power loss across the BCM module modeled as pure resistive impedance. POUT = PIN – PNL – PROUT PIN PIN (12) VIN • IIN – PNL – (IOUT)2 • ROUT VIN • IIN = 1– ( ) PNL + (IOUT)2 • ROUT VIN • IIN V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 12 of 18 v i c o r p o w e r. c o m PRELIMINARY DATASHEET 10.0 INPUT AND OUTPUT FILTER DESIGN A major advantage of SAC™ systems versus conventional PWM converters is that the transformers do not require large functional filters. The resonant LC tank, operated at extreme high frequency, is amplitude modulated as a function of input voltage and output current and efficiently transfers charge through the isolation transformer. A small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieve power density. This paradigm shift requires system design to carefully evaluate external filters in order to: 1.Guarantee low source impedance: To take full advantage of the BCM™ module’s dynamic response, the impedance presented to its input terminals must be low from DC to approximately 5 MHz. The connection of the bus converter module to its power source should be implemented with minimal distribution inductance. If the interconnect inductance exceeds 100 nH, the input should be bypassed with a RC damper to retain low source impedance and stable operation. With an interconnect inductance of 200 nH, the RC damper may be as high as 1 µF in series with 0.3 Ω. A single electrolytic or equivalent low-Q capacitor may be used in place of the series RC bypass. 2.Further reduce input and/or output voltage ripple without sacrificing dynamic response: Given the wide bandwidth of the module, the source response is generally the limiting factor in the overall system response. Anomalies in the response of the source will appear at the output of the module multiplied by its K factor. This is illustrated in Figures 11 and 12. BCM48B x 120 y 300A00 storage may be more densely and efficiently provided by adding capacitance at the input of the module. At frequencies <500 kHz the module appears as an impedance of ROUT between the source and load. Within this frequency range, capacitance at the input appears as effective capacitance on the output per the relationship defined in Eq. 5. COUT = CIN K2 Eq. 6 This enables a reduction in the size and number of capacitors used in a typical system. 11.0 THERMAL CONSIDERATIONS V• I Chip™ products are multi-chip modules whose temperature distribution varies greatly for each part number as well as with the input / output conditions, thermal management and environmental conditions. Maintaining the top of the BCM48BF120T300A00 case to less than 100ºC will keep all junctions within the V• I Chip module below 125ºC for most applications. The percent of total heat dissipated through the top surface versus through the J-lead is entirely dependent on the particular mechanical and thermal environment. The heat dissipated through the top surface is typically 60%. The heat dissipated through the J-lead onto the PCB surface is typically 40%. Use 100% top surface dissipation when designing for a conservative cooling solution. It is not recommended to use a V• I Chip module for an extended period of time at full load without proper heat sinking. 3.Protect the module from overvoltage transients imposed by the system that would exceed maximum ratings and cause failures: The module input/output voltage ranges shall not be exceeded. An internal overvoltage lockout function prevents operation outside of the normal operating input range. Even during this condition, the powertrain is exposed to the applied voltage and power MOSFETs must withstand it. A criterion for protection is the maximum amount of energy that the input or output switches can tolerate if avalanched. Total load capacitance at the output of the BCM module shall not exceed the specified maximum. Owing to the wide bandwidth and low output impedance of the module, low-frequency bypass capacitance and significant energy V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 13 of 18 v i c o r p o w e r. c o m BCM48B x 120 y 300A00 PRELIMINARY DATASHEET 12.0 CURRENT SHARING The performance of the SAC™ topology is based on efficient transfer of energy through a transformer without the need of closed loop control. For this reason, the transfer characteristic can be approximated by an ideal transformer with a positive temperature coefficient series resistance. This type of characteristic is close to the impedance characteristic of a DC power distribution system both in dynamic (AC) behavior and for steady state (DC) operation. When multiple BCM™ modules of a given part number are connected in an array they will inherently share the load current according to the equivalent impedance divider that the system implements from the power source to the point of load. Some general recommendations to achieve matched array impedances include: • Dedicate common copper planes within the PCB to deliver and return the current to the modules. • Provide as symmetric a PCB layout as possible among modules • Apply same input / output filters (if present) to each unit. For further details see AN:016 Using BCM™ Bus Converters in High Power Arrays. ZIN_EQ1 Vin BCM1 ZOUT_EQ1 Vout R0_1 ZIN_EQ2 BCM2 ZOUT_EQ2 R0_2 + DC Load ZIN_EQn BCMn 13.0 FUSE SELECTION In order to provide flexibility in configuring power systems V• I Chip™ modules are not internally fused. Input line fusing of V• I Chip products is recommended at system level to provide thermal protection in case of catastrophic failure. The fuse shall be selected by closely matching system requirements with the following characteristics: • Current rating (usually greater than maximum current of BCM module) • Maximum voltage rating (usually greater than the maximum possible input voltage) • Ambient temperature • Nominal melting I2t • Recommend fuse: <= 10A Littlefuse Nano2 Fuse. 14.0 REVERSE OPERATION BCM modules are capable of reverse power operation. Once the unit is started, energy will be transferred from secondary back to the primary whenever the secondary voltage exceeds VIN • K. The module will continue operation in this fashion for as long as no faults occur. The BCM48BF120T300A00 has not been qualified for continuous operation in a reverse power condition. Furthermore fault protections which help protect the module in forward operation will not fully protect the module in reverse operation. Transient operation in reverse is expected in cases where there is significant energy storage on the output and transient voltages appear on the input. Transient reverse power operation of less than 10 ms, 10% duty cycle is permitted and has been qualified to cover these cases. ZOUT_EQn R0_n Figure 16 — BCM™ module array V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 14 of 18 v i c o r p o w e r. c o m PRELIMINARY DATASHEET 15.1 J-LEAD PACKAGE MECHANICAL DRAWING BCM48B x 120 y 300A00 Click here to view original mechanical drawings on the Vicor website. mm (inch) NOTES: mm 1. DIMENSIONS ARE inch . 2. UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE: .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005] 3. PRODUCT MARKING ON TOP SURFACE DXF and PDF files are available on vicorpower.com 15.2 J-LEAD PACKAGE RECOMMENDED LAND PATTERN NOTES: mm 1. DIMENSIONS ARE inch . 2. UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE: .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005] 3. PRODUCT MARKING ON TOP SURFACE DXF and PDF files are available on vicorpower.com V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 15 of 18 v i c o r p o w e r. c o m BCM48B x 120 y 300A00 PRELIMINARY DATASHEET 15.3 THROUGH-HOLE PACKAGE MECHANICAL DRAWING Click here to view original mechanical drawings on the Vicor website. mm (inch) TOP VIEW ( COMPONENT SIDE ) NOTES: BOTTOM VIEW (mm) 1. DIMENSIONS ARE inch . 2. UNLESS OTHERWISE SPECIFIED TOLERANCES ARE: X.X [X.XX] = ±0.25 [0.01]; X.XX [X.XXX] = ±0.13 [0.005] 3. RoHS COMPLIANT PER CST-0001 LATEST REVISION DXF and PDF files are available on vicorpower.com 15.4 THROUGH-HOLE PACKAGE RECOMMENDED LAND PATTERN NOTES: (mm) 1. DIMENSIONS ARE inch . 2. UNLESS OTHERWISE SPECIFIED TOLERANCES ARE: X.X [X.XX] = ±0.25 [0.01]; X.XX [X.XXX] = ±0.13 [0.005] RECOMMENDED HOLE PATTERN ( COMPONENT SIDE SHOWN ) 3. RoHS COMPLIANT PER CST-0001 LATEST REVISION DXF and PDF files are available on vicorpower.com V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 16 of 18 v i c o r p o w e r. c o m BCM48B x 120 y 300A00 PRELIMINARY DATASHEET 15.5 RECOMMENDED HEAT SINK PUSH PIN LOCATION Click here to view original mechanical drawings on the Vicor website. (NO GROUNDING CLIPS) (WITH GROUNDING CLIPS) Notes: 1. Maintain 3.50 (0.138) Dia. keep-out zone free of copper, all PCB layers. 2. (A) Minimum recommended pitch is 39.50 (1.555). This provides 7.00 (0.275) component edge-to-edge spacing, and 0.50 (0.020) clearance between Vicor heat sinks. (B) Minimum recommended pitch is 41.00 (1.614). This provides 8.50 (0.334) component edge-to-edge spacing, and 2.00 (0.079) clearance between Vicor heat sinks. 3. V•I ChipTM module land pattern shown for reference only; actual land pattern may differ. Dimensions from edges of land pattern to push–pin holes will be the same for all full-size V•I Chip products. 5. Unless otherwise specified: Dimensions are mm (inches) tolerances are: x.x (x.xx) = ±0.3 (0.01) x.xx (x.xxx) = ±0.13 (0.005) 4. RoHS compliant per CST–0001 latest revision. 6. Plated through holes for grounding clips (33855) shown for reference, heat sink orientation and device pitch will dictate final grounding solution. 15.6 BCMTM MODULE PIN CONFIGURATION 4 3 2 +Out B B C C D D +In E E -Out 1 A A F G H TM H J RSV J K PC K +Out -Out L L M M N N P P R R T T Signal Name +In –In TM RSV PC +Out -In –Out Designation A1-E1, A2-E2 L1-T1, L2-T2 H1, H2 J1, J2 K1, K2 A3-D3, A4-D4, J3-M3, J4-M4 E3-H3, E4-H4, N3-T3, N4-T4 Bottom View V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 17 of 18 v i c o r p o w e r. c o m BCM48B x 120 y 300A00 PRELIMINARY DATASHEET Warranty Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. This warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. Vicor shall not be liable for collateral or consequential damage. This warranty is extended to the original purchaser only. EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Vicor will repair or replace defective products in accordance with its own best judgement. For service under this warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms of this warranty. Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve reliability, function, or design. Vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten life or injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes all risks of such use and indemnifies Vicor against all damages. Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. All sales are subject to Vicor’s Terms and Conditions of Sale, which are available upon request. Specifications are subject to change without notice. Intellectual Property Notice Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the products described in this data sheet. Interested parties should contact Vicor's Intellectual Property Department. The products described on this data sheet are protected by the following U.S. Patents Numbers: 5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,145,186; 7,166,898; 7,187,263; 7,202,646; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for use under 6,975,098 and 6,984,965. Vicor Corporation 25 Frontage Road Andover, MA, USA 01810 Tel: 800-735-6200 Fax: 978-475-6715 email Customer Service: [email protected] Technical Support: [email protected] V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 Rev. 1.2 7/2011 Page 18 of 18 v i c o r p o w e r. c o m