CALMIRCO CM1223 Industry first low capacitance esd protection arrays w/backdrive protection Datasheet

CM1223
Industry First Low Capacitance ESD Protection Arrays w/Backdrive Protection
Features
Product Description
•
The CM1223 family of diode arrays has been designed
to provide ESD protection for electronic components or
sub-systems requiring minimal capacitive loading.
These devices are ideal for protecting systems with
high data and clock rates or for circuits requiring low
capacitive loading. Each ESD channel consists of a
pair of diodes in series which steer the positive or negative ESD current pulse to either the positive (VP) or
negative (VN) supply rail. A Zener diode is embedded
between VP and VN, absorbing positive ESD strikes
and also providing ESD protection for the VP rail. An
additional diode is added in this device to serve as
backdrive current protection. The CM1223 will protect
against ESD pulses up to ±8kV per the IEC 61000-4-2
standard and using the MIL-STD-883D (Method 3015)
specification for Human Body Model (HBM) ESD, all
pins are protected from contact discharges of greater
than ±15kV.
•
•
•
•
•
•
•
•
•
•
2, 4, and 8 channels of ESD protection with integrated backdrive protection on all lines
Provides ESD protection to IEC61000-4-2 Level 4
- 8kV contact discharge
- 15kV air discharge
Low channel input capacitance of 1.0pF typical
Minimal capacitance change with temperature and
voltage
Channel I/O to Gnd capacitance difference of
0.02pF typical is ideal for differential signalsl
Mutual capacitance between signal pin and adjacent signal pin - 0.11pF typical
Zener diode protects supply rail and eliminates the
need for external by-pass capacitors
Pin compatible with CM1213-02, -04, and -08
Each I/O pin can withstand over 1000 ESD strikes
Available in SOT, and MSOP packages
Lead-free version available
Applications
•
•
•
•
•
•
•
These devices are particularly well-suited for protecting
systems using high-speed ports such as USB2.0,
IEEE1394 (Firewire®, iLink™), Serial ATA, DVI, HDMI
and corresponding ports in removable storage, digital
camcorders, DVD-RW drives and other applications
where extremely low loading capacitance with ESD
protection are required in a small package footprint.
USB2.0 ports at 480Mbps in desktop PCs, notebooks and peripherals
IEEE1394 Firewire® ports at 400Mbps / 800Mbps
DVI ports, HDMI ports in notebooks, set top boxes,
digital TVs, LCD displays
UDI and Displayport
Serial ATA ports in desktop PCs and hard disk
drives
PCI Express ports
General purpose high-speed data line ESD
protection
The CM1223 family of devices is available with
optional lead-free finishing.
Electrical Schematics
VP
CH1
CH4
VP
CH3
CH8
CH1
VN
CH2
CH1
CH7
CH6
VP
CH5
CH2
VN
CM1223-02ST/SO
CM1223-04ST/SO
CM1223-02SS/SR
CM1223-04MS/MR
CH2
VN
CH3
CH4
CM1223-08MS/MR
© 2006 California Micro Devices Corp. All rights reserved.
08/02/06
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
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Fax: 408.263.7846
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1
CM1223
PACKAGE / PINOUT DIAGRAMS
VN
VP
4
1
CH1
CH2
2
CH2
4-Lead SOT143-4
3
CH4
6
VP
5
CH3
4
6-Lead SOT23-6
1
CH1
3
VP
10
CH8
2
9
CH7
CH3
3
8
VN
CH4
4
VP
5
4
CH2
CH6
6
CH5
NC
1
10
NC
2
9
CH4
VP
3
8
VN
CH2
4
7
NC
NC
5
6
CH3
5-Lead SOT23-5
7
10-Lead MSOP-10
CH1
D328 /
D338
2
5
D324/
D334
VN
1
CH2
Top View
Top View
NC
CH1
D326/
D336
VN
3
2
1
D325/
D335
D327/
D337
CH1
Top View
Top View
Top View
10-Lead MSOP-10
Note: These drawings are not to scale.
Pin Descriptions
PIN DESCRIPTIONS
2-CHANNEL, 4-LEAD SOT143-4 PACKAGE
PIN
NAME
TYPE
1
VN
GND
2
CH1
I/O
3
CH2
I/O
4
VP
PWR
4-CHANNEL, 10-LEAD MSOP-10 PACKAGE
PIN
PIN
NAME
TYPE
Negative voltage supply rail
1
CH1
I/O
ESD Channel
2
NC
NAME
TYPE
ESD Channel
No connect
ESD Channel
3
VP
PWR
Positive voltage supply rail
4
CH2
I/O
5
NC
DESCRIPTION
6
CH3
No connect
7
NC
Negative voltage supply rail
8
VN
GND
I/O
2-CHANNEL, 5-LEAD SOT23-5 PACKAGE
PIN
DESCRIPTION
Positive voltage supply rail
ESD Channel
No connect
I/O
ESD Channel
No connect
1
NC
2
VN
GND
3
CH1
I/O
ESD Channel
9
CH4
4
CH2
I/O
ESD Channel
10
NC
5
VP
PWR
PIN
NAME
TYPE
1
CH1
I/O
ESD Channel
2
CH2
I/O
ESD Channel
3
CH3
I/O
ESD Channel
4
CH4
I/O
5
VP
PWR
6
CH5
I/O
7
CH6
I/O
8
VN
GND
NAME
TYPE
1
CH1
I/O
2
VN
GND
3
CH2
I/O
4
CH3
I/O
5
VP
PWR
CH4
I/O
6
ESD Channel
No connect
8-CHANNEL, 10-LEAD MSOP-10 PACKAGE
Positive voltage supply rail
4-CHANNEL, 6-LEAD SOT23-6 PACKAGE
PIN
Negative voltage supply rail
DESCRIPTION
ESD Channel
Negative voltage supply rail
ESD Channel
ESD Channel
Positive voltage supply rail
ESD Channel
DESCRIPTION
ESD Channel
Positive voltage supply rail
ESD Channel
ESD Channel
Negative voltage supply rail
9
CH7
I/O
ESD Channel
10
CH8
I/O
ESD Channel
© 2006 California Micro Devices Corp. All rights reserved.
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08/02/06
CM1223
Backdrive protection
Backdrive protection is needed to block against backdrive current flowing from a high potential voltage node
toward a lower potential voltage node through the interface cable.
For example, consider a DVD player connected to a
TV via an HDMI interface. If the DVD player is switched
off and the TV is left on, there is a possibility of reverse
current flow back into the main power supply rail of the
DVD player. Typically, the DVD's power supply has
some form of bulk supply capacitance associated with
it. Because all CMOS logic exhibits a very high impedance on the power rail node when "off", if there is very
little parasitic shunt resistance and as little as a few
VDD_SOURCE
Discrete Backdrive
Protection Diode
HOST
ASIC
To avoid this situation, the CM1223 with integrated
backdrive protection diode was designed to block
backdrive current, guaranteeing no more than 5μA on
any I/O pin when the I/O pin voltage is greater than the
CM1223 supply voltage.
Integrated Backdrive
Protection Diode
VDD_SOURCE
VDD_SINK
One Channel
CM1213
“Off
CBULK
milliamps of "backdrive" current flowing back into the
power rail, it is possible over time to charge that bulk
supply capacitance to some intermediate level. If this
level rises above the power-on-reset (POR) voltage
level of some of the integrated circuits, the DVD player
may not reset properly when the DVD player is turned
back on.
“Off
CBULK
+
D1
I/O
IBACKDRIVE = 0
D2
Peripheral
ASIC
VDD_SINK
One Channel
CM1223
+
D1
HOST
ASIC
I/O
D2
IBACKDRIVE = 0
Peripheral
ASIC
Figure 1. Backdrive Protection Diagram.
© 2006 California Micro Devices Corp. All rights reserved.
08/02/06
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CM1223
Ordering Information
PART NUMBERING INFORMATION
Standard Finish
Lead-free Finish
# of Channels
Leads
Package
Ordering Part
Number1
Part Marking
Ordering Part
Number1
2
5
SOT23-5
CM1223-02ST
D324
CM1223-02SO
D334
2
4
SOT143-4
CM1223-02SS
D327
CM1223-02SR
D337
4
6
SOT23-6
CM1223-04ST
D325
CM1223-04SO
D335
4
10
MSOP-10
CM1223-04MS
D328
CM1223-04MR
D338
8
10
MSOP-10
CM1223-08MS
D326
CM1223-08MR
D336
Part Marking
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATING
UNITS
6.0
V
-40 to +85
°C
-65 to +150
°C
(VN - 0.5) to (VP + 0.5)
V
Operating Supply Voltage (VP - VN)
Operating Temperature Range
Storage Temperature Range
DC Voltage at any channel input
STANDARD OPERATING CONDITIONS
PARAMETER
Operating Temperature Range
Package Power Rating
SOT143-4 Package (CM1223-02SS/SR)
SOT23-5 Package (CM1223-02ST/SO)
SOT23-6 Package (CM1223-04ST/SO)
MSOP-10 Package (CM1223-04MS/MR)
MSOP-10 Package (CM1223-08MS/MR)
RATING
UNITS
-40 to +85
°C
225
225
225
400
400
mW
mW
mW
mW
mW
© 2006 California Micro Devices Corp. All rights reserved.
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CM1223
ELECTRICAL OPERATING CHARACTERISTICS(SEE NOTE 1)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
3.3
5.5
V
8.0
μA
VP
Operating Supply Voltage (VP-VN)
IP
Operating Supply Current
(VP-VN)=3.3V
VSCL
Signal Clamp Voltage
Positive Transients
Negative Transients
IF = 8mA; TA=25°C
ILEAK
Channel Leakage Current
TA=25°C; VP=5V, VN=0V
±0.1
±1.0
μA
CIN
Channel Input Capacitance
At 1 MHz, VP=3.3V, VN=0V, VIN=1.65V;
Note 2 applies
1.0
1.5
pF
ΔCIN
Channel Input Capacitance
Matching
At 1 MHz, VP=3.3V, VN=0V, VIN=1.65V;
Note 2 applies
0.02
pF
CMUTUAL
Mutual Capacitance between signal pin and adjacent signal pin
At 1 MHz, VP=3.3V, VN=0V, VIN=1.65V;
Note 2 applies
0.11
pF
VESD
ESD Protection
Peak Discharge Voltage at any
channel input, in system
a) Contact discharge per
IEC 61000-4-2 standard
b) Human Body Model,
MIL-STD-883, Method
3015
6.7
0.60
V
V
Notes 2, 4 & 5; TA=25°C
±8
kV
Notes 2, 3 & 5; TA=25°C
±15
kV
VCL
Channel Clamp Voltage
Positive Transients
Negative Transients
TA=25°C, IPP = 1A, tP = 8/20uS;
Notes 2 & 5
RDYN
Dynamic Resistance
Positive Transients
Negative Transients
TA=25°C, IPP = 1A, tP = 8/20uS
Any I/O pin to Ground; Notes 2 & 5
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
8.2
0.80
+8.8
-1.4
V
V
0.7
0.4
Ω
Ω
All parameters specified at TA = -40°C to +85°C unless otherwise noted.
These parameters guaranteed by design and characterization.
Human Body Model per MIL-STD-883, Method 3015, CDischarge = 100pF, RDischarge = 1.5KΩ, VP = 3.3V, VN grounded.
Standard IEC 61000-4-2 with CDischarge = 150pF, RDischarge = 330Ω, VP = 3.3V, VN grounded.
These measurements performed with no external capacitor on VP (VP floating).
© 2006 California Micro Devices Corp. All rights reserved.
08/02/06
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CM1223
Performance Information
Input Channel Capacitance Performance Curves
Input Capacitance (pF)
2
1.5
1
0.5
0
0
0.5
1
1.5
2
2.5
3
Input Voltage (V)
Typical Variation of CIN vs. VIN
Input Capacitance (pF)
(f=1MHz, VP = 3.3V, VN = 0V, 0.1 μF chip capacitor between VP and VN, 25°C)
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
0.75
0V DC Input Bias
1.65V DC Input Bias
-50
-25
0
25
50
75
100
Temperature (°C)
Typical Variation of CIN vs. Temp
(f=1MHz, VIN=30mV, VP = 3.3V, VN = 0V,
0.1 μF chip capacitor between VP and VN)
© 2006 California Micro Devices Corp. All rights reserved.
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CM1223
Performance Information (Cont’d)
Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment)
TEST CIRCUIT
P1
P2
VP (3.3v)
I/On
GND
Figure 2. Insertion Loss (S21) VS. Frequency (0V DC Bias, VP=3.3V, MSOP-8 Package)
TEST CIRCUIT
P1
P2
VP (3.3v)
I/On
GND
Figure 3. Insertion Loss (S21) VS. Frequency (2.5V DC Bias, VP=3.3V, MSOP-8 Package)
© 2006 California Micro Devices Corp. All rights reserved.
08/02/06
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CM1223
Performance Information (Cont’d)
Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment)
TEST CIRCUIT
P1
P2
VP (3.3v)
I/On
GND
Figure 4. Insertion Loss (S21) VS. Frequency (0V DC Bias, VP=3.3V, MSOP-10 Package)
TEST CIRCUIT
P1
P2
VP (3.3v)
I/On
GND
Figure 5. Insertion Loss (S21) VS. Frequency (2.5V DC Bias, VP=3.3V)
© 2006 California Micro Devices Corp. All rights reserved.
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CM1223
Application Information
Design Considerations
In order to realize the maximum protection against
ESD pulses, care must be taken in the PCB layout to
minimize parasitic series inductances on the Supply/
Ground rails as well as the signal trace segment
between the signal input (typically a connector) and the
ESD protection device. Refer to Figure 6, which illustrates an example of a positive 8kV ESD pulse striking
an input channel. The 8kV ESD current pulse will divert
along the path as indicated in Figure 4, through the D1
diode and the Zener diode back to the ground rail.
The CM1223 has an integrated backdrive diode
between VP and VN to prevent backdrive current flow
from the powered sources.
As a general rule, the ESD Protection Array should be
located as close as possible to the point of entry of
expected electrostatic discharges.
Additional Information
See also California Micro Devices Application Note
AP209, “Design Considerations for ESD Protection”, in
the Applications section at www.cmd.com.
An ESD current pulse can rise from zero to its peak
value in a very short time. As an example, a level 4
contact discharge per the IEC61000-4-2 standard
results in a current pulse that rises from zero to 30
Amps in 1ns. The CM1223 has a fast response time of
less than 1ns and low clamp voltage to handle this
pulse.
Similarly for negative ESD pulses, parasitic series
inductance from the VN pin to the ground rail will lead
to drastically increased negative voltage on the line
being protected.
VCC
POSITIVE SUPPLY
VP
One Channel of
CM1223
LINE BEING PROTECTED
30A
PATH OF POSITIVE ESD CURRENT PULSE IESD
D1
0A
SYSTEM OR
CIRCUITRY
BEING
8kV ESD Pulse
I/O pin
D2
PATH OF NEGATIVE
ESD
VN
GROUND RAIL
CHASSIS GROUND
Figure 6. Application of Positive ESD Pulse between Input Channel and Ground
© 2006 California Micro Devices Corp. All rights reserved.
08/02/06
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CM1223
Mechanical Details
The CM1223 is available in SOT143-4, SOT23-5,
SOT23-6, and MSOP-10 packages with a lad-free finishing option. The various package drawings are presented below.
Mechanical Package Diagrams
TOP VIEW
SOT143 Mechanical Specifications
e
Dimensions for CM1223-02SS/SR devices supplied in
4-pin SOT143 packages are presented below.
4
3
For complete information on the SOT143, see the California Micro Devices SOT143 Package Information
document.
E1 E
1
2
e1
PACKAGE DIMENSIONS
Package
SOT143
Pins
4
Dimensions
SIDE VIEW
D
Millimeters
Inches
Min
Max
Min
Max
A
0.80
1.22
0.031
0.048
A1
0.05
0.15
0.002
0.006
b
0.30
0.50
0.012
0.019
b2
0.76
0.89
0.030
0.035
c
0.08
0.20
0.003
0.008
D
2.80
3.04
0.110
0.119
E
2.10
2.64
0.082
0.103
E1
1.20
1.40
0.047
0.055
e
1.92 BSC
0.075 BSC
e1
0.20 BSC
0.008 BSC
L
0.4
L1
# per tape
and reel
0.6
0.54 REF
0.016
A
b2
b
A1
END VIEW
c
L1
L
0.024
0.021 REF
Package Dimensions for SOT143.
3000 pieces
Controlling dimension: millimeters
© 2006 California Micro Devices Corp. All rights reserved.
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CM1223
Mechanical Details (cont’d)
SOT23-5 Mechanical Specifications
Mechanical Package Diagrams
Dimensions for CM1223-02ST/SO devices packaged
in 5-pin SOT23 packages are presented below.
For complete information on the SOT23-5 package,
see the California Micro Devices SOT23 Package
Information document.
TOP VIEW
e1
e
5
4
E1 E
PACKAGE DIMENSIONS
Package
SOT23-5 (JEDEC name is MO-178)
Pins
5
Dimensions
1
Inches
Max
Min
Max
A
--
1.45
--
0.0571
A1
0.00
0.15
0.0000
0.0059
b
0.30
0.50
0.0118
0.0197
c
0.08
0.22
0.0031
0.0087
D
2.75
3.05
0.1083
0.1201
E
2.60
3.00
0.1024
0.1181
E1
1.45
1.75
0.0571
0.0689
e
0.95 BSC
0.0374 BSC
e1
1.90 BSC
0.0748 BSC
0.30
L1
0.60
0.60 REF
# per tape
and reel
3
b
Millimeters
Min
L
2
0.0118
SIDE VIEW
D
A
A1
END VIEW
0.0236
c
0.0236 REF
L1
L
3000 pieces
Controlling dimension: millimeters
© 2006 California Micro Devices Corp. All rights reserved.
08/02/06
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Tel: 408.263.3214
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CM1223
Mechanical Details (cont’d)
SOT23-6 Mechanical Specifications
CM1223-04ST/SO devices are packaged in 6-pin
SOT23 packages. Dimensions are presented below.
Mechanical Package Diagrams
For complete information on the SOT23-6 package,
see the California Micro Devices SOT23 Package
Information document.
TOP VIEW
e1
6
PACKAGE DIMENSIONS
SOT23-6 (JEDEC name is MO-178)
Pins
6
Min
Max
Min
Max
--
1.45
--
0.0571
A1
0.00
0.15
0.0000
0.0059
b
0.30
0.50
0.0118
0.0197
c
0.08
0.22
0.0031
0.0087
D
2.75
3.05
0.1083
0.1201
E
2.60
3.00
0.1024
0.1181
E1
1.45
1.75
0.0571
0.0689
e
0.95 BSC
0.0374 BSC
e1
1.90 BSC
0.0748 BSC
0.30
L1
# per tape
and reel
0.60
0.60 REF
0.0118
2
3
b
Inches
A
L
4
E1 E
1
Millimeters
5
Pin 1
Marking
Package
Dimensions
e
SIDE VIEW
D
A
A1
END VIEW
0.0236
0.0236 REF
3000 pieces
c
L1
L
Controlling dimension: millimeters
Package Dimensions for SOT23-6.
© 2006 California Micro Devices Corp. All rights reserved.
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08/02/06
CM1223
Mechanical Details (cont’d)
MSOP-10 Mechanical Specifications
CM1223-04MS/MR and CM1223-08MS/MR devices
are packaged in 10-pin MSOP packages. Dimensions
are presented below.
Mechanical Package Diagrams
TOP VIEW
For complete information on the MSOP-10 package,
see the California Micro Devices MSOP Package Information document.
D
10
9
8
6
7
PACKAGE DIMENSIONS
Package
MSOP
Pins
10
Dimensions
Millimeters
Max
Min
Max
A
0.75
0.95
0.028
0.038
A1
0.05
0.15
0.002
0.006
B
0.17
0.27
0.007
0.011
0.18
2.90
3.10
0.114
0.122
E
2.90
3.10
0.114
0.122
0.50 BSC
0.0196 BSC
H
4.80
5.00
0.187
0.197
L
0.40
0.70
0.0137
0.029
# per tape
and reel
1
2
3
5
4
SIDE VIEW
0.007
D
e
Pin 1
Marking
Inches
Min
C
E
H
A
A1
SEATING
PLANE
B
e
END VIEW
4000
C
Controlling dimension: millimeters
L
Package Dimensions for MSOP-10
© 2006 California Micro Devices Corp. All rights reserved.
08/02/06
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