Sanyo LA74303FN Monolithic linear ic audio interface for dsc Datasheet

Ordering number : ENA1181
LA74303FN
Monolithic Linear IC
Audio Interface for DSC
Overview
The LA74303FN is a SPEAKER AMP and MIC AMP built-in audio interface for DSC.
Functions
• Three-wire type SERIAL communication, MIC AMP
• MIC power supply incorporated (with buit-in pull-up resistor), ALC AMP
• PB input method: Compatible with analog or digital (ΔΣ) signal input
• 3rd order LPF(compatible with REC/PB changeover, fc=4kHz or 11kHz selectable)
• SPEAKER AMP (compatible with BEEP input MIX)
• Electronic VOLUME (compatible with SERIAL communication control)
• LINE output (with SERIAL MUTE), compatible with STANDBY control
Specifications
Maximum Ratings at Ta=25°C
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage 1
VCCA max
5.0
V
Maximum supply voltage 2
VCCSP max
5.0
V
Allowable power dissipation
Pd max
500
mW
Operating temperature
Topr
-15 to +85
°C
Storage temperature
Tstg
-55 to +150
°C
Ta≤85°C *
* Substrate mounting condition (30mm × 50mm × 0.8mm: glass epoxy) 2S2P
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
52808 TI IM 20060710-S00001 No.A1181-1/18
LA74303FN
Operating Conditions at Ta = 25°C
Parameter
Symbol
Recommended supply voltage
Allowable operating voltage range
Conditions
Ratings
Unit
VCCA
3.0
V
VCCSP
3.3
V
2.7 to 3.6
V
2.7 to 3.6
V
VCCA
VCCSP
Take care not to exceed Pd max.
Electrical Characteristics at Ta=25°C, VCCA=3.0V, VCCSP=3.3V, f=1kHz, with the VREF capacitance charging
circuit in the OFF MODE
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Circuit current
VCCA current dissipation at no signal 1
ICCA1
VCCA=3.0V
7
9.4
11.8
mA
VCCA current dissipation at no signal 2
ICCA2
VCCA=3.0V: REC BLOCK (MIC/ALC/REC AMP)
POWER SAVE MODE
5
6.7
8.4
mA
VCCA current dissipation at no signal 3
ICCA3
VCCA=3.0V: LINE AMP POWER SAVE MODE
6.5
8.7
10.9
mA
VCCA standby current dissipation
ICCAS
VCCA=3.0V: during standby control
(4PIN=0V application)
1
μA
Current dissipation at no signal 5
ICCSP1
VCCSP=3.3V: SPK POWER ON MODE
2.5
5
mA
Current dissipation at no signal 6
ICCSP2
VCCSP=3.3V: SPK POWER SAVE MODE
0.05
0.1
mA
VCCSP standby current dissipation
ICCSPS
VCCSP=3.3V: during standby control
(4PIN=0V application)
5.5
10
μA
REC reference output LEVEL
VOR
ALC IN, VIN=-49dBV
-15.5
-14.5
REC reference output distortion
HDR
ALC IN, VIN=-49dBV, THD: from 2nd to 5th harmonic
0.05
0.1
%
ALC characteristics 1
ALM1
ALC IN, VIN=-33dBV (standard+16dB)
-8
-5
dBV
ALC distortion 1
ALMD1
ALC IN, VIN=-33dBV (standard+16dB),
THD: from 2nd to 5th harmonic
0.15
0.5
%
ALC characteristics 2
ALM2
ALC IN, VIN=-17dBV (standard+32dB)
-8
-5
dBV
ALC distortion 2
ALMD2
ALC IN, VIN=-17dBV (standard+32dB),
THD: from 2nd to 5th harmonic
0.2
1
%
ALC IN max input level
VINRMX
1.2
REC output system
-16.5
-11
-11
ALC IN LEVEL at which REC output THD
-10
dBV
-77
-68
dBV
-3.5
-2
dB
-33
-25
dB
-60
-55
dB
dBV
(from 2nd to 5th harmonic) becomes 3% or less.
REC output noise voltage
VNOR
ALC IN, no input, JIS-A Filter
REC output frequency characteristics 1
FEQR1
ALC IN, VIN=-33dBV,
comparison of f=4kHz/1kHz
REC output frequency characteristics 2
FEQR2
-5
ALC IN, VIN=-33dBV,
comparison of f=22kHz/1kHz
REC output frequency characteristics 3
FEQR3
ALC IN, VIN=-33dBV,
comparison of f=100kHz/1kHz
dBV
LINE output system
LINE reference output LEVEL
VOL
PB IN, VIN=-15dBV
-11
-10
LINE reference output distortion rate
HDL
PB IN, VIN=-15dBV, THD: from 2nd to 5th harmonic
0.1
0.2
%
LINE reference output noise voltage
VNOL
PB IN, no input, JIS-A Filter
-85
-77
dBV
PB IN max input LEVEL
VINPMX
-5
dBV
-3.5
-2
dB
-33
-25
dB
-65
-60
dB
-12
PB IN LEVEL at which LINE output THD
(from 2nd to 5th harmonic) becomes 3% or less.
LINE output frequency characteristics 1
FEQP1
PB IN, VIN=-8dBV, comparison of f=4kHz/1kHz
LINE output frequency characteristics 2
FEQP2
PB IN, VIN=-8dBV, comparison of f=22kHz/1kHz
LINE output frequency characteristics 3
FEQP3
PB IN, VIN=-8dBV,
comparison of f=100kHz/1kHz
-5
Continued on next page.
No.A1181-2/18
LA74303FN
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
SP output system (SP load = as measured at both ends of 8Ω)
SP reference output LEVEL1 (Vol.MAX)
VOSP1
PB IN, VIN=-15dBV, Vol=MAX (Serial DATA=31)
SP reference output distortion
THDSP
PB IN, VIN=-15dBV, Vol=MAX,
-5
THD: from 2nd to 5th harmonic
SP reference output LEVEL2 (Vol.TYP)
VOSP2
PB IN, VIN=-15dBV, Vol=TYP (Serial DATA=17)
SP reference output LEVEL3 (Vol.MIN)
VOSP3
PB IN, VIN=-15dBV, Vol=MIN (Serial DATA=0),
JIS-A Filter
SP reference output noise voltage
VNOSP
PB IN, no input, Vol=MAX, JIS-A Filter
SP maximum ratings output
VOMSP
PB IN, Vol=MAX, LEVEL at which THD=10%
MIC voltage gain
VGMIC
MIC IN, VIN=-39dBV
MIC output distortion
HDMIC
MIC IN, VIN=-39dBV, THD: from 2nd to 5th harmonic
MIC output noise voltage
VNOMIC
MIC IN, no input, JIS-A Filter
MIC IN max input level
VINMMX
-19
200
-2
1
dBV
0.4
1
%
-13
-7
dBV
-80
-70
dBV
-76
-70
dBV
340
mW
MIC output system
19
20
21
0.02
0.1
%
-94
-83
dBV
-22
dBV
1.7
1.9
V
1.25
1.5
MHz
MIC IN LEVEL at which the MIC output THD
(from 2nd to 5th harmonic) becomes 3% or less.
MIC VCC output voltage
VMIC
At 6.2kΩ load
1.5
dB
Control system
Serial CLOCK frequency
FCLK
Serial input LOW level
SERLO
Serial input HIGH level
SERHI
0
0.7
V
2.3
3.5
V
Package Dimensions
unit : mm (typ)
3364
TOP VIEW
SIDE VIEW
BOTTOM VIEW
4.0
(0.05)
Exposed Die-Pad
Do Not Connect
24
0.45
4.0
(0.9)
(0.9)
21
0.16
0.0 NOM
(0.8)
SIDE VIEW
0.85 MAX
1 2
0.4
(1.0)
SANYO : VQFN24(4.0X4.0)
No.A1181-3/18
LA74303FN
Description of the Content of Serial Communication
DATA No.
Parameter
Default
0
DUMMY
1
LPF Cut-off frequency SW
0:11kHz, 1:4kHz
1
0
2
VREF capacitor charging circuit control SW
0:ON, 1:OFF
0
3
MIC AMP POWER SW
0:ON, 1:OFF
0
4
ALC AMP POWER SW
0:ON, 1:OFF
0
5
LPF1 MODE SW
0:PB MODE1, 1:REC MODE
0
6
LPF1/LPF2 selection SW
0:LPF1, 1:LPF2
0
7
REC BLOCK POWER SW
0:ON, 1:OFF
0
8
LINE OUT POWER SW
0:ON, 1:OFF
1
9
LINE MUTE SW
0:ON, 1:OFF
0
10
SPK POWER SW
0:ON, 1:OFF
1
11
DATA=1
1 1 1 1 1: VOL MAX
0
to
0
12
DATA=2
13
DATA=4
14
DATA=8
15
DATA=16
0 0 0 0 0: VOL MIN (MUTE)
0
* EVR setting (the numeral shown in the left is decimal.
For characteristics, see P18.)
0
0
Serial Transmission Timing
VIH
VIL
CS
tCS
tWH tWL
fMAX
tCH
tWC
VIH
CLOCK
VIL
tDS
tDH
VIH
DATA
VIL
LSB
• fMAX
• tWL
• tWH
• tCS
• tCH
• tDS
• tDH
• tWC
• VIH
• VIL
MSB
(Max clock frequency)
(Clock pulse width: Low)
(Clock pulse width: High)
(Chip enable setup time)
(Chip enable hold time)
(Data setup time)
(Data hold time)
(Chip enable pulse width)
(High voltage lower limit)
(Low voltage upper limit)
1.5MHz
333ns or more
333ns or more
333ns or more
333ns or more
333ns or more
333ns or more
333ns or more
2.3V to 3.5V
0V to 0.7V
No.A1181-4/18
LA74303FN
POWER ON Condition (SERIAL communication)
H
VCCA (9PIN)
&
STANDBY (4PIN)
L
Approx.
2ms
H
Power-on pulse
(IC inside)
c
d
L
Dummy DATA
It is recommended to send DATA
the same as in the initial state.
1ms
2 to 3ms
C.S.
Main DATA
e
1ms
Delay of several hundreds NS
First Data
communication
Approx. 500ns
f
Power on reset
(IC inside)
Power on reset condition
SERIAL communication condition
First DATA hold
CLOCK and DATA not necessary
CS, CLOCK, and DATA necessary
The POWER ON RESET state covers a period up to the rise e of the second C.S. input after fall d of POWER ON
PULSE c generated inside IC when the power is applied and the STANDBY control is canceled. e is the dummy
communication. (It is recommended to send DATA the same as in the initial state.)
Actually, because of delay of several hundreds ns in the IC, the first DATA condition begins in f and the normal
SERIAL communication condition begins after f.
No.A1181-5/18
Pin
ICCA2
ICCA3
ICCAS
ICCS1
ICCS2
ICCSPS
2
3
4
5
6
7
9
9
9
22
22
22
VCCA=3.0V
No input
VCCA=3.0V
No input
VCCA=3.0V
No input
VCCSP=3.3V
No input
VCCSP=3.3V
No input
VCCSP=3.3V
No input
9
9
22
22
22
9
9
9
Pin
VCCA=3.0V
No input
Conditions
12
12
12
12
f=1kHz
No input
VIN=-33dBV
f=4kHz
VIN=-33dBV
f=22kHz
VIN=-33dBV
f=100kHz
14
14
14
14
14
14 VINRMX
VNOR
FEQR1
15
16
FEQR2
FEQR3
17
18
400 to 20kHz LPF used
THD: from 2nd to 5th harmonic
400 to 20kHz LPF used
400 to 20kHz LPF used
THD: from 2nd to 5th harmonic
400 to 20kHz LPF used
400 to 20kHz LPF used
THD: from 2nd to 5th harmonic
400 to 20kHz LPF used
With the STANDBY pin (4PIN)=0V
VREF capacitance charging circuit in the OFF MODE
SPK AMP POWER SAVE MODE
VREF capacitance charging circuit in the OFF MODE
SPK AMP ON MODE
With the STANDBY pin (4PIN)=0V
VREF capacitance charging circuit in the OFF MODE
LINE AMP POWER SAVE MODE
VREF capacitance charging circuit in the OFF MODE
MIC/ALC/REC AMP POWER SAVE MODE
VREF capacitance charging circuit
in the OFF MODE
Major conditions
(for the serial control setting,
see the table in the right)
Output
f=100kHz/1kHz level ratio
f=22kHz/1kHz level ratio
f=4kHz/1kHz level ratio
JIS-A FILTER used
400 to 20kHz LPF used
12&14 Pin 14 level at which pin 14 becomes
THD = 3% (from 2nd to 5th harmonic)
12
VIN=-17dBV
f=1kHz
14
ALMD2
13
12
VIN=-17dBV
f=1kHz
14
ALM2
12
12
VIN=-33dBV
f=1kHz
14
ALMD1
11
12
VIN=-33dBV
f=1kHz
14
ALM1
10
12
VIN=-49dBV
f=1kHz
14
HDR1
9
12
VIN=-49dBV
f=1kHz
VOR
8
14
REC output system
ICCA1
1
Circuit current
No. Symbol
Input
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
0V
3.3V
3.3V
0V
3.3V
3.3V
3.3V
Voltage
applied to
pin 4
STANDBY
pin
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
*
*
0
0:11kHz
1:4kHz
DMY
1
LPF
C SW
0
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0:ON
1:OFF
CHRG
P SW
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0:ON
1:OFF
MIC
P SW
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0:ON
1:OFF
ALC
P SW
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0:ON
1:OFF
(0,1):PB Digital
(1,*):REC
(0,0):PB Analog
7
REC
P SW
6
LPF MODESW
5
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
0
0
0:ON
1:OFF
LINE
P SW
8
Serial control setting
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:ON
1:OFF
LINE
Mute
10
1
1
1
1
1
1
1
1
1
1
1
0
1
0
0
0
0
0
0:ON
1:OFF
SPK
P SW
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR1
DATA
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR2
DATA
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR4
DATA
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR8
DATA
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR16
DATA
LA74303FN
Method of Measuring Electric Characteristics at Ta=25°C, VCCA=3.0V, VCCSP=3.3V,
f=1kHz VREF capacitor charging circuit OFF MODE
No.A1181-6/18
Pin
Conditions
10
10
10
VNOL
22 VINPMX
FEQP1
FEQP2
FEQP3
21
23
24
25
VIN=-8dBV
f=4kHz
VIN=-8dBV
f=22kHz
VIN=-8dBV
f=100kHz
f=1kHz
No input
VIN=-15dBV
f=1kHz
VIN=-15dBV
f=1kHz
5
5
5
5
5
5
5
Pin
3.3V
f=100kHz/1kHz level ratio
10
10
10
VOSP2
VOSP3
28
29
30 VNOSP
31 VOSSP
17
36
VMIC
17
17
34 VNOMIC
35 VINMMX
17
HDMIC
33
17
VGMIC
32
MIC output system
10
10
THDSP
27
10
VOSP1
26
JIS-A FILTER used
Vol.=MIN
JIS-A FILTER used
Vol.=MAX
400 to 20kHz LPF used Level at which Vol=MAX
and THD=10% (from 2nd to 5th harmonic)
21
23
21
23
21
23
VIN=-15dBV
f=1kHz
No input
f=1kHz
18
15
3.3V
3.3V
PIN 18: Measurement of output
voltage (under 6.2kΩ load)
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
400 to 20kHz LPF used Pin 17 level at which pin 15
becomes THD = 3% (from 2nd to 5th harmonic)
JIS-A FILTER used
15
No input
400 to 20kHz LPF used
THD: from 2nd to 5th harmonic
15
VIN=-39dBV
f=1kHz
400 to 20kHz LPF used
15
VIN=-39dBV
f=1kHz
f=1kHz
No input
400 to 20kHz LPF used
Vol.=TYP
21
23
VIN=-15dBV
f=1kHz
400 to 20kHz LPF used
Vol.=MAX, THD: from 2nd to 5th harmonic
21
23
VIN=-15dBV
f=1kHz
400 to 20kHz LPF used
Vol.=MAX
21
23
VIN=-15dBV
f=1kHz
3.3V
3.3V
f=22kHz/1kHz level ratio
3.3V
3.3V
f=4kHz/1kHz level ratio
3.3V
JIS-A FILTER used
3.3V
400 to 20kHz LPF used Pin 10 level at which pin 5
becomes THD = 3% (from 2nd to 5th harmonic)
3.3V
400 to 20kHz LPF used
THD: from 2nd to 5th harmonic
Voltage
applied to
pin 4
STANDBY
pin
400 to 20kHz LPF used
Major conditions
(for the serial control setting,
see the table in the right)
Output
SPK output system (both ends of SPK: measured with 8Ω)
10
10
10
HDL
20
10
VOL1
19
LINE output system
No. Symbol
Input
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0:11kHz
1:4kHz
*
*
0
CHRG
P SW
LPF
C SW
DMY
0:ON
1:OFF
2
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0:ON
1:OFF
MIC
P SW
3
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0:ON
1:OFF
ALC
P SW
4
5
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(0,1):PB Digital
(0,0):PB Analog
(1,*):REC
LPF MODESW
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0:ON
1:OFF
REC
P SW
7
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0:ON
1:OFF
LINE
P SW
8
Serial control setting
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0:ON
1:OFF
LINE
Mute
9
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
0:ON
1:OFF
SPK
P SW
10
0
0
0
0
0
1
1
0
1
1
1
0
0
0
0
0
0
0
0:OFF
1:ON
EVR1
DATA
11
0
0
0
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0:OFF
1:ON
EVR2
DATA
12
0
0
0
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0:OFF
1:ON
EVR4
DATA
13
0
0
0
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0:OFF
1:ON
EVR8
DATA
14
0
0
0
0
0
1
1
0
1
1
1
0
0
0
0
0
0
0
0:OFF
1:ON
EVR16
DATA
15
LA74303FN
No.A1181-7/18
LA74303FN
Description of Pin Functions
Pin No.
Pin Description
1
Speaker input
2
MIX output
3
BEEP input
4
STANDBY control
5
LINE output
6
C.S. input
7
CLOCK input
8
DATA input
9
VCCA
10
PB input
11
A GND
12
REC output
13
ALC detection
14
ALC input
15
MIC output
16
MIC GND
17
MIC input
18
INT power supply for MIC
19
Ripple rejection for VREFL
20
SPK GND
21
Speaker positive-phase output
22
VCCSP
23
Speaker negative-phase output
24
SPK GND
No.A1181-8/18
LA74303FN
LA74303FN Internal Equivalent Diagram and Recommended Circuit Diagram
MIC
0.01μF
0.47μF
0.01μF
MIC
IN
18
MIC
GND
16
17
15
2.2kΩ
+
19
MIC VCC
4.7μF
14
13
ALC
DET
+
-
12
For SW control,
refer to table below 2.
11
REC
OUT
VREF
20
CHARGE
Refer to table
below 1.
SPK
LPF
21
A GND
A
B
C
LPF1
10
LPF2
22
VCCSP
PB IN
0.1μF
9
VCCA
3V
8
DATA
7
CLOCK
EVR
3.3V
+ -
23
MUTE
SPK
GND
Mix ratio
1:1
+
24
1
2
3
LOGIC
4
0.01μF
0.047μF
5
6
0.1μF
LINE
OUT
220kΩ
BEEP IN
C.S
STANDBY
CTL: LOW
10kΩ
Table 1: Logic of external capacitor charging circuit
SERIAL
No.2
ON
0
OFF
1
Initially “ON”
Table 2: LPF SW control logic
SERIAL
No.5
No.6
A
1
*
B
0
0
C
0
1
*) Don’t care.
No.A1181-9/18
LA74303FN
Table of Input/Output Forms of LA74303FN
Pin No.
Pin Name
DC voltage
1
SP IN
1.27V
AC voltage
At PB reference input
Description of functions
Equivalent circuit diagram in pin
Speaker input pin
VCCSP(=3.3V)
Output level = -8dBV
(EVR MAX)
10kΩ 11kΩ
1
23
SPK OUT-
1.27V
At PB reference input
Pin for output of speaker reversed
Output level = -8dBV
phase
23
(EVR MAX)
2
MIX OUT
1.58V
At PB reference input
EVR output pin
VCCA(=3.0V)
Output level = -8dBV
400Ω
35kΩ
2
3.9kΩ
VREFL
3
BEEP IN
1.64V
Maximum input level
VCCA(=3.0V)
= -8dBV
2kΩ
3
2kΩ
VREFL
4
STANDBY L
STANDBY control pin
45kΩ
2V or more:
4
STANDBY canceled
40kΩ
5
LINE OUT
1.52V
At PB reference input
LINE output pin
VCCA(=3.0V)
Output level = -11dBV
232kΩ
26kΩ
5
500Ω
10.5kΩ
VREFL
6
CS
7
CLOCK
CS input pin
CLOCK input pin
6
500Ω
7
8
DATA
DATA input pin
8
Continued on next page.
No.A1181-10/18
LA74303FN
Continued from preceding page.
Pin No.
Pin Name
DC voltage
9
VCCA
3.0V
10
PB IN
1.64V
AC voltage
Description of functions
Equivalent circuit diagram in pin
Power pin for analog signal part
Reference input level
PB input pin
VCCA(=3.0V)
=-15dBV
Maximum input level
= -5dBV
10
In analog input mode
25kΩ
10kΩ
15kΩ
= 3.465Vpp
In ΔΣ input mode
VREF
11
A GND
0V
12
REC OUT
1.50V
GND pin for analog signal part
At PB reference input
REC output pin
VCCA(=3.0V)
Output level = -15dBV
500Ω
20kΩ
12
3kΩ
VREF
13
ALC DET
ALC detection pin
VCCA(=3.0V)
1kΩ
13
500Ω
14
ALC IN
1.64V
At MIC reference input
ALC input pin
VCCA(=3.0V)
Output level = -49dBV
Max input level
500Ω
=-10dBV
14
50kΩ
VREF
15
MIC OUT
1.6V
At MIC reference input
MIC output pin
VCCA(=3.0V)
Output level = -49dBV
500Ω
9.7kΩ
15
1kΩ
VREF
Continued on next page.
No.A1181-11/18
LA74303FN
Continued from preceding page.
Pin No.
Pin Name
DC voltage
16
MIC GND
0V
17
MIC IN
1.64V
AC voltage
Description of functions
Equivalent circuit diagram in pin
For MIC Amp blocking GND pin
Reference input level
VCCA(=3.0V)
MIC input pin
=-69dBV
Maximum input level
=-30dBV
500Ω
17
70kΩ
VREFL
18
MIC VCC
2.30V
MIC power pin
VCCA(=3.0V)
2.2kΩ
18
23kΩ
19
VREFL
2.30V
MIC VCC and VREFL ripple
VCCA(=3.0V)
rejection pin
400Ω
19
500Ω
200kΩ
20
SP GND
0V
SPK OUT+
1.27V
Speaker GND pin
24
21
At PB reference input
Speaker positive-phase output
Output level = -8dBV
pin
VCCSP(=3.3V)
(EVR MAX)
21
10kΩ
10.7kΩ
23
22
VCCSP
3.3V
Speaker power pin
No.A1181-12/18
LA74303FN
POP Sound Avoiding Sequence
1Upon STANDBY cancellation & control (PBMODE)
Power Supply
(VCCA &
VCCSP)
STANDBY pin
(4PIN)
CS
CLOCK
=Don’t care
=CLOCK
Optional
After 10ms
After 200ms
Before 10ms
After 20ms
DATA sending timing
After 50ms
T0
T1
T2
0
1
DMY
C SW
T3
After 150ms (When pin 5
capacitance is 0.1μF)
T4
T5
T6
T7
T8
Recommended serial control settings
LPF
Timing
Communication content
2
3
CHRG MIC
4
ALC
5
6
7
LPF MODESW REC
P SW P SW P SW
(1, *): REC
0:11kHz 0:ON 0:ON 0:ON
PB Analog
8
9
LINE
LINE
10
11
12
13
14
15
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW MUTE P SW DATA DATA DATA DATA DATA
(0, 0):
*
0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF
(0, 1):
*
1:4kHz 1:OFF 1:OFF 1:OFF
PB Digital
1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
Standby cancellation
T1
(3.3 V applied to pin 4)
DATA unnecessary
Dummy communication
T2
(only CS)
T3
VREF charging circuit: OFF
0
0/1
1
1
1
0
0/1
1
1
0
1
0
0
0
0
0
T4
Speaker AMP: ON
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
0
0
T5
Line AMP: ON
0
0/1
1
1
1
0
0/1
1
0
1
0
0
0
0
0
0
T6
Return to the initial state
0
1
0
0
0
0
0
0
1
0
1
0
0
0
0
0
Standby control
T7
DATA unnecessary
(0 V applied to pin 4)
No.A1181-13/18
LA74303FN
2Upon STANDBY cancellation & control (RECMODE)
Power Supply
(VCCA &
VCCSP)
STANDBY pin
(4PIN)
CS
CLOCK
=Don’t care
=CLOCK
Optional
After 10ms
After 200ms
Before 10ms
After 20ms
DATA sending timing
After 30ms
T0
T1
T2
T3
T4
T5
T6
T7
Recommended serial control settings
0
1
LPF
Timing
Communication content
DMY
C SW
2
3
CHRG MIC
4
ALC
P SW P SW P SW
5
6
7
LPF MODESW REC
(1, *): REC
8
9
LINE
LINE
10
11
12
13
14
15
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW MUTE P SW DATA DATA DATA DATA DATA
(0, 0):
*
0:11kHz 0:ON 0:ON 0:ON
PB Analog
0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF
(0, 1):
*
1:4kHz 1:OFF 1:OFF 1:OFF
PB Digital
1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
Standby cancellation
T1
(3.3 V applied to pin 4)
DATA unnecessary
Dummy communication
T2
(only CS)
T4
Charging circuit & ALC: OFF,
LPF: REC
ALC: ON
T5
Return to the initial state
T3
0
0/1
1
0
1
1
0
0
1
0
1
0
0
0
0
0
0
0/1
1
0
0
1
0
0
1
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
1
0
0
0
0
0
Standby control
DATA unnecessary
T6
(0 V applied to pin 4)
No.A1181-14/18
LA74303FN
3REC → PB (SPK) Switching
4PB (SPK) → REC Switching
CS
CLOCK
=Don’t care
=CLOCK
After 20ms or more
(Capacitance between pins
1&2: 0.1μF)
Optional
DATA sending timing
T0
T1
T2
After 20ms or more
(Capacitance between pins
20&21: 0.1μF)
T3
T4
Recommended serial control settings
0
1
LPF
Timing
Communication content
DMY
C SW
2
3
CHRG MIC
4
ALC
P SW P SW P SW
5
6
7
LPF MODESW REC
(1, *): REC
8
9
LINE
LINE
10
11
12
13
14
15
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW MUTE P SW DATA DATA DATA DATA DATA
(0, 0):
*
0:11kHz 0:ON 0:ON 0:ON
PB Analog
0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF
(0, 1):
*
1:4kHz 1:OFF 1:OFF 1:OFF
PB Digital
1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
T0
Speaker AMP: OFF
0
0/1
1
0
0
1
0/1
0
1
0
1
0
0
0
0
0
T1
PBMODE: switching EVR: setting
0
0/1
1
1
1
0
0/1
1
1
0
1
a
a
a
a
a
T2
Speaker AMP: ON
0
0/1
1
1
1
0
0/1
1
1
0
0
a
a
a
a
a
0
0/1
1
0
0
1
0/1
0
1
0
1
0
0
0
0
0
0
0/1
1
0
0
1
0/1
0
1
0
0
0
0
0
0
0
11
12
13
14
15
T3
RECMODE: switching EVR: MUTE
Speaker AMP: OFF
T4
Speaker AMP: ON
Note) a=EVR in user setting.
5REC → PB (LINE) Switching
6PB(LINE) → REC Switching
CS
CLOCK
=Don’t care
=CLOCK
DATA sending timing
After 5ms or more
T0
T1
T2
Recommended serial control settings
0
1
DMY
C SW
LPF
Timing
Communication content
2
3
CHRG MIC
4
ALC
5
6
7
LPF MODESW REC
P SW P SW P SW
(1, *): REC
0:11kHz 0:ON 0:ON 0:ON
PB Analog
8
9
LINE
LINE
10
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW MUTE P SW DATA DATA DATA DATA DATA
(0, 0):
*
0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF
(0, 1):
*
T0
1:4kHz 1:OFF 1:OFF 1:OFF
PB Digital
1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
PBMODE: switching
0
0/1
1
1
1
0
0/1
1
1
0
1
0
0
0
0
0
T1
Line AMP: ON Line MUTE: OFF
0
0/1
1
1
1
0
0/1
1
0
1
1
0
0
0
0
0
T2
RECMODE: switching
Line AMP: ON Line MUTE: OFF
0
0/1
1
0
0
1
0/1
0
1
0
1
0
0
0
0
0
No.A1181-15/18
LA74303FN
7EVR Switching (min → max) 0.25ms/CS
CS
DATA sending timing
T0
T1
T2
T3
T4
T5
T6
T19 T20 T21 T22 T23
T24
T25
11
12
Recommended serial control settings
0
1
LPF
Timing
Communication content
DMY
C SW
2
3
CHRG MIC
4
ALC
P SW P SW P SW
5
6
7
LPF MODESW REC
(1, *): REC
8
9
LINE
LINE
10
13
14
15
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW MUTE P SW DATA DATA DATA DATA DATA
(0, 0):
*
0:11kHz 0:ON 0:ON 0:ON
PB Analog
0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF
(0, 1):
*
1:4kHz 1:OFF 1:OFF 1:OFF
PB Digital
1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
T0
EVRDATA=0
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
0
0
T1
EVRDATA=7
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
0
0
T2
EVRDATA=8
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
1
0
T3
EVRDATA=9
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
0
1
0
T4
EVRDATA=10
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
0
1
0
T5
EVRDATA=11
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
0
1
0
T6
EVRDATA=12
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
1
1
0
T7
EVRDATA=13
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
1
1
0
T8
EVRDATA=14
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
1
1
0
T9
EVRDATA=15
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
1
0
T10
EVRDATA=16
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
0
1
T11
EVRDATA=17
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
0
0
1
T12
EVRDATA=18
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
0
0
1
T13
EVRDATA=19
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
0
0
1
T14
EVRDATA=20
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
1
0
1
T15
EVRDATA=21
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
1
0
1
T16
EVRDATA=22
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
1
0
1
T17
EVRDATA=23
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
0
1
T18
EVRDATA=24
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
1
1
T19
EVRDATA=25
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
0
1
1
T20
EVRDATA=26
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
0
1
1
T21
EVRDATA=27
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
0
1
1
T22
EVRDATA=28
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
1
1
1
T23
EVRDATA=29
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
1
1
1
T24
EVRDATA=30
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
1
1
1
T25
EVRDATA=31
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
1
1
Note) DATA1 to 6 are the mute area of EVR characteristics and jumped due to no generation of POP noise.
No.A1181-16/18
LA74303FN
8EVR Switching (max → min) 0.25ms/CS
CS
DATA sending timing
T0
T1
T2
T3
T4
T5
T6
T19 T20 T21 T22 T23
T24
T25
11
12
Recommended serial control settings
0
1
LPF
Timing
Communication content
DMY
C SW
2
3
CHRG MIC
4
ALC
P SW P SW P SW
5
6
7
LPF MODESW REC
(1, *): REC
8
9
LINE
LINE
10
13
14
15
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW MUTE P SW DATA DATA DATA DATA DATA
(0, 0):
*
0:11kHz 0:ON 0:ON 0:ON
PB Analog
0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF
(0, 1):
*
1:4kHz 1:OFF 1:OFF 1:OFF
PB Digital
1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
T0
EVRDATA=31
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
1
1
T1
EVRDATA=30
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
1
1
1
T2
EVRDATA=29
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
1
1
1
T3
EVRDATA=28
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
1
1
1
T4
EVRDATA=27
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
0
1
1
T5
EVRDATA=26
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
0
1
1
T6
EVRDATA=25
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
0
1
1
T7
EVRDATA=24
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
1
1
T8
EVRDATA=23
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
0
1
T9
EVRDATA=22
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
1
0
1
T10
EVRDATA=21
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
1
0
1
T11
EVRDATA=20
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
1
0
1
T12
EVRDATA=19
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
0
0
1
T13
EVRDATA=18
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
0
0
1
T14
EVRDATA=17
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
0
0
1
T15
EVRDATA=16
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
0
1
T16
EVRDATA=15
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
1
0
T17
EVRDATA=14
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
1
1
0
T18
EVRDATA=13
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
1
1
0
T19
EVRDATA=12
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
1
1
0
T20
EVRDATA=11
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
0
1
0
T21
EVRDATA=10
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
0
1
0
T22
EVRDATA=9
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
0
1
0
T23
EVRDATA=8
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
1
0
T24
EVRDATA=7
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
0
0
T25
EVRDATA=0
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
0
0
Note) DATA1 to 6 are the mute area of EVR characteristics and jumped due to no generation of POP noise.
No.A1181-17/18
LA74303FN
EVR attenuation (dB)
LA74303FN EVR characteristics
10
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
5
10
15
20
25
30
Serial data set value (decimal)
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PS No.A1181-18/18