TI ISO7631FC Low power triple and quad channels digital isolator Datasheet

ISO7631FM, ISO7631FC
ISO7640FC, ISO7641FC
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SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
Low Power Triple and Quad Channels Digital Isolators
Check for Samples: ISO7631FM, ISO7631FC, ISO7640FC, ISO7641FC
FEATURES
APPLICATIONS
•
•
1
•
•
•
•
•
•
•
•
•
•
Signaling Rate: 150 Mbps (M-Grade), 25 Mbps
(C-Grade)
Robust Design with Integrated Noise Filter
(C-Grade)
Low Power Consumption, Typical ICC per
Channel (3.3V Supplies):
– ISO7631FM: 2 mA at 10 Mbps
– ISO7631FC: 1.5 mA at 10 Mbps
– ISO7640FC: 1.1 mA at 10 Mbps
– ISO7641FC: 1.3 mA at 10 Mbps
Extremely low ICC_disable(C-Grade)
Low Propagation Delay: 7 ns Typical (MGrade)
Output Defaults to Low-state in Fail-safe Mode
Wide Temperature Range: –40°C to 125°C
50 KV/µs Transient Immunity, Typical
Long Life with SiO2 Isolation barrier
Operates From 2.7V (M-Grade), 3.3 V and 5 V
Supply and Logic Levels
Wide Body SOIC-16 Package
Optocoupler Replacement in:
– Industrial Fieldbus
– Profibus
– Modbus
– DeviceNetTM Data Buses
– Servo Control Interface
– Motor Control
– Power Supplies
– Battery Packs
SAFETY AND REGULATORY
APPROVALS
•
•
2500 VRMS for 1 Minute per UL 1577 (approved)
4000 VPK VDE Rating for DIN EN 60747-5-2
(VDE 0884 Rev. 2), 1414 VPK Working Voltage
(approved)
CSA Component Acceptance Notice
5A(approved)
•
DESCRIPTION
ISO7631F, ISO7640F and ISO7641F provide galvanic isolation up to 4 KVPK per VDE. ISO7631F has 3 channels
with two forward and one reverse direction channels. ISO7640F and ISO7641F are quad channel isolators;
ISO7640F has four forward and ISO7641F has three forward and one reverse direction channels. Suffix F
indicates that output defaults to Low-state in fail-safe conditions (see Table 1). M-Grade devices are high speed
isolators capable of 150 Mbps data rate with fast propagation delays whereas C-Grade devices can run up to 25
Mbps data rate with low power consumption and integrated filters for noise-prone applications. C-Grade devices
are recommended for lower speed applications where input noise pulses of less than 6 ns duration need to be
suppressed or lower power consumption is critical.
ISO7640
ISO7641
ISO7631
VCC1
1
16
VCC2
VCC1
1
16
VCC2
VCC1
1
16
GND1
2
15
GND2
GND1
2
15
GND2
GND1
2
15
GND2
INA
INB
3
14
OUTA
3
14
OUTA
14
OUTA
13
OUTB
4
13
OUTB
INA
INB
3
4
INA
INB
4
13
OUTB
INC
5
12
OUTC
INC
5
12
OUTC
OUTC
5
12
INC
IND
6
11
OUTD
OUTD
6
11
IND
NC
6
11
NC
NC
7
10
EN
EN1
7
10
EN2
EN1
7
10
EN2
GND1
8
9
GND1
8
9
GND1
8
9
GND2
GND2
VCC2
GND2
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012, Texas Instruments Incorporated
ISO7631FM, ISO7631FC
ISO7640FC, ISO7641FC
SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION CONTINUED
Each isolation channel has a logic input and output buffer separated by a silicon dioxide (SiO2) insulation barrier.
Used in conjunction with isolated power supplies, these devices prevent noise currents on a data bus or other
circuits from entering the local ground and interfering with or damaging sensitive circuitry. The devices have TTL
input thresholds and can operate from 2.7 V (M-Grade), 3.3 V and 5 V supplies. All inputs are 5 V tolerant when
supplied from 3.3 V or 2.7 V supplies.
PIN DESCRIPTIONS
PIN
NAME
I/O
DESCRIPTION
ISO7640
ISO7641
ISO7631
INA
3
3
3
I
Input, channel A
INB
4
4
4
I
Input, channel B
INC
5
5
12
I
Input, channel C
IND
6
11
-
I
Input, channel D
OUTA
14
14
14
O
Output, channel A
OUTB
13
13
13
O
Output, channel B
OUTC
12
12
5
O
Output, channel C
OUTD
11
6
-
O
Output, channel D
EN
10
-
-
I
Enables (when input is High or Open) or Disables (when input is Low) OUTA, OUTB,
OUTC and OUTD of ISO7640
EN1
-
7
7
I
Enables (when input is High or Open) or Disables (when input is Low) OUTD of
ISO7641 and OUTC of ISO7631
EN2
-
10
10
I
Enables (when input is High or Open) or Disables (when input is Low) OUTA, OUTB,
and OUTC of ISO7641
Enables (when input is High or Open) or Disables (when input is Low) OUTA and
OUTB of ISO7631
VCC1
1
1
1
–
Power supply, VCC1
VCC2
16
16
16
–
Power supply, VCC2
GND1
2,8
2,8
2,8
–
Ground connection for VCC1
GND2
9,15
9,15
9,15
–
Ground connection for VCC2
7
-
6,11
-
No Connect pins are floating with no internal connection
NC
Table 1. FUNCTION TABLE (1)
INPUT
VCC
PU
(1)
2
OUTPUT
VCC
PU
INPUT
(INx)
OUTPUT ENABLE
(ENx)
OUTPUT
(OUTx)
H
H or Open
H
L
H or Open
L
X
L
Z
Open
H or Open
L
H or Open
L
PD
PU
X
PD
PU
X
L
Z
PU
PD
X
X
Undetermined
PU = Powered Up(VCC ≥ 2.7 V); PD = Powered Down (VCC ≤ 2.1 V); X = Irrelevant; H = High Level; L
= Low Level; Z = High Impedance
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SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
AVAILABLE OPTIONS
PRODUCT
RATED
ISOLATION
PACKAGE
INPUT
THRESHOLD
DATA RATE
and FILTER
150 Mbps,
No Noise Filter
ISO7631FM
ISO7631FC
ISO7640FC (1)
4 KVPK /
2.5 KVRMS (2)
DW-16
1.5 V TTL
(CMOS
Compatible)
25 Mbps,
Integrated Noise
Filter
ISO7641FC
(1)
(2)
CHANNEL
DIRECTION
MARKED
AS
2 Forward,
1 Reverse
ISO7631FM
2 Forward,
1 Reverse
ISO7631FC
4 Forward,
0 Reverse
ISO7640FC
3 Forward,
1 Reverse
ISO7641FC
ORDERING
NUMBER
ISO7631FMDW (rail)
ISO7631FMDWR (reel)
ISO7631FCDW (rail)
ISO7631FCDWR (reel)
ISO7640FCDW (rail)
ISO7640FCDWR (reel)
ISO7641FCDW (rail)
ISO7641FCDWR (reel)
Product Preview
See the Regulatory Information table for detailed isolation ratings.
Copyright © 2012, Texas Instruments Incorporated
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ABSOLUTE MAXIMUM RATINGS (1)
VALUE
PARAMETER
MIN
MAX
UNIT
Supply voltage (2)
VCC1, VCC2
–0.5
6
V
Voltage
INx, OUTx, ENx
–0.5
6
V
±15
mA
±4
kV
±1.5
kV
Output Current, IO
Electrostatic discharge
Human Body Model
ESDA, JEDEC JS-001-2012
Field-Induced Charged Device
Model
JEDEC JESD22-C101E
Machine Model
JEDEC JESD22-A115-A
All pins
Maximum junction temperature, TJ
Storage temperature, TSTG
(1)
(2)
-65
±200
V
150
°C
150
°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values except differential I/O bus voltages are with respect to the local ground terminal (GND1 or GND2) and are peak
voltage values.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
MIN
Supply voltage
VCC1, VCC2
High-level output current
IOH
Low-level output current
IOL
High-level input voltage
VIH
Low-level input voltage
VIL
Input pulse duration
Signaling rate
TYP
MAX
M-Grade
2.7
5.5
C-Grade
3
5.5
-4
1 / tui
V
mA
4
tui
UNIT
mA
2
VCC
V
0
0.8
V
M-Grade: ≥3V-Operation
6.67
M-Grade: <3V-Operation
10
C-Grade: ≥3V-Operation
40
M-Grade: ≥3V-Operation
0
150
M-Grade: <3V-Operation
0
100
C-Grade: ≥3V-Operation
0
25
Junction temperature
TJ
-40
Ambient temperature
TA
-40
ns
25
Mbps
136
°C
125
°C
THERMAL INFORMATION
ISO76xx
THERMAL METRIC (1)
DW (16 Pins)
θJA
Junction-to-ambient thermal resistance
72
θJC(top)
Junction-to-case(top) thermal resistance
38
θJB
Junction-to-board thermal resistance
39
ψJT
Junction-to-top characterization parameter
9.4
ψJB
Junction-to-board characterization parameter
n/a
θJC(bottom)
Junction-to-case(bottom) thermal resistance
n/a
PD
VCC1 = VCC2 = 5.5V, TJ = 150°C, CL = 15pF
Maximum Device Power Dissipation
Input a 75 MHz 50% duty cycle square wave
399
(1)
4
UNITS
°C/W
mW
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
ELECTRICAL CHARACTERISTICS
VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)
ISO7631F, ISO7640F, ISO7641F
M-Grade
PARAMETER
TEST CONDITIONS
TYP
IOH = –4 mA; see Figure 1
VCCx (1) – 0.8
IOH = –20 μA; see Figure 1
VCCx (1) – 0.1
VOH
High-level output voltage
VOL
Low-level output voltage
VI(HYS)
Input threshold voltage
hysteresis
IIH
High-level input current
VIH = VCC at INx or ENx
IIL
Low-level input current
VIL = 0 V at INx or ENx
CMTI
Common-mode transient
immunity
VI = VCC or 0 V; see Figure 4
(1)
C-Grade
MIN
MAX
MIN
TYP
4.8
VCCx (1) – 0.8
4.7
5
VCCx (1) – 0.1
5
MAX
V
IOL = 4 mA; see Figure 1
0.2
0.4
0.3
0.5
IOL = 20 μA; see Figure 1
0
0.1
0
0.1
450
UNIT
V
450
10
mV
10
-10
μA
-10
25
75
25
75
kV/μs
VCCx is the supply voltage, VCC1 or VCC2, for the output channel that is being measured.
SWITCHING CHARACTERISTICS
VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)
ISO7631F, ISO7640F, ISO7641F
PARAMETER
tPLH, tPHL
Propagation delay time
PWD (1)
Pulse width distortion |tPHL – tPLH|
tsk(o) (2)
Channel-to-channel output skew time
tsk(pp) (3)
Part-to-part skew time
tr
Output signal rise time
tf
Output signal fall time
tPHZ
Disable Propagation Delay, high-to-high
impedance output
tPLZ
Disable Propagation Delay, low-to-high
impedance output
tPZL
Enable Propagation Delay, high
impedance-to-low output
tfs
Fail-safe output delay time from input
data or power loss
(4)
TYP
MAX
MIN
TYP
MAX
3.5
7
10.5
11
17
28
2
3
Same-direction Channels
2
3
Opposite-direction Channels
3
4
See Figure 1
Enable Propagation Delay, high
impedance-to-high output
(3)
See Figure 1
C-Grade
MIN
4.5
tPZH
(1)
(2)
M-Grade
TEST CONDITIONS
UNIT
13
1.6
2.8
1
2.9
ns
5
16
8
20
5
16
7
20
4
16
11000
22000 (4)
4
16
8
20
See Figure 2
See Figure 3
ns
ns
9.5
9
μs
Also known as Pulse Skew.
tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same
direction while driving identical loads.
tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same
direction while operating at identical supply voltages, temperature, input signals and loads.
The enable signal rate for C-grade devices should be ≤ 45 Kbps.
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SUPPLY CURRENT
VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)
ISO7631F
M-Grade
PARAMETER
ICC1
TEST CONDITIONS
Disable
ICC2
ICC1
EN1 = EN2 = 0 V
DC to 1 Mbps
ICC2
ICC1
10 Mbps
ICC2
ICC1
25 Mbps
ICC2
ICC1
DC Signal: VI = VCC or 0 V
AC Signal: All channels switching with square
wave clock input; CL = 15 pF
150 Mbps
ICC2
MIN
C-Grade
TYP
MAX
2.5
4
1.1
1.9
3.7
5.4
1.5
2.6
2.6
4.1
1.8
2.7
3.8
5.5
2.6
3.9
3.3
4.5
2.7
3.7
4.9
6.6
3.9
5.3
4.5
6
4.1
5.4
6.8
9
5.9
7.8
15
19.5
22
30
ISO7640F
ICC1
ICC1
EN = 0 V
DC to 1 Mbps
ICC2
ICC1
10 Mbps
ICC2
ICC1
DC Signal: VI = VCC or 0 V,
AC Signal: All channels switching with square
wave clock input; CL = 15 pF
25 Mbps
ICC2
ISO7641F
ICC1
ICC2
ICC1
ICC2
ICC1
ICC2
ICC1
ICC2
6
TYP MAX
UNIT
mA
Not Applicable
C-Grade
Disable
ICC2
MIN
0.6
1.2
1.3
2.6
0.7
1.3
3
4.6
1.3
2
5.2
7
2.5
3.6
8.5
11
mA
C-Grade
Disable
EN1 = EN2 = 0 V
DC to 1 Mbps
10 Mbps
DC Signal: VI = VCC or 0 V,
AC Signal: All channels switching with square
wave clock input; CL = 15 pF
25 Mbps
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1.2
2.1
1.6
2.6
1.8
2.8
3.1
4.2
3
4
4.9
6.1
4.8
6
7.7
9.5
mA
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ELECTRICAL CHARACTERISTICS
VCC1 at 5 V ± 10% and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
ISO7631F, ISO7640F, ISO7641F
M-Grade
PARAMETER
High-level output
voltage
VOH
Low-level output
voltage
VOL
TEST CONDITIONS
MIN
TYP
VCC1 – 0.8
4.8
C-Grade
MAX
MIN
TYP
VCC1 – 0.8
4.7
IOH = –4 mA; see
Figure 1
OUTx on VCC1 (5V) side
OUTx on VCC2 (3.3V) side
VCC2 - 0.4
3
VCC2 - 0.6
2.9
IOH = –20 μA;
see Figure 1
OUTx on VCC1 (5V) side
VCC1 – 0.1
5
VCC1 – 0.1
5
OUTx on VCC2 (3.3V) side
VCC2 – 0.1
3.3
VCC2 – 0.1
3.3
MAX
V
IOL = 4 mA; see Figure 1
0.2
0.4
0.3
0.5
IOL = 20 μA; see Figure 1
0
0.1
0
0.1
VI(HYS)
Input threshold voltage
hysteresis
430
IIH
High-level input current
VIH = VCC at INx or ENx
IIL
Low-level input current
VIL = 0 V at INx or ENx
CMTI
Common-mode
transient immunity
VI = VCC or 0 V; see Figure 4
430
10
UNIT
V
mV
10
-10
μA
-10
25
50
25
50
kV/μs
SWITCHING CHARACTERISTICS
VCC1 at 5 V ± 10% and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
ISO7631F, ISO7640F, ISO7641F
PARAMETER
tPLH, tPHL
Propagation delay time
PWD (1)
Pulse width distortion |tPHL – tPLH|
tsk(o) (2)
Channel-to-channel output skew time
tsk(pp) (3)
Part-to-part skew time
tr
Output signal rise time
tf
Output signal fall time
tPHZ
Disable Propagation Delay, high-tohigh impedance output
tPLZ
Disable Propagation Delay, low-tohigh impedance output
tPZL
Enable Propagation Delay, high
impedance-to-low output
tfs
Fail-safe output delay time from input
data or power loss
(4)
TYP
MAX
MIN
TYP
MAX
4
8
13
11
18
32
2
3.5
Same-direction Channels
2.5
4.5
Opposite-direction Channels
3.5
5.5
See Figure 1
Enable Propagation Delay, high
impedance-to-high output
(3)
See Figure 1
C-Grade
MIN
6
tPZH
(1)
(2)
M-Grade
TEST CONDITIONS
ns
15
2
3.6
1.2
3.3
ns
6.5
17
9
20
6.5
17
8
20
5.5
17
11000
22000 (4)
5.5
17
10
30
See Figure 2
See Figure 3
UNIT
ns
9.5
8.5
μs
Also known as Pulse Skew.
tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same
direction while driving identical loads.
tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same
direction while operating at identical supply voltages, temperature, input signals and loads.
The enable signal rate for C-grade devices should be ≤ 45 Kbps.
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SUPPLY CURRENT
VCC1 at 5 V ± 10% and VCC2 at 3.3V ± 10% (over recommended operating conditions unless otherwise noted)
ISO7631F
M-Grade
PARAMETER
ICC1
TEST CONDITIONS
Disable
ICC2
ICC1
EN1 = EN2 = 0 V
DC to 1 Mbps
ICC2
ICC1
10 Mbps
ICC2
ICC1
25 Mbps
ICC2
ICC1
DC Signal: VI = VCC or 0 V
AC Signal: All channels switching with square wave
clock input; CL = 15 pF
150 Mbps
ICC2
MIN
C-Grade
TYP
MAX
TYP
MAX
2.5
4
1.1
1.9
2.7
3.7
0.7
1.3
2.6
4.1
1.8
2.7
2.8
3.8
1.8
2.6
3.3
4.5
2.7
3.7
3.5
4.6
2.6
3.5
4.5
6
4.1
5.4
4.7
5.9
3.8
5
15
19.5
14.6
19
ISO7640F
ICC1
ICC1
EN = 0 V
DC to 1 Mbps
ICC2
ICC1
10 Mbps
ICC2
ICC1
DC Signal: VI = VCC or 0 V,
AC Signal: All channels switching with square wave
clock input; CL = 15 pF
25 Mbps
ICC2
ISO7641F
ICC1
ICC2
ICC1
ICC2
ICC1
ICC2
ICC1
ICC2
8
UNIT
mA
Not Applicable
C-Grade
Disable
ICC2
MIN
0.6
1.2
0.6
1.1
0.7
1.3
2.1
3.2
1.3
2
3.6
4.7
2.5
3.6
5.7
9
mA
C-Grade
Disable
EN1 = EN2 = 0 V
DC to 1 Mbps
10 Mbps
DC Signal: VI = VCC or 0 V,
AC Signal: All channels switching with square wave
clock input; CL = 15 pF
25 Mbps
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1.2
2.1
0.8
1.3
1.8
2.8
2
2.9
3
4
3.2
4.1
4.8
6
5.1
7
mA
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SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
ELECTRICAL CHARACTERISTICS
VCC1 at 3.3V ± 10% and VCC2 at 5V ± 10% (over recommended operating conditions unless otherwise noted)
ISO7631F, ISO7640F, ISO7641F
M-Grade
PARAMETER
VOH
High-level output voltage
TEST CONDITIONS
MIN
TYP
C-Grade
MAX
MIN
TYP
VCC1-0.6
2.9
IOH = –4 mA; see
Figure 1
OUTx on VCC1 (3.3 V) side
VCC1–0.4
3
OUTx on VCC2 (5 V) side
VCC2–0.8
4.8
VCC2–0.8
4.7
IOH = –20 μA; see
Figure 1
OUTx on VCC1 (3.3 V) side
VCC1–0.1
3.3
VCC1–0.1
3.3
OUTx on VCC2 (5 V) side
VCC2–0.1
5
VCC2–0.1
MAX
V
5
IOL = 4 mA; see Figure 1
0.2
0.4
0.3
0.5
IOL = 20 μA; see Figure 1
0
0.1
0
0.1
VOL
Low-level output voltage
VI(HYS)
Input threshold voltage
hysteresis
IIH
High-level input current
VIH = VCC at INx or ENx
IIL
Low-level input current
VIL = 0 V at INx or ENx
CMTI
Common-mode transient
immunity
VI = VCC or 0 V; see Figure 4
UNIT
430
430
10
V
mV
10
-10
μA
-10
25
50
25
50
kV/μs
SWITCHING CHARACTERISTICS
VCC1 at 3.3 V ± 10% and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)
ISO7631F, ISO7640F, ISO7641F
PARAMETER
tPLH, tPHL
Propagation delay time
PWD (1)
Pulse width distortion |tPHL – tPLH|
tsk(o) (2)
Channel-to-channel output skew time
tsk(pp) (3)
Part-to-part skew time
tr
Output signal rise time
tf
Output signal fall time
tPHZ
Disable Propagation Delay, high-to-high
impedance output
tPLZ
Disable Propagation Delay, low-to-high
impedance output
tPZL
Enable Propagation Delay, high
impedance-to-low output
tfs
Fail-safe output delay time from input data
or power loss
(4)
TYP
MAX
MIN
TYP
MAX
4
7.5
12.5
11
18.5
32
2
2.5
Same-direction Channels
2.5
4.5
Opposite-direction Channels
3.5
5.5
See Figure 1
Enable Propagation Delay, high
impedance-to-high output
(3)
See Figure 1
C-Grade
MIN
6
tPZH
(1)
(2)
M-Grade
TEST CONDITIONS
ns
15
1.7
2.9
1.1
2.9
ns
5.5
17
8
20
5.5
17
7
20
4.5
17
11000
22000 (4)
4.5
17
8
30
See Figure 2
See Figure 3
UNIT
ns
9.5
7.5
μs
Also known as Pulse Skew.
tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same
direction while driving identical loads.
tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same
direction while operating at identical supply voltages, temperature, input signals and loads.
The enable signal rate for C-grade devices should be ≤ 45 Kbps.
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SUPPLY CURRENT
VCC1 at 3.3V ± 10% and VCC2 at 5V ± 10% (over recommended operating conditions unless otherwise noted)
ISO7631F
M-Grade
PARAMETER
ICC1
TEST CONDITIONS
Disable
ICC2
ICC1
EN1 = EN2 = 0 V
DC to 1 Mbps
ICC2
ICC1
10 Mbps
ICC2
ICC1
25 Mbps
ICC2
ICC1
DC Signal: VI = VCC or 0 V
AC Signal: All channels switching with square wave clock
input; CL = 15 pF
150 Mbps
ICC2
MIN
C-Grade
TYP
MAX
TYP
MAX
1.8
2.8
0.6
1.1
3.7
5.4
1.5
2.6
1.9
2.9
1.2
1.8
3.8
5.5
2.6
3.9
2.4
3.4
1.8
2.6
4.9
6.6
3.9
5.3
3.2
4.2
2.7
3.6
6.8
9
5.9
7.8
9.3
12.5
22
30
ISO7640F
ICC1
ICC1
EN = 0 V
DC to 1 Mbps
ICC2
ICC1
10 Mbps
ICC2
ICC1
DC Signal: VI = VCC or 0 V,
AC Signal: All channels switching with square wave clock
input; CL = 15 pF
25 Mbps
ICC2
ISO7641F
ICC1
ICC2
ICC1
ICC2
ICC1
ICC2
ICC1
ICC2
10
UNIT
mA
Not Applicable
C-Grade
Disable
ICC2
MIN
0.35
0.7
1.3
2.6
0.4
0.8
3
4.6
0.7
1.2
5.2
7
1.5
2.2
8.5
11
mA
C-Grade
Disable
EN1 = EN2 = 0 V
DC to 1 Mbps
10 Mbps
DC Signal: VI = VCC or 0 V,
AC Signal: All channels switching with square wave clock
input; CL = 15 pF
25 Mbps
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0.7
1.1
1.6
2.6
1.2
1.9
3.1
4.2
2
2.8
4.9
6.1
3.1
4
7.7
9.5
mA
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SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
ELECTRICAL CHARACTERISTICS
VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
ISO7631F, ISO7640F, ISO7641F
M-Grade
PARAMETER
TEST CONDITIONS
TYP
IOH = –4 mA; see Figure 1
VCCx (1) – 0.4
IOH = –20 μA; see Figure 1
VCCx (1) – 0.1
VOH
High-level output
voltage
VOL
Low-level output voltage
VI(HYS)
Input threshold voltage
hysteresis
IIH
High-level input current
VIH = VCC at INx or ENx
IIL
Low-level input current
VIL = 0 V at INx or ENx
CMTI
Common-mode transient
VI = VCC or 0 V; see Figure 4
immunity
(1)
C-Grade
MIN
MAX
MIN
TYP
3
VCCx (1) – 0.6
2.9
3.3
VCCx (1) – 0.1
3.3
MAX
V
IOL = 4 mA; see Figure 1
0.2
0.4
0.3
0.5
IOL = 20 μA; see Figure 1
0
0.1
0
0.1
425
425
10
-10
25
50
25
V
mV
10
-10
UNIT
50
μA
kV/μs
VCCx is the supply voltage, VCC1 or VCC2, for the output channel that is being measured.
SWITCHING CHARACTERISTICS
VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
ISO7631F, ISO7640F, ISO7641F
PARAMETER
tPLH, tPHL
Propagation delay time
PWD (1)
Pulse width distortion |tPHL – tPLH|
tsk(o) (2)
Channel-to-channel output skew time
tsk(pp) (3)
Part-to-part skew time
tr
Output signal rise time
tf
Output signal fall time
tPHZ
Disable Propagation Delay, high-to-high
impedance output
tPLZ
Disable Propagation Delay, low-to-high
impedance output
tPZL
Enable Propagation Delay, high
impedance-to-low output
tfs
Fail-safe output delay time from input
data or power loss
(4)
TYP
MAX
MIN
TYP
MAX
4
8.5
14
12
23
35
2
3
Same-direction Channels
3
5
Opposite-direction Channels
4
6
See Figure 1
Enable Propagation Delay, high
impedance-to-high output
(3)
See Figure 1
C-Grade
MIN
6.5
tPZH
(1)
(2)
M-Grade
TEST CONDITIONS
ns
16
2
3.7
1.3
3.4
ns
6.5
17
9
20
6.5
17
8
20
5.5
17
11000
22000 (4)
5.5
17
10
30
See Figure 2
See Figure 3
UNIT
ns
9.2
7.5
μs
Also known as Pulse Skew.
tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same
direction while driving identical loads.
tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same
direction while operating at identical supply voltages, temperature, input signals and loads.
The enable signal rate for C-grade devices should be ≤ 45 Kbps.
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SUPPLY CURRENT
VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
ISO7631F
M-Grade
PARAMETER
ICC1
TEST CONDITIONS
Disable
ICC2
ICC1
EN1 = EN2 = 0 V
DC to 1 Mbps
ICC2
ICC1
10 Mbps
ICC2
ICC1
25 Mbps
ICC2
ICC1
DC Signal: VI = VCC or 0 V
AC Signal: All channels switching with square wave clock
input; CL = 15 pF
150 Mbps
ICC2
MIN
C-Grade
TYP
MAX
TYP
MAX
1.8
2.8
0.6
1.1
2.7
3.7
0.7
1.3
1.9
2.9
1.2
1.8
2.8
3.8
1.8
2.6
2.4
3.4
1.8
2.6
3.5
4.6
2.6
3.5
3.2
4.2
2.7
3.6
4.7
5.9
3.8
5
9.3
12.5
14.6
19
ISO7640F
ICC1
ICC1
EN = 0 V
DC to 1 Mbps
ICC2
ICC1
10 Mbps
ICC2
ICC1
DC Signal: VI = VCC or 0 V,
AC Signal: All channels switching with square wave clock
input; CL = 15 pF
25 Mbps
ICC2
ISO7641F
ICC1
ICC2
ICC1
ICC2
ICC1
ICC2
ICC1
ICC2
12
UNIT
mA
Not Applicable
C-Grade
Disable
ICC2
MIN
0.35
0.7
0.6
1.1
0.4
0.8
2.1
3.2
0.7
1.2
3.6
4.7
1.5
2.2
5.7
9
mA
C-Grade
Disable
EN1 = EN2 = 0 V
DC to 1 Mbps
10 Mbps
DC Signal: VI = VCC or 0 V,
AC Signal: All channels switching with square wave clock input; CL = 15 pF
25 Mbps
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0.7
1.1
0.8
1.3
1.2
1.9
2
2.9
2
2.8
3.2
4.1
3.1
4
5.1
7
mA
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SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
ELECTRICAL CHARACTERISTICS
VCC1 and VCC2 at 2.7 V (1) (over recommended operating conditions unless otherwise noted)
ISO7631F
M-Grade
PARAMETER
TEST CONDITIONS
MIN
TYP
IOH = –4 mA; see Figure 1
VCC (2) – 0.5
2.4
IOH = –20 μA; see Figure 1
VCC (2) – 0.1
2.7
VOH
High-level output voltage
VOL
Low-level output voltage
VI(HYS)
Input threshold voltage hysteresis
IIH
High-level input current
VIH = VCC at INx or ENx
IIL
Low-level input current
VIL = 0 V at INx or ENx
CMTI
Common-mode transient immunity
VI = VCC or 0 V; see Figure 4
(1)
(2)
MAX
V
IOL = 4 mA; see Figure 1
0.2
0.4
IOL = 20 μA; see Figure 1
0
0.1
350
V
mV
10
-10
25
UNIT
50
μA
kV/μs
Only M-Grade devices are recommended for operation down to 2.7 V supplies. For 2.7 V-operation, max data rate is 100 Mbps.
VCCx is the supply voltage, VCC1 or VCC2, for the output channel that is being measured.
SWITCHING CHARACTERISTICS
VCC1 and VCC2 at 2.7 V (over recommended operating conditions unless otherwise noted)
ISO7631F
M-Grade
PARAMETER
tPLH, tPHL
Propagation delay time
PWD (1)
Pulse width distortion |tPHL – tPLH|
tsk(o) (2)
Channel-to-channel output skew time
tsk(pp) (3)
Part-to-part skew time
tr
Output signal rise time
tf
Output signal fall time
tPHZ
Disable Propagation Delay, high-to-high
impedance output
tPLZ
Disable Propagation Delay, low-to-high
impedance output
tPZH
Enable Propagation Delay, high impedance-tohigh output
tPZL
Enable Propagation Delay, high impedance-tolow output
tfs
Fail-safe output delay time from input data or
power loss
(1)
(2)
(3)
TEST CONDITIONS
See Figure 1
MIN
TYP
MAX
5
8
16
UNIT
2.5
Same-direction Channels
4
Opposite-direction Channels
5
ns
8
2.3
See Figure 1
ns
1.8
8
18
8
18
7
18
7
18
See Figure 2
ns
See Figure 3
8.5
μs
Also known as Pulse Skew.
tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same
direction while driving identical loads.
tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same
direction while operating at identical supply voltages, temperature, input signals and loads.
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SUPPLY CURRENT
VCC1 and VCC2 at 2.7 V (over recommended operating conditions unless otherwise noted)
ISO7631F
M-Grade
PARAMETER
ICC1
ICC2
ICC1
ICC2
ICC1
ICC2
ICC1
ICC2
ICC1
ICC2
14
TEST CONDITIONS
Disable
MIN
EN1 = EN2 = 0 V
DC to 1 Mbps
10 Mbps
25 Mbps
DC Signal: VI = VCC or 0 V
AC Signal: All channels switching with square wave clock input; CL =
15 pF
100 Mbps
Submit Documentation Feedback
TYP
MAX
1.5
2.4
2.2
3.2
1.6
2.5
2.3
3.2
2
2.9
3
3.9
2.7
3.7
3.9
4.9
5.7
6.8
8.6
12
UNIT
mA
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SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
ISOLATION BARRIER
PARAMETER MEASUREMENT INFORMATION
IN
Input
Generator
NOTE A
50 W
VI
VCC1
VI
VCC/2
OUT
VCC/2
0V
tPHL
tPLH
VO
CL
NOTE
B
VOH
90%
VO
50%
10%
tf
tr
50%
VOL
A.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, tr ≤ 3
ns, tf ≤ 3ns, ZO = 50 Ω. At the input, 50 Ω resistor is required to terminate Input Generator signal. It is not needed in
actual application.
B.
CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 1. Switching Characteristics Test Circuit and Voltage Waveforms
VCC
VCC
ISOLATION BARRIER
0V
R L = 1 k W ± 1%
IN
Input
Generator
VI
OUT
EN
VO
0V
tPLZ
tPZL
VO
CL
VCC/2
VCC/2
VCC
0.5 V
50%
VOL
NOTE
B
VI
50 W
ISOLATION BARRIER
NOTE A
IN
3V
Input
Generator
NOTE A
VI
VCC
OUT
VO
VCC/2
VI
VCC/2
0V
EN
CL
NOTE
B
50 W
tPZH
R L = 1 k W ± 1%
VO
VOH
50%
0.5 V
tPHZ
A.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 10 kHz, 50% duty cycle,
tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω.
B.
CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
0V
Figure 2. Enable/Disable Propagation Delay Time Test Circuit and Waveform
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PARAMETER MEASUREMENT INFORMATION (continued)
VI
VCC
ISOLATION BARRIER
VCC
IN = VCC
A.
2.7 V
VI
0V
OUT
t fs
VO
CL
NOTE A
VOH
50%
VO
fs low V
OL
CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 3. Failsafe Delay Time Test Circuit and Voltage Waveforms
VCC1
VCC2
IN
S1
ISOLATION BARRIER
C = 0.1 mF ±1%
GND1
C = 0.1 mF ±1%
OUT
CL
NOTE A
Pass/Fail Criterion –
the output must
remain stable.
VOH or VOL
GND2
VTEST
A.
CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 4. Common-Mode Transient Immunity Test Circuit
16
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SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
DEVICE INFORMATION
IEC INSULATION AND SAFETY-RELATED SPECIFICATIONS FOR DW-16 PACKAGE
PARAMETER
L(I01)
L(I02)
(1)
CTI
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Minimum air gap (Clearance)
Shortest terminal to terminal distance through air
8.3
mm
Minimum external tracking
(Creepage)
Shortest terminal to terminal distance across the
package surface
8.1
mm
Tracking resistance (Comparative
Tracking Index)
DIN IEC 60112 / VDE 0303 Part 1
≥400
V
Minimum Internal Gap (Internal
Clearance)
Distance through the insulation
0.014
mm
RIO (2)
Isolation resistance, Input to
Output
VIO = 500 V, TA < 100°C
>1012
VIO = 500 V, 100°C ≤ TA ≤ max
>1011
CIO (2)
Barrier capacitance, Input to
Output
VI = 0.4 sin (2πft), f = 1MHz
2
pF
CI (3)
Input capacitance
VI = VCC/2 + 0.4 sin (2πft), f = 1MHz, VCC = 5 V
2
pF
(1)
(2)
(3)
Ω
Per JEDEC package dimensions.
All pins on each side of the barrier tied together creating a two-terminal device.
Measured from input pin to ground.
spacer
NOTE
Creepage and clearance requirements should be applied according to the specific
equipment isolation standards of an application. Care should be taken to maintain the
creepage and clearance distance of a board design to ensure that the mounting pads of
the isolator on the printed circuit board do not reduce this distance.
Creepage and clearance on a printed circuit board become equal according to the
measurement techniques shown in the Isolation Glossary. Techniques such as inserting
grooves and/or ribs on a printed circuit board are used to help increase these
specifications.
Table 2. DIN EN 60747-5-2 (VDE 0884 TEIL 2) INSULATION CHARACTERISTICS (1)
over recommended operating conditions (unless otherwise noted)
PARAMETER
VIORM
VPR
TEST CONDITIONS
Maximum working insulation voltage
Input-to-output test voltage
SPECIFICATION
UNIT
1414
VPEAK
After Input/Output safety test subgroup 2/3,
VPR = VIORM x 1.2, t = 10 s,
Partial discharge < 5 pC
1697
Method a, After environmental tests subgroup 1,
VPR = VIORM x 1.6, t = 10 s,
Partial Discharge < 5 pC
2262
Method b1, 100% Production test
VPR = VIORM x 1.875, t = 1 s
Partial discharge < 5 pC
2652
VPEAK
VIOTM
Maximum transient overvoltage
VTEST = VIOTM
t = 60 sec (Qualification)
t = 1 sec (100% Production)
4000
VPEAK
RS
Insulation resistance
VIO = 500 V at TS
>109
Ω
Pollution degree
(1)
2
Climatic Classification 40/125/21
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Table 3. IEC 60664-1 RATINGS TABLE
PARAMETER
TEST CONDITIONS
Basic Isolation Group
SPECIFICATION
Material Group
Installation classification
II
Rated mains voltage ≤ 300 VRMS
I–IV
Rated mains voltage ≤ 600 VRMS
I–III
Rated mains voltage ≤ 1000 VRMS
I–II
REGULATORY INFORMATION
VDE
CSA
Certified according to DIN EN 60747-5-2
UL
Approved under CSA Component
Acceptance Notice #5A
Recognized under 1577 Component Recognition
Program
Basic Insulation
Maximum Transient Overvoltage, 4000
VPK
Maximum Working Voltage, 1414 VPK
4000 VPK Insulation
Single Protection, 2500 VRMS (1)
File Number: 40016131
File Number: 220991
File Number: E181974
(1)
Production tested ≥ 3000 VRMS for 1 second in accordance with UL 1577.
IEC SAFETY LIMITING VALUES
Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry.
A failure of the IO can allow low resistance to ground or the supply and, without current limiting, dissipate
sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system
failures.
PARAMETER
IS
TS
TEST CONDITIONS
Safety input, output, or supply
current
DW-16
MIN
TYP MAX
θJA = 72 °C/W, VI = 5.5V, TJ = 150°C, TA = 25°C
316
θJA = 72 °C/W, VI = 3.6V, TJ = 150°C, TA = 25°C
482
θJA = 72 °C/W, VI = 2.7V, TJ = 150°C, TA = 25°C
643
Maximum case temperature
150
UNIT
mA
°C
Safety Limiting Current - mA
The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum
ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the
application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the
Thermal Information table is that of a device installed on a High-K Test Board for Leaded Surface Mount
Packages. The power is the recommended maximum input voltage times the current. The junction temperature is
then the ambient temperature plus the power times the junction-to-air thermal resistance.
700
600
VCC1 = VCC2 = 2.7V
500
VCC1 = VCC2 = 3.6V
400
300
VCC1 = VCC2 = 5.5V
200
100
0
0
50
100
150
200
Case Temperature - oC
Figure 5. DW-16 θJC Thermal Derating Curve per IEC 60747-5-2
18
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SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
APPLICATION INFORMATION
VCC1
2 mm
max. from
2 mm
max. from
VCC1
VCC2
VCC2
ISO7640
0.1 mF
GND1
0.1 mF
1
16
2
15
INA
3
14
OUTA
INB
4
13
OUTB
INC
5
12
OUTC
IND
NC
6
11
7
10
8
9
GND2
OUTD
EN
GND 2
GND1
VCC1
2 mm
max. from
2 mm
max. from
VCC2
VCC2
VCC1
ISO7641
0.1 mF
0.1 mF
1
16
2
15
INA
3
14
OUTA
INB
4
13
OUTB
INC
5
12
OUTC
OUTD
6
11
7
10
8
9
GND1
EN1
GND2
IND
EN2
GND 2
GND1
VCC1
2 mm
max. from
2 mm
max. from
VCC1
VCC2
VCC2
ISO7631
0.1 mF
0.1 mF
1
16
2
15
INA
3
14
OUTA
INB
4
13
OUTB
5
12
6
11
7
10
8
9
GND1
OUTD
NC
EN1
GND1
GND2
INC
NC
EN2
GND 2
Figure 6. Typical ISO7640, ISO7641 and ISO7631 Application Circuit
Note: For detailed layout recommendations, see Application Note SLLA284, Digital Isolator Design Guide.
Copyright © 2012, Texas Instruments Incorporated
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ISO7631FM, ISO7631FC
ISO7640FC, ISO7641FC
SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
www.ti.com
TYPICAL SUPPLY CURRENT EQUATIONS
(Calculated based on room temperature and typical Silicon process)
ISO7631FM:
At VCC1 = VCC2 = 3.3V
ICC1 = 1.8072 + 0.0244 x f + 0.0016 x f x CL
ICC2 = 2.4625 + 0.0252 x f + 0.0033 x f x CL
At VCC1 = VCC2 = 5V
ICC1 = 2.3183 + 0.04 x f + 0.0025 x f x CL
ICC2 = 3.2582 + 0.0403 x f + 0.0049 x f x CL
ISO7631FC:
At VCC1 = VCC2 = 3.3V
ICC1 = 1.1762 + 0.0325
ICC2 = 1.5285 + 0.0299
At VCC1 = VCC2 = 5V
ICC1 = 1.6001 + 0.0528
ICC2 = 2.2032 + 0.0475
ISO7640FC:
At VCC1 = VCC2 = 3.3V
ICC1 = 0.3209 + 0.0488
ICC2 = 1.9699 + 0.0385
At VCC1 = VCC2 = 5V
ICC1 = 0.5038 + 0.0812
ICC2 = 2.6117 + 0.0603
ISO7641FC:
At VCC1 = VCC2 = 3.3V
ICC1 = 1.2162 + 0.0462
ICC2 = 1.8054 + 0.0411
At VCC1 = VCC2 = 5V
ICC1 = 1.6583 + 0.0757
ICC2 = 2.5008 + 0.0655
x f + 0.0017 x f x CL
x f + 0.0033 x f x CL
x f + 0.0025 x f x CL
x f + 0.005 x f x CL
xf
x f + 0.0066 x f x CL
xf
x f + 0.0101 x f x CL
x f + 0.0017 x f x CL
x f + 0.005 x f x CL
x f + 0.0025 x f x CL
x f + 0.0076 x f x CL
ICC1 and ICC2 are typical supply currents measured in mA; f is data rate measured in Mbps; CL is the capacitive
load on each channel measured in pF.
Enable
VCC
VCC
Input
VCC
VCC
VCC
Output
VCC
1 MW
8W
500 W
500 W
IN
EN
OUT
13 W
1 MW
Figure 7. Device I/O Schematics
20
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Product Folder Links: ISO7631FM ISO7631FC ISO7640FC ISO7641FC
ISO7631FM, ISO7631FC
ISO7640FC, ISO7641FC
www.ti.com
SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
TYPICAL CHARACTERISTICS
8
24
ICC1 at 3.3 V
ICC1 at 5 V
ICC2 at 3.3 V
ICC2 at 5 V
6
5
4
3
2
0
20
40
60
80
100
Data Rate (Mbps)
120
140
12
8
0
160
TA = 25°C
CL = 15 pF
0
20
40
60
80
100
Data Rate (Mbps)
G200
Figure 8. ISO7631FM Supply Current Per Channel
vs Data Rate
160
G201
ICC1 at 3.3 V
ICC1 at 5 V
ICC2 at 3.3 V
ICC2 at 5 V
Supply Current (mA)
6
1.5
1
5
4
3
2
0.5
0
5
10
15
Data Rate (Mbps)
20
TA = 25°C
CL = 15 pF
1
TA = 25°C
CL = 15 pF
0
25
0
5
10
15
Data Rate (Mbps)
G202
Figure 10. ISO7631FC Supply Current Per Channel
vs Data Rate
20
25
G203
Figure 11. ISO7631FC Supply Current For All Channels
vs Data Rate
2.5
9
ICC1 at 3.3 V
ICC1 at 5 V
ICC2 at 3.3 V
ICC2 at 5 V
ICC1 at 3.3 V
ICC1 at 5 V
ICC2 at 3.3 V
ICC2 at 5 V
8
Supply Current (mA)
2
Supply Current (mA)
140
7
ICC1 at 3.3 V
ICC1 at 5 V
ICC2 at 3.3 V
ICC2 at 5 V
2
0
120
Figure 9. ISO7631FM Supply Current For All Channels
vs Data Rate
2.5
Supply Current (mA)
16
4
TA = 25°C
CL = 15 pF
1
0
ICC1 at 3.3 V
ICC1 at 5 V
ICC2 at 3.3 V
ICC2 at 5 V
20
Supply Current (mA)
Supply Current (mA)
7
1.5
TA = 25°C
CL = 15 pF
1
7
6
5
4
TA = 25°C
CL = 15 pF
3
2
0.5
1
0
0
5
10
15
Data Rate (Mbps)
20
25
G100
Figure 12. ISO7640FC Supply Current Per Channel
vs Data Rate
Copyright © 2012, Texas Instruments Incorporated
0
0
5
10
15
Data Rate (Mbps)
20
25
G101
Figure 13. ISO7640FC Supply Current For All Channels
vs Data Rate
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ISO7631FM, ISO7631FC
ISO7640FC, ISO7641FC
SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
www.ti.com
TYPICAL CHARACTERISTICS (continued)
2.5
8
ICC1 at 3.3 V
ICC1 at 5 V
ICC2 at 3.3 V
ICC2 at 5 V
ICC1 at 3.3 V
ICC1 at 5 V
ICC2 at 3.3 V
ICC2 at 5 V
7
Supply Current (mA)
Supply Current (mA)
2
TA = 25°C
CL = 15 pF
1.5
1
0.5
6
5
4
3
2
TA = 25°C
CL = 15 pF
1
0
0
5
10
15
Data Rate (Mbps)
20
0
25
Figure 14. ISO7641FC Supply Current Per Channel
vs Data Rate
5
20
4
3
2
1
−60
VCC = 3.3 V
VCC = 5 V
TA = 25°C
Low−Level Output Voltage (V)
High−Level Output Voltage (V)
10
15
Data Rate (Mbps)
25
G103
6
VCC = 5 V
VCC = 3.3 V
0
−70
−50
−40
−30
−20
High−Level Output Current (mA)
−10
5
3
2
1
0
0
TA = 25°C
4
0
10
G005
Figure 16. M-Grade High-Level Output Voltage
vs High-Level Output Current
20
30
40
50
Low−Level Output Current (mA)
60
70
G006
Figure 17. M-Grade Low-Level Output Voltage
vs Low-Level Output Current
6
6
VCC = 3.3 V
VCC = 5 V
5
4
3
2
1
0
−30
−25
VCC = 3.3 V
VCC = 5 V
TA = 25°C
Low−Level Output Voltage (V)
High−Level Output Voltage (V)
5
Figure 15. ISO7641FC Supply Current For All Channels
vs Data Rate
6
−20
−15
−10
High−Level Output Current (mA)
−5
Figure 18. C-Grade High-Level Output Voltage
vs High-Level Output Current
22
0
G102
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0
G104
5
TA = 25°C
4
3
2
1
0
0
5
10
15
20
25
30
35
Low−Level Output Current (mA)
40
45
G105
Figure 19. C-Grade Low-Level Output Voltage
vs Low-Level Output Current
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: ISO7631FM ISO7631FC ISO7640FC ISO7641FC
ISO7631FM, ISO7631FC
ISO7640FC, ISO7641FC
www.ti.com
SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
TYPICAL CHARACTERISTICS (continued)
11
2.5
Propagation Delay Time (ns)
Power Supply
Under Voltage Threshold (V)
2.52
2.48
2.46
VCC Rising
VCC Falling
2.44
2.42
2.4
tPLH at 3.3 V
tPHL at 3.3 V
tPHL at 5 V
tPLH at 5 V
10
9
8
7
2.38
CL = 15 pF
2.36
−40
−20
0
20
40
60
80
Free−Air Temperature (°C)
100
6
−40
120
Figure 20. VCC Undervoltage Threshold
vs Free Air Temperature
10
35
60
85
110
Free−Air Temperature (°C)
135 150
G008
Figure 21. M-Grade Propagation Delay Time
vs Free Air Temperature
28
1
tPLH at 3.3 V
tPHL at 3.3 V
tPLH at 5 V
tPHL at 5 V
26
0.9
Pk-Pk Output Jitter (ns)
Propagation Delay Time (ns)
−15
G007
24
22
20
18
−20
0
20
40
60
80
100
Free−Air Temperature (°C)
120
0.7
0.6
0.5
0.4
0.3
0.2
VCC = 5 V
VCC = 3.3 V
0.1
CL = 15 pF
16
−40
0.8
0
140
0
20
40
G106
Figure 22. C-Grade Propagation Delay Time
vs Free Air Temperature
TA = 25°C
CL = 15 pF
All Channels Switching
Typ Jitter on output pin shown
60
80
100 120
Data Rate (Mbps)
140
160
180
G009
Figure 23. M-Grade Output Jitter vs Data Rate
1.4
Pk-Pk Output Jitter (ns)
1.2
1
0.8
0.6
0.4
0.2
0
VCC = 3.3 V
VCC = 5 V
0
5
TA = 25°C
CL = 15 pF
All Channels Switching
Typ Jitter on output pin shown
10
15
Data Rate (Mbps)
20
25
G107
Figure 24. C-Grade Output Jitter vs Data Rate
Copyright © 2012, Texas Instruments Incorporated
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Product Folder Links: ISO7631FM ISO7631FC ISO7640FC ISO7641FC
23
ISO7631FM, ISO7631FC
ISO7640FC, ISO7641FC
SLLSEC3A – SEPTEMBER 2012 – REVISED SEPTEMBER 2012
www.ti.com
TYPICAL CHARACTERISTICS (continued)
TA = 25 oC, CL = 15 pF
TA = 25 oC, CL = 15 pF
VCC1 = V CC2 = 5 V
VCC1 = V CC2 = 3.3 V
16
Pattern: NRZ 2 -1
Pattern: NRZ 216-1
Figure 25. M-Grade Typical Eye Diagram at 150 Mbps,
5 V Operation
Figure 26. M-Grade Typical Eye Diagram at 150 Mbps,
3.3 V Operation
Figure 27. C-Grade Typical Eye Diagram at 25 Mbps, 5 V
Operation
Figure 28. C-Grade Typical Eye Diagram at 25 Mbps, 3.3 V
Operation
spacer
REVISION HISTORY
Changes from Original (September 2012) to Revision A
Page
•
Changed Description text From: "applications where input noise pulses of less than 10 ns duration..."
To:"applications where input noise pulses of less than 6 ns duration..." .............................................................................. 1
•
Changed Input PU in the Function table From: Z To: 'Undetermined .................................................................................. 2
•
Added note "Product Preview" to ISO7640FC ..................................................................................................................... 3
24
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PACKAGE OPTION ADDENDUM
www.ti.com
26-Nov-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package Qty
Drawing
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Samples
(3)
(Requires Login)
ISO7631FCDW
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
ISO7631FCDWR
ACTIVE
SOIC
DW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
ISO7631FMDW
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
ISO7631FMDWR
ACTIVE
SOIC
DW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
ISO7641FCDW
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
ISO7641FCDWR
ACTIVE
SOIC
DW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
26-Nov-2012
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Dec-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
ISO7631FCDWR
SOIC
DW
16
2000
330.0
16.4
10.75
10.7
2.7
12.0
16.0
Q1
ISO7631FMDWR
SOIC
DW
16
2000
330.0
16.4
10.75
10.7
2.7
12.0
16.0
Q1
ISO7641FCDWR
SOIC
DW
16
2000
330.0
16.4
10.75
10.7
2.7
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Dec-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
ISO7631FCDWR
SOIC
DW
16
2000
367.0
367.0
38.0
ISO7631FMDWR
SOIC
DW
16
2000
367.0
367.0
38.0
ISO7641FCDWR
SOIC
DW
16
2000
367.0
367.0
38.0
Pack Materials-Page 2
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