– E T E L O S B O – DN2640 Preliminary N-Channel Depletion-Mode Vertical DMOS FETs Ordering Information BVDSX / BVDGX RDS(ON) (max) IDSS (min) 400V 6.0Ω 300mA Order Number / Package TO-92 Die DN2640N3 DN2640ND Advanced DMOS Technology Features These depletion-mode (normally-on) transistors utilize an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. High input impedance Low input capacitance Fast switching speeds Low on resistance Free from secondary breakdown Low input and output leakage Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Applications Normally-on switches Solid state relays Package Options Converters Linear amplifiers Constant current sources Power supply circuits Telecom Absolute Maximum Ratings Drain-to-Source Voltage BVDSX Drain-to-Gate Voltage BVDGX Gate-to-Source Voltage ± 20V Operating and Storage Temperature Soldering Temperature* SGD TO-92 -55°C to +150°C 300°C * Distance of 1.6 mm from case for 10 seconds. Note: See Package Outline section for dimensions. 8-13 8 DN2640 Thermal Characteristics ID (continuous)* Package TO-92 ID (pulsed) 250mA Power Dissipation @ TC = 25°C θjc θja °C/W °C/W 1.0W 125 170 600mA IDR* IDRM 250mA 600mA – E T E L O S B O – Electrical Characteristics * ID (continuous) is limited by max rated Tj. (@ 25°C unless otherwise specified) Symbol Parameter Min BVDSX Drain-to-Source Breakdown Voltage 400 VGS(OFF) Gate-to-Source OFF Voltage –1.0 ∆VGS(OFF) Typ Max Unit Conditions V VGS = -5V, ID = 1.0mA –3.5 V VDS = 25V, ID= 10µA Change in VGS(OFF) with Temperature 4.5 mV/°C VDS = 25V, ID= 10µA IGSS Gate Body Leakage Current 100 nA VGS = ± 20V, VDS = 0V ID(OFF) Drain-to-Source Leakage Current 10 µA VGS = -10V, VDS = Max Rating 1.0 mA VGS = -10V, VDS = 0.8 Max Rating TA = 125°C mA VGS = 0V, VDS = 25V IDSS Saturated Drain-to-Source Current RDS(ON) Static Drain-to-Source ON-State Resistance 6.0 Ω VGS = 0V, ID = 150mA ∆RDS(ON) Change in RDS(ON) with Temperature 1.1 %/°C VGS = 0V, ID = 150mA GFS Forward Transconductance CISS Input Capacitance 750 COSS Common Source Output Capacitance 75 CRSS Reverse Transfer Capacitance 15 td(ON) Turn-ON Delay Time 15 tr Rise Time 20 td(OFF) Turn-OFF Delay Time 25 tf Fall Time 25 VSD Diode Forward Voltage Drop 1.8 trr Reverse Recovery Time 300 Ω 300 m 800 ID = 200mA, VDS = 10V VGS = -10V, VDS = 25V pF f = 1 MHz VDD = 25V, ns ID = 200mA, RGEN = 10Ω V VGS = -10V, ISD = 200mA ns VGS = -10V, ISD = 1.0A Notes: 1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. VDD Switching Waveforms and Test Circuit RL 0V 90% PULSE GENERATOR INPUT -10V 10% t(ON) td(ON) Rgen t(OFF) tr td(OFF) OUTPUT tF D.U.T. VDD 10% INPUT 10% OUTPUT 0V 90% 90% 8-14