FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator Features Description Over 95% efficiency The FAN2106 TinyBuckTM is an easy-to-use, cost and space-efficient, synchronous buck solution. It enables designers to solve high current requirements in a small area with minimal external components. Integrated low-side Schottky diode Internal power MOSFETs: High-side RDS(ON) = 30mΩ Low-side RDS(ON) = 14mΩ External programming of clock frequency, current limit, and loop response allows for optimization and flexibility selecting output filter components and transient response. Programmable frequency operation The summing current mode modulator uses lossless current sensing for current feedback and over-current, and includes voltage feedforward. Power-good signal Wide input range: 3.0V to 24V Output voltage range: 0.8V to 90%VIN Fairchild’s advanced BiCMOS power process, combined with a thermally efficient MLP package, provides lowRDS(ON) internal MOSFETs and the ability to dissipate high power in a small package. Input under-voltage lockout (UVLO) Programmable over-current protection Under-voltage, over-voltage, and thermal protection Selectable light-load power-saving mode 5x6mm, 25-pin, 3-pad MLP Under-voltage, thermal shutdown, and power-good are blanked at start-up, but protect the device from damage during fault conditions. Applications Thin and light Notebook PCs Graphics cards Battery-powered equipment Set-top box Point-of-load regulation Ordering Information Operating Part Number Temperature Range Pb-Free Package Packing Method FAN2106MPX -10°C to 85°C Yes Molded Leadless Package (MLP) 5x6mm Tape and Reel FAN2106EMPX -40°C to 85°C Yes Molded Leadless Package (MLP) 5x6mm Tape and Reel © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator April 2007 Figure 1. Typical Application Block Diagram FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator Typical Application Diagram Figure 2. Block Diagram © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 2 Figure 3. MLP 5x6mm Pin Configuration (PCB Layout View) Pin Definitions Pin Name Description P1, 6-12 SW P2, 2-5 PVIN Power Input Voltage. Connect to the main input power source. P3, 21-23 PGND Power Ground. Power return and Q2 source. 1 BOOT High-Side Drive BOOT Voltage. Connect through capacitor (CBOOT) to SW. The IC includes an internal synchronous bootstrap diode to recharge the capacitor on this pin to VCC when SW is LOW. 13 PGOOD Power-Good Flag. An open-drain output that pulls LOW when FB is outside a ±10% range of the reference when EN is HIGH. PGOOD does not assert HIGH until the fault latch is enabled. 14 EN ENABLE. Enables operation when pulled to logic HIGH or left open. Toggling EN resets the regulator after a latched fault condition. This input has an internal pull-up when the IC is functioning normally. When a latched fault occurs, EN is discharged by a current sink. 15 VCC 16 AGND 17 ILIM Current Limit. A resistor (RILIM) from this pin to AGND can be used to program the currentlimit trip threshold lower than the default setting. 18 R(T) Oscillator Frequency. A resistor (RT) from this pin to AGND sets the PWM switching frequency. 19 FB 20 COMP Compensation. Error amplifier output. Connect the external compensation network between this pin and FB. 24 PWM# / VOUT Forced PWM / VOUT. Connect to VOUT to enable light-load, power-saving mode of operation. Connect to GND or leave open for PWM mode. 25 RAMP Ramp Amplitude. A resistor (RRAMP) connected from this pin to PVIN sets the ramp amplitude and provides voltage feedforward functionality. Switching Node. FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator Pin Assignments Input Bias Supply for IC. The IC’s logic and analog circuitry are powered from this pin. Analog Ground. The signal ground for the IC. All internal control voltages are referred to this pin. Tie this pin to the ground island/plane through the lowest impedance connection. Output Voltage Feedback. Connect through a resistor divider to the output voltage. © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Parameter Conditions Min. Max. Unit 28 V 6 V PVIN to PGND VCC to AGND AGND = PGND BOOT to PGND BOOT to SW SW to PGND Continuous 35 V -0.3 6 V -0.5 24 V Transient (t < 20nsec, F < 600KHz) All other pins -5 30 V -0.3 VCC+0.3 V Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Conditions Min. Typ. Max. Unit 5.0 5.5 V VCC Bias Voltage VCC to AGND 4.5 VIN Supply Voltage PVIN to PGND 3 24 V TA Ambient Temperature FAN2106M -10 85 °C FAN2106EM -40 85 °C TJ Junction Temperature 125 °C Max. Unit Thermal Information Symbol TSTG Parameter Min. 150 °C TL Lead Soldering Temperature, 10 seconds 300 °C TVP Vapor Phase, 60 seconds 215 °C TI Infrared, 15 seconds 220 °C θJC Thermal Resistance: Junction-to-Case θJ-PCB PD Storage Temperature Typ. -65 P1 (Q2) 4 P2 (Q1) 7 °C/W P3 4 °C/W Thermal Resistance: Junction-to-Mounting Surface °C/W 35(1) °C/W (1) Power Dissipation, TA = 25°C FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator Absolute Maximum Ratings 2.8 W Note: 1. Typical thermal resistance when mounted on a four-layer, two-ounce PCB, as shown in Figure 25. Actual results are dependent on mounting method and surface related to the design. © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 4 Recommended operating conditions are the result of using the circuit shown in Figure 1 unless otherwise noted. Parameter Conditions Min. Typ. Max. Unit 8 12 mA Power Supplies SW = Open, FB = 0.7V, VCC = 5V, FSW = 600KHz VCC Current Shutdown: EN=0, VCC = 5V Power Saving Mode, VCC = 5V, FMIN VCC UVLO Threshold Rising VCC 4.1 7 10 µA 2.2 4.5 mA 4.3 4.5 V Hysteresis 300 mV N-Channel (Q1) RDS(ON) VCC = 5V, 25°C 30 35 mΩ N-Channel (Q2) RDS(ON) VCC = 5V, 25°C 14 16 mΩ Power Output Section Oscillator Frequency RT = 50KΩ 255 300 345 KHz RT = 24KΩ 540 600 660 KHz 50 65 nsec (2) Minimum On-Time Ramp Amplitude, pk–pk 16VIN, 1.8VOUT, RT = 30KΩ, RRAMP = 200KΩ 0.53 Minimum Off-Time(2) V 100 150 nsec Reference FAN2106M, 25°C 794 800 806 mV FAN2106EM, 25°C 795 800 805 mV DC Gain(2) VCC = 5V 80 85 dB Gain Bandwidth Product(2) VCC = 5V 12 15 MHz Output Voltage (VCOMP) VCC = 5V 0.4 Output Current, Sourcing VCC = 5V, VCOMP = 2.2V 1.5 2.2 mA Output Current, Sinking VCC = 5V, VCOMP = 1.2V 0.8 1.2 mA FB Bias Current VFB = 0.8V, 25°C -850 -650 -450 6 8 10 A -11 -10 -9 µA Reference Voltage (VFB) Error Amplifier 3.2 V FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator Electrical Specifications nA Protection and Shutdown Current Limit RILIM open ILIM Current Over-Temperature Shutdown Die temperature 150 °C Over-Temperature Hysteresis Die temperature Over-Voltage Threshold 2 consecutive clock cycles 110 115 25 120 %VOUT °C Under-Voltage Shutdown 16 consecutive clock cycles 68 73 78 %VOUT Fault Discharge Threshold Measured at FB pin 250 mV Fault Discharge Hysteresis Measured at FB pin (VFB ~500mV) 250 mV Note: 2. Specifications guaranteed by design and characterization; not production tested. © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 5 Recommended operating conditions are the result of using the circuit shown in Figure 1 unless otherwise noted. Parameter Conditions Min. Typ. Max. Unit Soft-Start EN to VOUT Regulation (T0.8) Frequency = 600KHz 3.0 msec EN to Fault Enable/SSOK (T1.0) Frequency = 600KHz 3.3 msec Control Functions EN Threshold, Rising 1.35 EN Hysteresis 250 mV EN Pull-Up Resistance 800 KΩ EN Discharge Current Auto-restart mode 1 FB OK Drive Resistance PGOOD Threshold 2.0 V µA 800 Ω FB < VREF -14 -11 -8 %VFB FB > VREF 107 110 113 %VFB PGOOD Output Low IOUT < 2mA 0.4 V PGOOD Output High VPGOOD = 5V 1 µA 0.6 0.8 V 1.0 1.2 µA PWM# Threshold PWM# Input Current © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 VPWM# = 0.4V FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator Electrical Specifications (Continued) www.fairchildsemi.com 6 1.20 1.005 1.10 I FB V FB 1.010 1.000 0.995 1.00 0.90 0.990 0.80 -50 0 50 100 150 -50 0 Temperature (oC) Figure 4. Reference Voltage (VFB) vs. Temperature, Normalized 150 1.02 1200 1.01 Frequency Frequency (KHz) 100 Figure 5. Reference Bias Current (IFB) vs. Temperature, Normalized 1500 900 600 600KHz 1.00 300KHz 0.99 300 0.98 0 0 20 40 60 80 100 120 -50 140 0 RT (KΩ) 50 100 150 o Temperature ( C) Figure 6. Frequency vs. RT Figure 7. Frequency vs. Temperature, Normalized 1.04 1.60 1.40 1.02 1.20 I ILIM RDS 50 Temperature (oC) FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator Typical Characteristics 1.00 o Q1 ~0.32 %/ C 0.80 1.00 0.98 Q2 ~0.35 %/oC 0.96 0.60 -50 0 50 100 150 -50 50 100 150 Temperature ( C) Temperature ( C) Figure 9. Figure 8. RDS vs. Temperature, Normalized (VCC = VGS = 5V) © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 0 o o ILIM Current (IILIM) vs. Temperature, Normalized www.fairchildsemi.com 7 FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator Application Circuit Figure 10. Application Circuit: 1.8VOUT, 500KHz Typical Performance Characteristics 100 1400 95 1200 Dissipation (mW) Efficiency (%) Typical operating characteristics using the circuit shown in Figure 10. VIN=16V, VCC=5V, unless otherwise specified. 90 85 80 8VIN 12VIN 18VIN 75 1000 800 600 400 8VIN 12VIN 18VIN 200 Power Saving Mode, 12VIN Power Saving Mode, 12VIN 0 70 0 1 2 3 4 5 0 6 1 2 1.8VOUT Efficiency Over VIN vs. Load 100 100 95 95 90 85 VIN=12V 80 300KHz 500KHz 700KHz 75 4 5 6 Figure 12. 1.8VOUT Dissipation Over VIN vs. Load Efficiency (%) Efficiency (%) Figure 11. 3 Load (A) Load (A) 90 8VIN, 300KHz 85 12VIN, 500KHz 80 18VIN, 700KHz 75 70 70 0 1 2 3 4 5 0 6 2 3 4 5 6 Load (A) Load (A) Figure 13. 1.8VOUT Efficiency Over Frequency vs. Load (Circuit Value Changes) © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 1 Figure 14. 3.3VOUT Efficiency vs. Load (Circuit Value Changes) www.fairchildsemi.com 8 Typical operating characteristics using the circuit shown in Figure 10. VIN=16V, VCC=5V, unless otherwise specified. VOUT VOUT SW SW Figure 15. SW and VOUT Ripple, 6A Load Figure 16. SW and VOUT Ripple, 0.3A Load VOUT VOUT IOUT IOUT transition to PWM mode Figure 17. Transient Response, 2-6A Load Figure 18. Transient Response, 0.3-3A Load FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator Typical Performance Characteristics (Continued) VOUT PGOOD EN Figure 19. Start-Up, 3A Load © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 9 The regulator does not allow the low-side MOSFET to operate in full synchronous rectification mode until SS reaches 95% of VREF (~0.76V). This prevents the regulator from discharging the output and ensures that inductor current does not "ratchet" up during the softstart cycle. Application Note AN-6033 — FAN2106 Design Guide includes a spreadsheet design aid to calculate external component values and verify loop stability given the following inputs: Output voltage Input voltage range Maximum output load current Maximum load transient current and maximum allowable output drop during load transient Maximum allowable output ripple Desired switching frequency VCC UVLO or toggling the EN pin discharges the SS and resets the IC. Bias Supply The FAN2106 requires a 5V supply rail to bias the IC and provide gate-drive energy. Connect a >1.0µf X5R or X7R decoupling capacitor between VCC and PGND. Initialization Once VCC exceeds the UVLO threshold and EN is HIGH, the IC checks for an open or shorted FB pin before releasing the internal soft-start ramp (SS). Since VCC is used to drive the internal MOSFET gates, supply current is frequency and voltage dependent. Approximate VCC current (ICC) can be calculated using: If R1 is open, the error amplifier output (COMP) is forced LOW and no pulses are generated. After the SS ramp times out (T1.0), an under-voltage latched fault occurs. ICC(mA ) = 4.58 + [( VCC − 5 + 0.013 ) • (F − 128 )] 227 EQ. 1 where frequency (F) is expressed in KHz. If the parallel combination of R1 and RBIAS is ≤ 1KΩ, the internal SS ramp is not released and the regulator does not start. Setting the Output Voltage The output voltage of the regulator can be set from 0.8V to 90% of VIN by an external resistor divider (R1 and RBIAS in Figure 1). Soft-Start Once SS has charged to 0.8V (T0.8), the output voltage is in regulation. Until SS reaches 1.0V (T1.0), the “Fault Latch” and power-saving mode operations are inhibited. The internal reference is 0.8V with 650nA, sourced from the FB pin to ensure that, if the pin is open, the regulator does not start. To avoid skipping the soft-start cycle, it is necessary to apply PVIN before VCC reaches its UVLO threshold. The external resistor divider is calculated using: V − 0 .8 V 0 .8 V = OUT − 650nA RBIAS R1 Soft-start time is a function of oscillator frequency. EQ. 2 Connect RBIAS between FB and AGND. FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator Circuit Description To minimize noise pickup on the FB node, the values of R1 and RBIAS should be selected to provide a minimum parallel impedance of 1KΩ. Setting the Frequency Oscillator frequency is determined by an external resistor, RT, connected between the R(T) pin and AGND: F(KHz ) = 10 6 ( 65 • R T ) + 135 EQ. 3 where RT is expressed in KΩ. R T ( KΩ ) = Figure 20. Soft-Start Timing Diagram (10 6 / F) − 135 65 EQ. 4 where frequency (F) is expressed in KHz. The regulator can not start if RT is left open. © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 10 Loop Compensation Typically the inductor is set for a ripple current (ΔIL) of 10% to 35% of the maximum DC load. Regulators requiring fast transient response use a value on the high side of this range, while regulators that require very low output ripple and/or use high-ESR capacitors restrict allowable ripple current: The loop is compensated using a feedback network around the error amplifier. Figure 21 shows a complete Type-3 compensation network. Type-2 compensation eliminates R3 and C3. ΔIL = VOUT • (1 - D) L •F EQ. 5 where F is the oscillator frequency, and L= VOUT • (1 - D) ΔIL • F EQ. 6 Setting the Ramp Resistor Value The internal ramp voltage excursion (ΔVRAMP) during tON should be set to 0.6V. RRAMP is approximately: RRAMP(KΩ ) = ( VIN − 1.8) • VOUT 18 x10 − 6 • VIN • F −2 Figure 21. Compensation Network Since the FAN2106 employs summing current-mode architecture, Type-2 compensation can be used for many applications. For applications that require wide loop bandwidth and/or use very low-ESR output capacitors, Type-3 compensation may be required. The AN-6033 spreadsheet calculator can be used to calculate these component values. EQ. 7 where frequency (F) is expressed in KHz. Setting the Current Limit The FAN2106 uses its internal low-side MOSFET as the current-sensing element. The current-limit threshold voltage (VILIM) is compared to the voltage drop across the low-side MOSFET, sampled at the end of each PWM off-time/cycle. Protection The default threshold (ILIM open) is temperature compensated. An internal “Fault Latch” is set for any fault intended to shut down the IC. When the fault latch is set, the IC discharges VOUT by enhancing the low-side MOSFET until FB<0.25V. The MOSFET is not turned on again unless FB>0.5V. This behavior discharges the output without causing undershoot (negative output voltage). The converter output is monitored and protected against extreme overload, short-circuit, over-voltage, and undervoltage conditions. The 10µA current sourced from the ILIM pin can be used to establish a lower, temperature–dependent, current-limit threshold by connecting an external resistor (RILIM) to AGND: RILIM(KΩ) = 0.45 • RDS • K T • (IOUT − ΔIL ) + 142.5 2 EQ. 8 0.25/0.5V FB where: I = desired current limit set point in Amps, RDS is expressed in mΩ, KT = the normalized temperature coefficient of the low-side MOSFET (Q2) from Figure 8. FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator Calculating the Inductor Value FAULT PWM GATE DRIVE PWM LATCH Figure 22. Latched Fault Response Under-Voltage Shutdown After 16 consecutive, pulse-by-pulse, current-limit cycles, the fault latch is set and the regulator shuts down. Cycling VCC or EN restores operation after a normal soft-start cycle (refer to Auto-Restart section). If FB remains below the under-voltage threshold for 16 consecutive clock cycles, the fault latch is set and the converter shuts down. This fault is prevented from setting the fault latch during soft-start. The over-current protection fault latch is active during the soft-start cycle. Over-Voltage Protection / Shutdown If FB exceeds 115% • VREF for two consecutive clock cycles, the fault latch is set and shutdown occurs. A shorted high-side MOSFET condition is detected when SW voltage exceeds ~0.7V while the low-side © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 11 Power-Saving Mode These two fault conditions are allowed to set the fault latch at any time, including during soft-start. The FAN2106 maintains high efficiency at light load by changing to a discontinuous constant peak current, power-saving mode (PSM). Auto-Restart The transition to power-saving mode occurs when the load is <ΔIL/2 for eight consecutive clock cycles. After a fault, EN is discharged with 1µA to a 1.1V threshold before the 800KΩ pull-up is restored. A new soft-start cycle begins when EN charges above 1.35V. In power-saving mode, a constant peak inductor current (ΔILPSM) is generated each on-cycle. ΔILPSM is nominally 35% larger than PWM mode inductor ripple (ΔIL). Depending on the external circuit, the FAN2106 can be provisioned to remain latched-off or automatically restart after a fault. During power-saving mode, the output is regulated to a slightly higher value than its set point, since the current pulse is triggered when FB crosses VREF. Table 1. Fault / Restart Provisioning EN pin Controller / Restart State Pull to GND OFF (disabled) VCC No restart – latched OFF Open Immediate restart after fault Cap to GND New soft-start cycle after: tDELAY (msec) = 3.9 • C(nf) The IC is prevented from switching in the audible band. If the FB pin has not dropped to VREF within 40µsec of the last pulse, the IC sinks current through the inductor to initiate a new cycle. Transition back to PWM mode is achieved when a load transient causes the output voltage to drop 1.5% below its regulation point. 1.88 With EN left open, restart is immediate. Increasing Load 1.86 If auto-restart is not desired, tie the EN pin to the VCC pin or drive it with a logic gate to keep the 1µA current sink from discharging EN to 1.1V. VOUT (V) Decreasing Load 1.84 1.82 Forced PWM 1.80 1.78 0 1 2 3 4 5 6 Load (A) Figure 24. Power-Saving Mode Regulation (Using Figure 10 Circuit) Power-saving mode operation is defeated by connecting the PWM# pin to AGND, allowing only PWM operation. The PWM# pin has a 1µA pull-down. If <0.6V is detected, power-saving mode operation is disabled. FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator MOSFET is fully enhanced. The fault latch is set immediately upon detection. PCB Layout Figure 23. Fault Latch with Delayed Auto-Restart Over-Temperature Protection The chip incorporates an over-temperature protection circuit that sets the fault latch when a die temperature of about 150°C is reached. The IC is allowed to restart when the die temperature falls below 125°C. Power Good (PGOOD) Signal PGOOD is an open-drain output that asserts LOW when VOUT is out of regulation, as measured at the FB pin. Thresholds are specified in the Electrical Specifications section. PGOOD does not assert HIGH until the fault latch is enabled (T1.0). © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 Figure 25. Recommended PCB Layout www.fairchildsemi.com 12 Dimensions are in millimeters (inches) unless otherwise noted. 6.57 3.28 0.65 6.0 0.10 C 2X 0.32 0.85 0.68 2.45 2.78 2.88 1.49 2.02 5.57 5.0 3.44 0.43 2.95 2.51 1.22 2.06 2.20 1.51 1.00 0.10 C 2X TOP VIEW RECOMMENDED LAND PATTERN ALL DIMENSIONS NOMINAL 0.80 MAX 0.10 C (0.20) 0.08 C 0.05 0.00 SIDE VIEW SEATING PLANE 2.20 1.51 1 1.22 8 9 25 3.44 2.02 0.65 FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator Physical Dimensions 12 21 20 13 0.25~0.35 0.65 0.10 0.05 2.88 C A B C BOTTOM VIEW A. DIMENSIONS ARE IN MILLIMETERS. B. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 C. ENGINEERING DRAWING ONLY, CHANGES MAY OCCUR MLP25ArevA Figure 26. 5x6mm Molded Leadless Package (MLP) © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 13 FAN2106 — TinyBuck™ 6A, 24V Input Integrated Synchronous Buck Regulator © 2006 Fairchild Semiconductor Corporation FAN2106 Rev. 1.0.1 www.fairchildsemi.com 14