ATMEL AT88SC0204CA Cryptomemory specification for standard mode of operation Datasheet

Features
• One of a Family of Devices with User Memories from 1 Kbit to 8-Kbit
• EEPROM User Memory
•
•
•
•
•
– Four or Eight Zones
– Self-timed Write Cycles
– Single-Byte or Multiple-Byte Page-Write Modes
– Programmable Access Rights for Each Zone
2-Kbit Configuration Zone
– 37-byte OTP Area for User-defined Codes
– 160-byte Area for User-defined Keys and Passwords
High Security Features
– 64-bit Mutual Authentication Protocol (under license of ELVA)
– Cryptographic Message Authentication Codes (MAC)
– Stream Encryption
– Four Key Sets for Authentication and Encryption
– Eight Sets of Two 24-bit Passwords
– Anti-tearing Function
– Voltage and Frequency Monitor
Embedded Application Features
– Low Voltage Operation: 2.7V to 3.6V
– Secure Nonvolatile Storage for Sensitive System or User Information
– 2-wire Serial Interface
– 1.0 MHz Compatibility for Fast Operation
– Standard 8-lead Plastic Packages
– Same Pinout as 2-wire Serial EEPROM's
Smart Card Features
– ISO 7816 Class B (3V) Operation
– ISO 7816-3 Asynchronous T = 0 Protocol (Gemplus® Patent)
– Multiple Zones, Key Sets and Passwords for Multi-application Use
– Synchronous 2-wire Serial Interface for Faster Device Initialization
– Programmable 8-byte Answer-To-Reset Register
– ISO 7816-2 Compliant Modules
High Reliability
– Endurance: 100,000 Cycles
– Data Retention: 10 years
– ESD Protection: 2,000V
CryptoMemory
Specification
for Standard
Mode of
Operation
AT88SC0104CA
AT88SC0204CA
AT88SC0404CA
AT88SC0808CA
5221A–CRYPT–10/08
AT88SCXXXXCA
Table of Contents
1
Pin Configuration and Package Information ......................................... 4
1.1 Pin Configuration .....................................................................................................4
1.2 Package Information ...............................................................................................4
2
Description ............................................................................................... 5
2.1 Differences from AT88SCxxxxC family of Products ................................................5
2.2 Embedded Applications ..........................................................................................5
2.3 Smart Card Applications ..........................................................................................5
2.4 Purpose and Scope of This Document ....................................................................5
3
Block Diagram .......................................................................................... 6
4
Pin Description ......................................................................................... 7
4.1 Supply Voltage (VCC) .............................................................................................7
4.2 Clock (SCL/CLK) .....................................................................................................7
4.3 Serial Data (SDA/IO) ...............................................................................................7
4.4 Reset (RST) ............................................................................................................7
4.5 Detailed Description ................................................................................................7
4.6 User Memory ...........................................................................................................7
4.7 Control Logic .........................................................................................................11
4.8 Configuration Memory ...........................................................................................11
5
Communication Security Modes .......................................................... 14
5.1 Security Operations ...............................................................................................14
5.2 Configuration Memory Values ...............................................................................18
5.3 SME – Supervisor Mode Enable ...........................................................................19
5.4 UCR – Unlimited Checksum Reads ......................................................................19
5.5 UAT – Unlimited Authentication Trials ...................................................................19
5.6 ETA – Eight Trials Allowed ....................................................................................19
5.7 CS0 – CS3: Programmable Chip Select (only relevant in synchronous protocol) .20
5.8 Security Fuses ......................................................................................................23
6
Protocol Selection ................................................................................. 25
7
Synchronous Protocol .......................................................................... 26
7.1 Start-up Sequence ................................................................................................26
7.2 Command Set .......................................................................................................27
7.3 Command Format .................................................................................................27
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7.4 Acknowledge Polling ............................................................................................29
7.5 Device Addressing ................................................................................................30
7.6 Command Descriptions .........................................................................................30
7.7 Write User Zone: $B0 ............................................................................................31
7.8 Random read: $B1 ................................................................................................32
7.9 Read User Zone: $B2 ............................................................................................33
7.10 System Write: $B4 ...............................................................................................34
7.11 System Read: $B6 ..............................................................................................36
7.12 Verify Password: $BA ..........................................................................................37
8
Initialization Example ............................................................................ 38
8.1 Write Data to User Zones ......................................................................................38
8.2 Unlock Configuration Zone ....................................................................................38
8.3 Write Data to Configuration Zone ..........................................................................38
8.4 Set Security Fuses ................................................................................................38
9
Asynchronous T=0 Protocol ................................................................. 41
9.1 Character format ...................................................................................................41
9.2 Command format ...................................................................................................41
9.3 Command Set .......................................................................................................42
9.4 Command Descriptions .........................................................................................44
9.5 System READ: $B6 ...............................................................................................48
10 Initialization Example ............................................................................ 50
10.1 Write Data to User Zones ....................................................................................50
10.2 Unlock Configuration Zone ..................................................................................50
10.3 Write Data to Configuration Zone ........................................................................50
10.4 Set Security Fuses ..............................................................................................50
11 Absolute Maximum Ratings .................................................................. 53
11.1 DC and AC Characteristics .................................................................................54
11.2 Timing Diagrams for Synchronous Communications ..........................................55
12 Electrical Characteristics ...................................................................... 57
12.1 Tamper Detection ................................................................................................57
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1. Pin Configuration and Package Information
1.1
Pin Configuration
Table 1-1.
Pin Configuration
Pad
Description
ISO Module Contact
Standard Package Pin
TSSOP
VCC
Supply Voltage
C1
8
8
GND
Ground
C5
4
1
SCL\CLK
Serial Clock Input
C3
6
6
SDA\IO
Serial Data Input/Output
C7
5
3
RST
Reset Input
C2
NC
NC
1.2
Package Information
Figure 1-1.
CryptoMemory Packages
Smart Card Module
VCC=C1
C5=GND
RST=C2
C6=NC
SCL/CLK=C3
NC=C4
C7=SDA/IO
C8=NC
8-lead TSSOP
8-lead SOIC, PDIP
NC
NC
NC
GND
1
2
3
4
8
7
6
5
VCC
NC
1
NC
NC
2
SCL
SDA
SDA GND
8
VCC
7
NC
3
6
SCL
4
5
NC
8-Lead TSSOP
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2. Description
The AT88SCxxxxCA is a family of 4 high-performance secure memory devices providing 1K to
8K bits of user memory with advanced built-in security and cryptographic features. The memory
is divided into 4 or 8 user zones each of which may be individually set with different security
access rights or used together to provide space for one or multiple data files. A configuration
zone contains registers to define the security rights for each user zone and space for passwords
and secret keys used by the security logic of CryptoMemory.
Through dynamic, symmetric-mutual authentication, data encryption, and the use of encrypted
checksums, CryptoMemory provides a secure place for storage of sensitive information within a
system. With its tamper protection circuits, this information remains safe even under attack.
CryptoMemory also provides high security, low cost and ease of implementation of host-client
type systems without the need for a microprocessor operating system. The embedded cryptographic engine provides for a dynamic, symmetric-mutual authentication between the device
and host, as well as performs stream encryption for all data and passwords exchanged between
the device and host. Up to four unique key sets may be used for these operations.
2.1
Differences from AT88SCxxxxC family of Products
The key differentiating feature of the AT88SCxxxxCA family of memory devices from
AT88SCxxxxC family is support for hardware implementation of the TWI READ command. Support for this TWI hardware command allows for faster application development and also permits
greater device versatility. In addition, AT88SCxxxxCA offers a RANDOM READ command
whereby given a starting address, the user can clock unlimited number of bytes from the device
up to the memory capacity. Last but not least, the AT88SCxxxxCA family of devices specifically
targets low voltage and low power applications.
2.2
Embedded Applications
A 2-wire serial interface running at 1.0 MHz is used for fast and efficient communications with up
to 15 devices that may be individually addressed. CryptoMemory is available in industry standard 8-lead packages with the same familiar pin layout as 2-wire serial EEPROM’s supporting
only the synchronous communications protocol.
Note:
2.3
TSSOP Pinout not the same.
Smart Card Applications
CryptoMemory offers the ability to communicate with virtually any smart card reader using the
asynchronous T=0 protocol defined in ISO 7816-3. All CryptoMemory devices in smart card
module form will also communicate using a synchronous 2-wire serial interface.
2.4
Purpose and Scope of This Document
This document covers only the Standard Mode of operation of CryptoMemory. The other modes
of operation are the Authentication and Encryption Modes. This document provides all the information needed to utilize CryptoMemory in the Standard Mode. The scoping of this document
allows for free distribution without formal requirements of any user agreements and serves the
purpose of developing applications using only the Standard Mode of operation. Documents containing detailed description of the cryptographic technology, operation and function of the
Authentication and Encryption Modes of CryptoMemory are secure and so only available under
Non-Disclosure and Limited Licensing Agreements (NDA and LLA). Contact your local Atmel
sales office to obtain these secure documents.
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3. Block Diagram
Power
Management
Authentication,
Encryption and
Certification Unit
Synchronous
Interface
Data Transfer
SCL
SDA
Asynchronous
ISO Interface
Password
Verification
RST
Reset Block
Answer to Reset
VCC
GND
EEPROM
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4. Pin Description
4.1
Supply Voltage (VCC)
The VCC input is a 2.7V to 3.6V positive voltage supplied by the host.
4.2
Clock (SCL/CLK)
In the asynchronous T=0 protocol, the SCL/CLK input is used to provide the device with a carrier
frequency f. The nominal length of one bit emitted on I/O is defined as an "elementary time unit"
(etu) and is equal to 372/f. When the synchronous protocol is used, the SCL/CLK input is used
to clock data in on the positive clock edge and clock data out on the negative clock edge.
4.3
Serial Data (SDA/IO)
The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be
wired with any number of other open drain or open collector devices. An external pull up resistor
should be connected between SDA and VCC, a nominal value of 4.7K ohm may be used. The
value of this resistor and the system capacitance loading the SDA bus will determine the rise
time of SDA. This rise time will determine the maximum frequency during Read operations. Low
value pull up resistors will allow higher frequency operations while drawing higher average
power supply current.
4.4
Reset (RST)
CryptoMemory provides an ISO 7816-3 compliant asynchronous Answer-To-Reset (ATR)
sequence. When the reset sequence is activated, the device will output the data programmed
into the 64-bit answer to reset register. When RST is low, all internal logic, access rights and
write cycles are in reset, except the asynchronous mode activation flag. A weak internal pull-up
on the RST input pad allows the device to be used in synchronous mode without bonding RST.
For synchronous only smart card applications an external pull-up on RST is recommended to
ensure synchronous operation under any system timings or conditions. CryptoMemory does not
support a synchronous answer to reset sequence. The RST input is not available in the plastic
package options for CryptoMemory.
4.5
Detailed Description
To enable the security features of CryptoMemory, personalize the device by setting up registers
and loading appropriate passwords and keys. This is accomplished though programming the
configuration zone of CryptoMemory using simple write and read commands. To gain access to
the configuration zone, the secure code (write 7 password) must be successfully presented.
After writing and verifying data in the configuration zone, the security fuses must be blown to
lock this information in the device. For additional information on personalizing CryptoMemory,
please see the examples in the protocol sections of this specification.
4.6
User Memory
The EEPROM user memory is divided into 4 or 8 user zones. Multiple zones allow for the storage of different data types or files in different zones. Access to user zones is possible only after
meeting security requirements. The customer defines these security requirements in the configuration zone during device personalization. When the same security requirements define access
to multiple zones, the zones effectively serve as one large storage area albeit with the requirement to select each zone prior to access.
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AT88SCXXXXCA
Table 4-1.
AT88SC0104CA User Memory
Zone
$0
$1
$2
$3
$4
$5
$6
$7
$00
User 0
-
32 Bytes
$18
$00
User 1
-
32 Bytes
$18
$00
User 2
-
32 Bytes
$18
$00
User 3
-
32 Bytes
$18
Note:
Page size = 16 bytes.
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Table 4-2.
AT88SC0204CA User Memory
Zone
$0
$1
$2
$3
$4
$5
$6
$7
$00
User 0
-
64 Bytes
$38
$00
User 1
-
64 Bytes
$38
$00
User 2
-
64 Bytes
$38
$00
User 3
-
64 Bytes
$38
Note:
9
Page size = 16 bytes.
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
Table 4-3.
AT88SC0404CA User Memory
Zone
$0
$1
$2
$3
$4
$5
$6
$7
$00
User 0
-
128 Bytes
$78
$00
User 1
-
128 Bytes
$78
$00
User 2
-
128 Bytes
$78
$00
User 3
-
128 Bytes
$78
Note:
Page size = 16 bytes.
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Table 4-4.
AT88SC0404CA User Memory
Zone
$0
$1
$2
$3
$4
$5
$6
$7
$00
User 0
-
128 Bytes
$78
User 1
User 6
$00
-
128 Bytes
$78
$00
User 7
-
128 Bytes
$78
Note:
Page size = 16 bytes.
4.7
Control Logic
Access to the user zones occurs only through the control logic built into the device. This logic is
configurable through access registers, key registers and keys programmed into the configuration
memory during device personalization. Also implemented in the control logic is a cryptographic
engine for performing the various higher-level security functions of the device.
4.8
Configuration Memory
The configuration memory consists of 2048 bits of EEPROM memory used for storing passwords, keys, codes and defining security levels to be used for each User Zone. The control logic
defines access rights to the configuration memory and the user may not alter these rights. The
access rights include the ability to program certain portions of the configuration memory and
then lock the data written through use of Security Fuses. The configuration memory for each
CryptoMemory device is identical with the exception of the number of Access Registers and
Password/Key Registers available. Devices with 4 user zones have four sets of registers, and
those with 8 user zones 8 sets of registers. Unused memory space in the register region
becomes reserved to ensure other components of the configuration memory remain at the same
address location regardless of the number of user zones in a device.
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Table 4-5.
AT88SC0104CA, 0204CA, 0404CA Configuration Memory
$0
$1
$2
$3
$00
$08
$4
$5
$6
$7
Answer To Reset
Fab Code
MTZ
Information
Card Manufacturer Code
Read Only
$10
Lot History Code
$18
DCR
$20
AR0
Identification Number Nc
PR0
AR1
PR1
AR2
PR2
AR3
PR3
$28
$30
Access
Control
Reserved
$38
$40
Issuer Code
$48
$50
$58
$60
$68
Reserved for Authentication and Encryption
Cryptography
Reserved for Authentication and Encryption
Secret
$70
$78
$80
$88
$90
$98
$A0
$A8
$B0
PAC
Write 0
PAC
Read 0
$B8
PAC
Write 1
PAC
Read 1
$C0
PAC
Write 2
PAC
Read 2
$C8
Password
$D0
$D8
$E0
$E8
PAC
Write 7
PAC
Read 7
$F0
Reserved
Forbidden
$F8
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Table 4-6.
AT88SC0808CA Configuration Memory
$0
$1
$2
$3
$00
$08
$4
$5
$6
$7
Answer To Reset
Fab Code
MTZ
Information
Card Manufacturer Code
Read Only
$10
Lot History Code
$18
DCR
Identification Number Nc
$20
AR0
PR0
AR1
PR1
AR2
PR2
AR3
PR3
$28
AR4
PR4
AR5
PR5
AR6
PR6
AR7
PR7
Access
Control
$30
Reserved
$38
$40
Issuer Code
$48
$50
$58
$60
$68
Reserved for Authentication and Encryption
Cryptography
Reserved for Authentication and Encryption
Secret
$70
$78
$80
$88
$90
$98
$A0
$A8
$B0
PAC
Write 0
PAC
Read 0
$B8
PAC
Write 1
PAC
Read 1
$C0
PAC
Write 2
PAC
Read 2
$C8
PAC
Write 3
PAC
Read 3
$D0
PAC
Write 4
PAC
Read 4
$D8
PAC
Write 5
PAC
Read 5
$E0
PAC
Write 6
PAC
Read 6
$E8
PAC
Write 7
PAC
Read 7
Password
$F0
Reserved
Forbidden
$F8
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5. Communication Security Modes
Communication between the device and host operates in three basic modes. Standard mode is
the default mode for the device after power-up. Authentication mode is activated by a successful
authentication sequence. Encryption mode is activated by a successful encryption activation following a successful authentication. Data transferred to and from the device is handled per the
following table.
Table 5-1.
Communication Security Modes
Mode
Configuration Data
User Data
Passwords
Data Integrity Check
Standard
clear
clear
clear
MDC
Authentication
clear
clear
encrypted
MAC
Encryption
clear
encrypted
encrypted
MAC
Notes:
1. Configuration data includes the entire configuration memory except the passwords
2. MDC: Modification Detection Code
3. MAC: Message Authentication Code
5.1
5.1.1
Security Operations
Password Verification
The use of passwords protects read and write accesses to the user zones. Any one of 8 password sets is available for assignment to any user zone through configuration of access registers.
CryptoMemory provides separate 24-bit passwords for read and write operations. Read passwords grant only read accesses to zones under password protection, while write passwords
grant both read and write accesses. Successful presentation of any password renders the verify
password command active until the presentation of another password or device reset. Only one
password may be active at a time. Presenting incorrect passwords decrements the value of the
corresponding password attempts counter (PAC). Decrementing the PAC to $00 permanently
disables the corresponding password and permanently renders the corresponding user zone(s)
under protection inaccessible. Operation in authentication or encryption modes requires encryption of passwords for all password transactions.
Figure 5-1.
Password Verification
CryptoMemory Device
Verify Password
Allow access
Command/Communications
Verify Password
Host Logic
Send Password
encrypted if performed after
Mutual Authentication
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5.1.2
Authentication Protocol
The use of a mutual authentication protocol further protects access to user zones. Any one of 4
key sets is available for assignment to any user zone through configuration of access registers.
Each key set consists of a secret seed, a cryptogram, and a session encryption key. A Verify
Crypto command exists to allow the use of any one of the key sets to enter authentication mode.
Each successful entry into authentication mode renders the mode active for the current key set
until the next call to the Verify Crypto command or device reset. Only one key set may be active
at anytime. Unsuccessful calls of the Verify Crypto command exits authentication mode and decrements the value of the authentication attempts counter (AAC) register. Decrementing AAC to
$00 permanently disables the corresponding key set and permanently renders the corresponding user zone(s) under protection inaccessible.
Entry into authentication mode is a process through which the host and CryptoMemory device
mutually authenticate one another. First, the host generates a 64-bit random number, reads a
current cryptogram and identification information from the device, and uses this information in
conjunction with the corresponding secret seed to generate a 64-bit challenge for the device.
The host also generates a new cryptogram and session encryption key in the process. The host
then sends the challenge and random number to the device by calling the Verify Crypto command. The device utilizes the random number from the host to generate its own challenge, new
cryptogram and session encryption key. It then compares the challenge to the one from the host.
If the challenges match, then the device declares the host authentic, overwrites its corresponding current cryptogram and session encryption key with the new ones. To complete the mutual
authentication, the host reads the new cryptogram from the device and compares it with its new
cryptogram. The new cryptogram from the device serves as a challenge to the host. If the cryptograms match then the device is authentic. Only an authentic pair of host and device can
generate the same challenges and cryptograms. Activating mutual authentication requires the
use of the Verify Authentication variant of the Verify Crypto command (see 9: CryptoMemory
Command Set).
Figure 5-2.
The Mutual Authentication Process
CryptoMemory Device
Command/Communications
Device Info, Cryptogram
[Secret Seed]
Read Config Zone
Host Logic
Read Device Info, Cryptogram
Compute Secret Seed
Generate Random Number
Compute Challenge A
Verify Authentication
Verify Challenge A
Compute Challenge A
Compute Challenge B
Compute Session Key
Compute Challenge B
Read Config Zone
Compute Session Key
Allow Access
15
Read Chellenge B
Verify Chellenge B
Allow Access
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AT88SCXXXXCA
5.1.3
Data Encryption
CryptoMemory allows the use of encryption between a host system and the CryptoMemory
device to protect the confidentiality of data during read-write accesses and verify password
operations. To enable encryption, the host must generate a challenge using the session encryption key generated from the authentication activation step. The host then needs to call the Verify
Crypto command again with the device still in active authentication mode. The session encryption key must belong to the active authentication key set. The host may enable encryption at
anytime after which data content of communication between host and device user zones
becomes encrypted. If a user zone configuration in the Access Register requires encryption,
however, then the host must enter encryption mode and must encrypt all data content to and
from the zone in the remainder of the active encryption session in order to communicate with the
zone. CryptoMemory does not encrypt system zone data except for password and password
attempt counters. Passwords and password attempt counters require encryption during active
authentication or encryption modes.
Each successful entry into encryption mode renders the mode active for the current key set until
the next call to the Verify Crypto command or device reset. Only one key set may be active at
anytime. Unsuccessful calls of the Verify Crypto command exits both encryption and authentication modes and decrements the value of the authentication attempts counter (AAC) register.
Decrementing AAC to $00 permanently disables the corresponding key set and permanently
renders the corresponding user zone(s) under protection inaccessible. Activating encryption is
similar in process to activating authentication with the exception that the session encryption key
replaces the secret seed. The process uses the Verify Encryption variant of the Verify Crypto
command (see 9: CryptoMemory Command Set).
Figure 5-3.
Encryption Activation Process from Active Authentication Mode
CryptoMemory Device
Command/Communications
Session Key, Cryptogram
Generate Random Number
Session Key, Cryptogram
Compute Challenge A
Verify Encryption
Verify Challenge A
Compute Challenge B
Enable Encryption
Host Logic
Compute Challenge A
Compute Challenge B
Read Config Zone
Read Challenge B
Verify Challenge B
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5.1.4
Encrypted Checksum (Message Authentication Code, MAC)
CryptoMemory implements a data validity check function in the form of an encrypted checksum.
This checksum provides a bi-directional data integrity check and data origin authentication capability in the form of a Message Authentication Code (MAC): only the host/device that carried out
a valid authentication is capable of computing a valid MAC. When writing data to the CryptoMemory device in authentication or encryption communication modes, the host must send a valid
checksum immediately following the write command. If the checksum is invalid, the device
rejects the write command and resets the device security privileges. The host must reinitiate
entry into authentication and, if applicable, encryption modes to continue. The use of checksum
is optional when reading data. Calls to the read checksum command resets device security so
its use is recommended only at the completion of all data read operations from the device.
5.1.5
Data Protection Features
Security operations control access to data stored in CryptoMemory. After gaining access, additional options exist to protect data in the user memory.
5.1.6
Modify Forbidden
The Modify Forbidden option renders the user zone read-only by restricting all write operations
to it. It is recommended to program all required data in the user zone prior to enabling this
option. Modify Forbidden is available for any user zone and is selectable by configuring appropriate Access Registers.
5.1.7
Program Only
The Program Only option constrains data bit modification to programming from logic “1” to logic
“0” only. Data bits may never change from logic “0” to logic “1”. Program Only is available for any
user zone and is selectable by configuring appropriate Access Registers.
5.1.8
Write Lock
The Write Lock option provides ability to render individual bytes within a user zone read-only by
restricting all write operations to it. It operates on 8-byte page level whereby the lowest
addressed byte of the page serves as the write access control byte for that page. Figure 5
shows the use of write lock for data at addresses $080 - $087. The byte at $080 controls writeaccess to bytes from $080 to $087.
Figure 5-4.
Address
$080
Write Lock Example
$0
$1
$2
$3
$4
$5
$6
$7
1101 1001
xxxx xxxx
locked
xxxx xxxx
locked
xxxx xxxx
xxxx xxxx
xxxx xxxx
locked
xxxx xxxx
xxxx xxxx
The Write Lock option also applies to the access control byte for each page by writing its least
significant (rightmost) bit to logic “0”. Moreover, only logic modifications from logic “1” to logic “0”
of the access control byte are permissible.
Write Lock is available for any user zone and is selectable by configuring appropriate access
registers. Furthermore, configuring a user zone with the Write Lock option restricts writing to that
zone to a byte at a time. Attempts to write several bytes within a command results in writing only
the first byte.
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5.1.9
Anti-tearing (Power Loss Protection)
In the event of a power loss during a write cycle, the integrity of the device's stored data may be
recovered. This function is optional and the host may choose to activate the anti-tearing function
for any write to a user zone or configuration zone by use of the appropriate B4 system write
command. When anti-tearing is active, write commands will take longer to execute since more
write cycles are required. Additionally, the data written is limited to 8 bytes.
Data is written first to a buffer zone in EEPROM instead of the intended destination address in
the user zone or configuration zone, but with the same access conditions. If this write cycle is
interrupted the original data remains in tact in the user zone or configuration zone. The data is
then written in the required memory location. If this second write cycle is interrupted the device
will automatically recover the data from the system buffer zone at the next power-up and write it
to the intended destination address.
In two-wire mode, the host is required to perform ack polling for 36ms after write commands
when anti-tearing is active. At power-up five clock cycles are required to check the anti-tearing
flags. In the event that the device needs to carry out the data recovery process the host is
required to perform ack polling for 18ms.
5.2
Configuration Memory Values
This section describes each individual field in the configuration memory.
5.2.1
Default Values
Atmel programs certain fields of the system zone at the factory. The customer may elect to
change the content of all of these fields except for the Lot History Code field, which is permanently locked. Atmel programs the remainder of the fields, including all of the configuration
memory and user zones to ones prior to releasing the device from the factory. Table 2: Factory
Programmed Fields2 summarizes device fields Atmel programs at the factory. A brief description of each field follows.
Table 5-2.
Factory Programmed Fields
Device
ATR
Fab
Code
Lot History
Code
Write 7 Password
(Secure Code)
AT88SC0104CA
3B B2 11 00 10 80 00 01
10 10
Variable, Locked
DD 42 97
AT88SC0204CA
3B B2 11 00 10 80 00 02
20 20
Variable, Locked
E5 47 47
AT88SC0404CA
3B B2 11 00 10 80 00 04
40 40
Variable, Locked
60 57 34
AT88SC0808CA
3B B2 11 00 10 80 00 08
80 80
Variable, Locked
22 E8 3F
5.2.2
Answer To Reset (ATR)
This is an 8 byte wide register with content that Atmel defines. This register is read/write accessible prior to blowing the FAB fuse, but becomes read-only after blowing the fuse.
5.2.3
Fab Code
This field is a 16-bit wide register with content that Atmel defines. This field is read/write accessible prior to blowing the FAB fuse, but becomes read-only after blowing the fuse.
5.2.4
Memory Test Zone (MTZ)
This field is a 16-bit wide register with open read/write access privileges at all times for testing
basic communication to the device. This field is free of all security constraints at all times.
18
5221A–CRYPT–10/08
5.2.5
Card Manufacturer Code
This field is a 32-bit wide register with read/write access privileges for the customer to define its
content. The content of this field becomes read-only after blowing the PER fuse.
Figure 8: Device Fuses
5.2.6
Lot History Code
This field is a 64-bit wide register with content that Atmel defines. This field is read-only.
5.2.7
Issuer Code
This field is a 128-bit wide register with read/write access privileges for customer to define its
content. The content of this field becomes read-only after blowing the PER fuse.
5.2.8
Device Configuration Register (DCR)
This 8-bit register allows selection of the following device configuration options (active low). The
values programmed have an immediate affect on the logic of the device. The default value is “1”
for each bit.
Figure 5-5.
5.3
DCR Register Bit Map
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
SME
UCR
UAT
ETA
CS3
CS2
CS1
CS0
SME – Supervisor Mode Enable
Asserting this bit (SME = “0”) enables supervisor mode for Write Password 7 such that verifying
password 7 grants read and write access to all passwords sets and PACs. Verifying Write Password 7 does not grant access to other passwords when this bit is not asserted (SME = “1”).
5.4
UCR – Unlimited Checksum Reads
Asserting this bit (UCR = “0”) allows unlimited number of checksum reads without requiring a
new authentication. Not asserting this bit (UCR = “1”) limits the read of checksum to one attempt
after which the devices resets the crypto algorithm after executing the Read Checksum
command.
5.5
UAT – Unlimited Authentication Trials
Asserting this bit (UAT = “0”) disables the Authentication Attempts Counter (AAC) thus allowing
unlimited authentication attempts. The AAC decrements after each unsuccessful attempt but the
internal logic ignores it value. Asserting this bit also prevents reset of the crypto algorithm after
reading the MAC in encryption mode. The UAT bit does not affect the Password Attempts
Counter.
5.6
ETA – Eight Trials Allowed
Asserting this bit (ETA = “0”) extends the trials limit to 8 incorrect attempts to authenticate or verify a password. The counter (AAC or PAC) will decrement ($FF, $FE, $FC, $F8, $F0, $E0, $C0,
$80, $00) with each incorrect attempt. Disabling this bit (ETA = “1”) limits authentication and
password verification trials to only four incorrect attempts ($FF, $EE, $CC, $88, $00).
19
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
5.7
CS0 – CS3: Programmable Chip Select (only relevant in synchronous protocol)
The four most significant bits (b4 – b7) of every command comprise the Chip Select Address. All
CryptoMemory devices will respond to the default Chip Select Address of $B (1011). Each
device also responds to a second Chip Select Address programmed into CS0-CS3 of the Device
Configuration Register. By programming each device to a unique Chip Select Address, it is possible to connect up to 15 devices on the same Serial Data bus and communicate individually to
each. Global communications to all devices sharing the bus is accomplished using the default
Chip Select Address $B.
5.7.1
Access Registers
Figure 4: Access Register Bit Map
Four, eight, or sixteen 8-bit access registers allow personalization of the device. Each access
register works in conjunction with a Password/Key register to define the security settings for
each individual zone of the user memory. Values in the access registers take immediate effect
after programming. The default value for each bit is “1”.
Figure 5-6.
5.7.1.1
Access Register Bit Map
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
PM1
PM0
AM1
AM0
ER
WLM
MDF
PGO
PM(1:0) Password Mode
Table 5-3.
Password Mode
PM1
PM0
Access
1
1
No Password Required
1
0
Write Password Required
0
*
Read and Write Passwords Required
When PM = “11”, the user zone under protection requires no password. When PM = “10”, the
zone requires Write Password verification for writing and reading is free. When PM = “01” or
“00”, reading requires the read password verification and writing requires write password verification. However, proper verification of the Write Password also grants read access. The
password set required is specified by PW(3:0) in the corresponding Passwords/Keys Register
(see following section). Verification of the write password also allows modification of the read
and the write passwords.
5.7.1.2
AM(1:0) – Authentication mode
Table 5-4.
Authentication Mode
PM1
PM0
Access
1
1
No Authentication Required
1
0
Authentication for Write
0
1
Normal Authentication Mode
0
0
Dual Access Mode
20
5221A–CRYPT–10/08
When AM = “11”, the user zone under protection requires no authentication. When AM = “10”,
the zone requires authentication only for write accesses and read accesses are free. When AM
= “01”, the zone requires authentication for both write and read accesses. In both of these configurations, the Authentication Key (AK) in the corresponding Passwords/Keys Register
specifies the required Secret Seed (see following section).
Finally, when AM = “00”, the dual access mode is active in which authentication using the Program Only Key (POK) gives a right to read and program the zone (i.e. write '0's only), while
authentication using the Authentication Key (AK) gives full read and write access to the zone. In
this way, a token application may be implemented, whereby regular hosts with knowledge of
POK may decrement the stored value, and only master hosts with knowledge of AK may reset
the token to its full value. Please see the following section on the Passwords/Keys Register for
further definition of POK and AK.
Notes:
1. When AM ≠ "00", the POK bits in the corresponding Password/Key Register are ignored.
2. When AM = ‘00’ and PGO = ‘0’ bits in the zone may not be written to ‘1’ even when using the
AK.
3. Requiring authentication automatically requires the use of secure checksums for write operations (See Encrypted Checksum (Message Authentication Code, MAC) on page 17).
5.7.1.3
ER – Encryption Required
When ER = "0", the host is required to activate the encryption mode in order to read/write the
corresponding user zone. No data read from or written to the zone may be transmitted in the
clear. If ER = "1", the host may activate the encryption mode, but isn't specifically required to do
so by the device.
5.7.1.4
WLM – Write Lock Mode
Asserting this bit (WLM = “0”) divides the user zone into 8-byte pages. The first byte of each
page becomes the Write Lock Byte and defines the locked/unlocked status for each byte in the
page. Write access is forbidden to a byte if its associated bit in the Write Lock Byte is set to “0”.
Bit 7 controls byte 7; bit 6 controls byte 6, etc. By setting bit 0 to “0” locks the Write Lock Byte
itself. Enabling Write Lock Mode limits write operations to one byte at a time.
5.7.1.5
MDF – Modify Forbidden
Asserting this bit (MDF = “0”) renders the user zone read-only at all times. The user zone must,
therefore, be programmed before setting this bit to “0”.
5.7.1.6
PGO – Program Only
Asserting this bit (PGO = “0”) allows changing of data within the user zone under protection from
“1” to “0” and never from “0” to “1”.
5.7.2
21
Password/Key Registers
Four, eight or sixteen 8-bit Password/Key registers receive definition during device personalization. Each Password/Key register works in conjunction with a corresponding Access register to
define the security settings of each zone. The values programmed have an immediate affect on
the logic of the device. The default value is “1” for each bit. Bit 3 is reserved and should be left as
value “1.”
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
Figure 5-7.
Password/Key Register Bit Map
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 2
Bit 1
AK1
AK0
POK1
POK1
Res
PW2
PW1
PW0
5.7.2.1
AK(1:0) – Authentication Key
These bits define which of the four secret seeds G0-G3 must be used in an authentication to
allow access to the user zone if authentication is selected in the corresponding access register.
Each access register may point to a unique authentication secret. Or access registers for multiple zones may point to the same authentication secret. In this case authentication with a single
secret seed will open several zones.
5.7.2.2
POK(1:0) – Program Only Key
When the user zone has the dual access mode selected (AM = "00"), these bits define which of
the four secret seeds G0-G3 must be used in an authentication to allow read and program (i.e.
write '0's only) access to the user zone.
5.7.2.3
PW(2:0) – Password Set
These bits define which of the eight password sets must be presented to allow access to the
user zone when the password mode is selected.
5.7.2.4
Identification Number
A 56-bit number the customer defines during personalization. It is recommended that a unique
identification number be assigned to each device.
5.7.3
Cryptograms (C0 – C3)
Each of these fields contains a 56-bit cryptogram for use during authentication. The internal logic
modifies the cryptogram each time it successfully verifies the authentication. The customer may
program an initial value for the cryptogram during personalization. It is recommended that the
initial values be random numbers.
5.7.4
Session Keys (S0 – S3)
Each of these fields contains a 64-bit session key for use during encryption. The internal logic
modifies the session key each time it successfully processes authentication or encryption verification. The session keys do not require initial values and does programming initial values are
not necessary.
5.7.5
Secret Seeds (G0-G3)
Each of these fields contains a 64-bit secret seed that is used in conjunction with the corresponding cryptogram and session key during the authentication and encryption sequences. The
customer programs the secret seeds during device personalization.
5.7.6
Password Sets
The password fields contain eight sets of two 24-bit passwords for read and write operations.
The customer defines the values of these passwords during personalization. Successfully verifying the write password allows modification of the read and the write passwords of the same set.
22
5221A–CRYPT–10/08
5.7.7
Secure Code
The secure code is the WRITE 7 password. Properly presenting this password grants write
access to the configuration memory during personalization. Atmel defines the initial value of the
secure code but the customer may change these values after successful presentation during a
verify password operation for WRITE 7 password. Table 2: Factory Programmed Fields2 on
page 1 shows the secure codes for various devices when they leave the Atmel factory. After
blowing the PER fuse, verifying WRITE 7 password no longer grants write access to the configuration memory, and the configuration memory becomes read-only thereafter.
5.7.8
Password Attempts Counters (PAC)
Each of the sixteen PAC fields contains an 8-bit attempts counter for the verify password process. Each PAC corresponds to a password. The attempts counter limits the number of incorrect
consecutive presentations of the corresponding password to four, after which it locks the password from future use. The PAC will decrement ($FF, $EE, $CC, $88, $00) with each incorrect
attempt to present the password. The PAC permanently locks the corresponding password once
its value reaches $00. Prior to reaching $00, any correct presentation of the password resets the
PAC value to $FF.
5.7.9
Authentication Attempts Counters (AAC)
Each of the four AAC fields contains an 8-bit attempt counter for the authentication process.
Each AAC field corresponds to each authentication key set. The attempts counter limits the
number of incorrect consecutive attempts to authenticate to for, after which it locks the authentication key set from future use. The AAC will decrement ($FF, $EE, $CC, $88, $00) with each
incorrect attempt to authenticate. The AAC permanently locks the corresponding key set once
its value reaches $00. Prior to reaching $00, any correct attempt to authenticate resets the AAC
value to $FF.
5.8
Security Fuses
CyptoMemory uses four fuses. The status of these fuses is given in a ‘fuse byte.’ A value of ‘0’
indicates that the fuse has been blown. Bits 4 to 7 of this byte are not used as Security Fuses
and are reserved for Atmel use.
Figure 5-8.
Device Fuses
F7
F6
F5
F4
F3
F2
F1
F0
resv
resv
resv
resv
SEC
PER
CMA
FAB
SEC, PER, CMA and FAB are non-volatile fuses blown at the end of various steps in the manufacturing and personalization process. Once blown, these fuses can never be reset. Atmel blows
the SEC fuse to lock the lot history code before the device leaves the factory. Blowing the
remainder of the fuses must follow the sequence:
FAB – To lock the Answer To Reset and the Fab Code portions of the Configuration Memory.
CMA – To lock the Card Manufacturer Code of the Configuration Memory.
PER – To lock the remainder of the Configuration Memory.
Any attempt to blow a fuse out of sequence will be unsuccessful.
8 provides a summary of access rights for all portions of the memory for each fuse condition.
23
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
Table 5-5.
Fuse Access Rights Summary
Zone
Information
(Except MTZ and CMC)
Memory Test Zone
(MTZ)
Card Manufacturer Code
(CMC)
Read Only
(Lot History Code)
Access Control
Cryptography
(Except Encryption Keys S)
Encryption Keys
(S)
Secret
Operation
Fuse
SEC = 0
FAB = 0
CMA = 0
PER = 0
Read
Free
Free
Free
Free
Write
Secure Code
Forbidden
Forbidden
Forbidden
Free
Free
Free
Free
Read
Free
Free
Free
Free
Write
Secure Code
Secure Code
Forbidden
Forbidden
Read
Free
Free
Free
Free
Write
Forbidden
Forbidden
Forbidden
Forbidden
Read
Free
Free
Free
Free
Write
Secure Code
Secure Code
Secure Code
Secure Code
Read
Free
Free
Free
Free
Write
Secure Code
Secure Code
Secure Code
Forbidden
Secure Code
Secure Code
Secure Code
Forbidden
Secure Code
Secure Code
Secure Code
Forbidden
Secure Code
Secure Code
Secure Code
Write PW
Read
Free
Free
Free
Free
Write
Secure Code
Secure Code
Secure Code
Write PW
Forbidden
Forbidden
Forbidden
Forbidden
AR
AR
AR
AR
Read
Write
Read
Write
Read
Write
Passwords
Read
Write
Password Attempts Counters
(PAC)
Forbidden
Read
Write
Read
User Zones
Notes:
Write
1. AR: Access rights as defined by the Access Registers
2. PW: Password
24
5221A–CRYPT–10/08
6. Protocol Selection
CryptoMemory supports two application areas with different communication protocols: a 2-wire
serial communication for embedded applications and an ISO 7816 asynchronous T=0 smart
card interface. The power-up sequence of CryptoMemory determines what mode it shall operate
in. A brief description of each of these modes follows.
6.0.1
Synchronous Mode for Embedded Applications
The 2-wire serial interface is used for fast and efficient communication with logic and controllers.
The synchronous mode is the default after powering up VCC due to the internal and/or external
pull-up on RST. For embedded applications using CryptoMemory in standard plastic packages
RST is not bonded out and this is the only communication protocol.
Power-up VCC, RST goes high also.
After stable VCC, apply 5 pulses CLK-SCL
CLK-SCL and I/O-SDA may then be driven.
Figure 6-1.
Power Up Sequence for 2-Wire Mode
Vcc
I/O-SDA
RST
CLK-SCL
1
2
3
4
5
The asynchronous mode is selected when RST is low on a rising edge of CLK. Once the asynchronous mode has been selected, it is not possible to return to the synchronous mode other
than by powering the device off and on again.
6.0.2
Asynchronous Mode for Smart Card Applications
The asynchronous T=0 protocol defined by ISO 7816-3 is used for compatibility with the industry’s standard smart card readers. Selecting this mode requires the following power-up
sequence which complies with ISO 7816-3 for a cold reset in smart card applications.
Power up VCC; RST, IO-SDA and CLK-SCL are low
Set I/O-SDA in receive mode
Provide a clock signal to CLK-SCL
RST goes high after 400 clock cycles.
The device will respond with a 64-bit ATR code, including historical bytes to indicate the memory
density within the CryptoMemory family. Once the asynchronous mode has been selected, it is
not possible to switch to the synchronous mode without powering off the device.
25
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
Figure 6-2.
Power Up Sequence for Smart Card Mode
Vcc
ATR
I/O-SDA
RST
CLK-SCL
Smart card applications that support the 2-Wire protocol can also use CryptoMemory in the synchronous mode.
7. Synchronous Protocol
Communication with the CryptoMemory using the synchronous protocol is very similar to communication with AT24Cxxx Serial EEPROM devices using a two-wire protocol (TWI). Basic
command structure and timing are the same however a significant difference exists when reading the CryptoMemory device that will be described below.
7.1
Start-up Sequence
When first powering up the device, 5 pulses are required on CLK-SCL for reading of internal registers. This may be accomplished by sending one full command byte to the device. The device
will not respond but will then be ready to respond to the next correct command sequence.
• Power-up VCC.
• External pull-up resistor pulls I/O-SDA high with VCC.
• After stable VCC, 5 pulses are applied to CLK-SCL.
• CLK-SCL and I/O-SDA may be driven.
Figure 7-1.
Start-up Sequence
Vcc
I/O-SDA
CLK-SCL
1
2
3
4
5
26
5221A–CRYPT–10/08
7.2
Command Set
The command set of CryptoMemory is expanded compared to a Serial EEPROM as the functionality of CryptoMemory exceeds that of a simple memory device. Each instruction sent to the
CryptoMemory must have 4 bytes: Command, Address 1, Address 2 and N. The last byte, N,
defines the number of any additional data bytes to be sent or received from the CryptoMemory
device. In addition, the Random Read command is available. It is the only one byte command
but must be preceded by an aborted write command in order to set up the read address.
Table 7-1.
CryptoMemory Command Set
Command Description
Command
Address 1
Address 2
N
Data(N)
Normal
(AT88SC0104A-AT88SC0808CA)
$B0
addr
addr
N ≤$10
N bytes
with Anti-Tearing (all devices)
$B0
addr
addr
N ≤$08
N bytes
Random Read
Random Read
$B1
Read User Zone
Normal Read
$B2
addr
addr
N
N bytes
Write Config Zone
(AT88SC0104CA-AT88SC0808CA)
$B4
$00
addr
N ≤10
N bytes
Write Fuses
$B4
$01
fuse ID
$00
Set User Zone
$B4
$03
zone
$00
Write Config Zone with Anti-Tearing
$B4
$08
addr
N ≤08
Set User Zone with Anti-Tearing
$B4
$0B
zone
$00
Read Config Zone
$B6
$00
addr
N
Read Fuse Byte
$B6
$01
$00
$01
Write Password
$BA
$0X
$00
$03
3 byte password
X = password
set (0-7)
Read Password
$BA
$0X
$00
$03
3 byte password
X = password
set (0-7)
Write User Zone
System Write
System Read
Details on command usage below
Verify Password
7.3
N bytes
Command Format
Most CryptoMemory commands have the same format as a two wire interface (TWI) write command characterized by a zero in the LSB of the first byte (device address). The only exception is
the Random Read command that has a one in the LSB of the device address byte.
7.3.1
27
Write Command Format
The host generates all command and data bytes within a write transaction and sends these to
the device. The device acknowledges each byte.
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
Figure 7-2.
CryptoMemory WRITE Command
S
T
A
R WRITE
T Command
xxxx xxx0
Address 1
Address 2
N
Data
Data x N
0000 0000
0a6-- ---a0
n7--- ---n0
d7--- ---d0
d7--- ---d0
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
S
T
O
P
A
C
K
The number of bytes CryptoMemory can write within each call of a write command is constrained by the physical page size of the EEPROM memory. The maximum number of bytes to
write for each call to the WRITE command is $10. All CryptoMemory WRITE commands comply
with the format for the TWI write command.
7.3.2
Read Command Format
The CryptoMemory READ commands (Read User Zone, System Read and Random Read) do
not comply with the format of the TWI READ command. The CryptoMemory Read User Zone
and System Read commands closely resemble the TWI WRITE command format by having a
zero in the LSB in the device address byte. The Random Read command closely resembles the
format for the TWI READ command but requires additional steps to specify the read address.
7.3.2.1
Figure 7-3.
Normal Read: $B2 or $B6 (Read User Zone or System Read)
The CryptoMemory Normal Read command looks like a TWI write command (LSB of the fist
byte = 0) but after the 4th byte of the command the CryptoMemory device will begin to send data
back on the bus. The number of bytes sent by CryptoMemory will be equal to the value of N.
CryptoMemory Normal Read Command
S
T
A
READ
R
T Command
xxxx xxx0
A
C
K
Address 1
Address 2
0000 0000
0a6-- ---a0
A
C
K
N
n7--- ---n0
A
C
K
NS
AT
CO
KP
A
C
K
A
C
K
d7--- ---d0
d7--- ---d0
Data
Data x N
The response of CryptoMemory will cause contention with the host on a standard TWI bus. Typically CryptoMemory cannot be used on a standard TWI bus but requires a modified TWI
protocol to account for the unique read command format.
7.3.2.2
Random Read: $B1
The Random Read command provides the host ability to sequentially clock data from the device
starting from a specified address. The host needs to issue a “dummy” WRITE operation in order
to specify the start address for the Random Read. The host does this by clocking in the four
bytes of the WRITE command and then follows them with a START condition instead of a data
byte. At this point, the device’s internal logic is pointing to the address from the aborted WRITE
operation. The host may then issue the Random Read command byte ($B1) to which the device
will respond with the EEPROM byte at the current address location and then increment the internal address by one. The device will continue to sequentially send out bytes as long as the host
28
5221A–CRYPT–10/08
keeps acknowledging each byte with an ACK. Address “roll over” is from the last byte of the current zone to the first byte of that zone. The host terminates Random Read by issuing a NACK
signal instead of an ACK.
Figure 7-4.
S
T
A
R
T
Random Read Command
WRITE
Command
Address 1
Address 2
N
xxxx xxx0
0000 0000
0a6-- ---a0
n7--- ---n0
A
C
K
A
C
K
A
C
K
N
A
C
K
A
C
K
S
T
A
R Random Read
Command
T
xxxx 0001
N
A
C
K
A
C
K
A
C
K
d7--- ---d0
Data
S
T
O
P
d7--- ---d0
Data x N
CryptoMemory will NACK the N parameter of the dummy write operation if the write were issued
to an illegal write location. The NACK response, however, does not affect the loading of the read
address. The Random Read command works for both Configuration and User Memory. It is
important to implement the CryptoMemory read commands as specified; otherwise CryptoMemory responses will cause contention on the bus with a host using standard TWI protocol.
7.4
Acknowledge Polling
A STOP condition ends each command. Certain commands require an acknowledge polling
sequence. Acknowledge polling consists of sending a START condition followed by the command byte and determining if the device responds with an ACK. If the device is not ready for the
command it will not acknowledge and the sequence must be repeated (start condition, command byte, check for ACK). The ACK indicates the operation has completed but gives no
indication of the success or failure of the command. In general, READ commands do not require
ACK polling. WRITE commands require ACK polling except for encrypted write commands that
must be followed by a Send Checksum command. SET commands do not require ACK polling.
VERIFY commands require ACK polling with $B2 or $B6 commands. The following table lists
the specific requirements for ACK polling and the maximum expected delay before the device
will ACK indicating readiness for the next command.
29
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
Table 7-2.
Acknowledge Polling Requirement Summary
Command Description
Command
Addr 1
Addr 2
N
ACK Polling CMD
Delay
Normal
$B0
addr
addr
N
Required, any CMD
5ms
Normal - with AntiTearing Encrypted
$B0
addr
addr
N
Required, any CMD
20ms
$B0
addr
addr
N
No, Send Checksum
0
$B0
addr
addr
N
No, Send Checksum
0
Random Read
$B1
n/a
n/a
n/a
Not Required
0
Read User Zone
$B2
addr
addr
N
Not Required
0
Write Config Zone
$B4
$00
addr
N
Required, any CMD
5ms
Write Fuses
$B4
$01
fuse ID
$00
Required, any CMD
5ms
Set User Zone
$B4
$03
zone
$00
Not Required
Write Config Zone
with Anti-Tearing
$B4
$08
addr
N
Set User Zone with
Anti-Tearing
$B4
$0B
zone
$00
Not Required
0
Read Config Zone
$B6
$00
addr
N
Not Required
0
Read Fuse Byte
$B6
$01
$00
$01
Not Required
0
Write Password
$BA
$0X
$00
$03
Required; $B2 or $B6
10ms
Read Password
$BA
$1X
$00
$03
Required; $B2 or $B6
10ms
Write User Zone
Encrypted with
Anti-Tearing
System Write
System Read
Verify Password
Note:
Delays are based on operation at 250C
7.5
Device Addressing
Required, any CMD
0
20ms
The first nibble of the command byte corresponds to the device address. All CryptoMemory
devices will respond to the device address $B. A specific device may be set to respond to
another value ($0 to $F) in addition to $B by setting this value in the second nibble of the Device
Configuration Register (DCR) in the configuration memory. The DCR is set to $FF at the Atmel
factory and thus will respond to device address $B and $F unless the DCR is modified. For a
device to respond only to $B the DCR should be set to $B also.
7.6
Command Descriptions
In the following section operations are described in two parts: the instruction is described first
from a functional point of view (parameters and data exchanged), after which they are detailed
for the synchronous two-wire protocol. In these diagrams, values are shown in binary format with
bits to the left transmitted first, i.e. bytes are transmitted most significant bit first.
30
5221A–CRYPT–10/08
7.7
7.7.1
Write User Zone: $B0
Functional
Figure 7-5.
Write User Zone Command Functional Description
Host
Device
Command
Address 1
Address 2
Number of bytes N
Data
...
Data
N data bytes
The Write User Zone command $B0 allows writing of data in the device's currently selected user
zone (the procedure for selecting a user zone is described below, see “System Write: $B4” ).
The data byte address to be written is defined by Address 1 and Address 2 in the command. The
value N defines how many bytes are to be written. The maximum number of bytes that may be
written is $10 corresponding to the EEPROM page size. In anti-tearing mode the maximum
value for N is $08 for all devices. A write in anti-tearing mode is activated with the Set User Zone
with anti-tearing command; all subsequent write operations to the user zone will be in anti-tearing mode. A write may be started in the middle of an EEPROM page but should not extend past
the end of the page.
If the host is not allowed to write in the zone, the device will not acknowledge the N byte. After
this command the host must perform ACK polling.
Figure 7-6.
Write User Zone Command Structure
S
T
A
R
T Command
Address 1
1011 0000
xxxx xxxx
A
C
K
31
Address 2
N
xxxx xxxx
A
C
K
xxxx xxxx
A
C
K
A
C
K
Data
Data x N
d7--- ---d0
d7--- ---d0
A
C
K
S
T
O
P
A
C
K
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
7.8
Random read: $B1
7.8.1
Functional
Figure 7-7.
Random Read Command Functional Description
Host
Device
WRITE Command
Address A1
Address A2
Number of bytes N
RANDOM READ
Data
...
Data
N data bytes
The Random Read command $B1 allows reading of data from the devices configuration memory
or currently selected user zone (The “System Write: $B4” section describes how to select a user
zone).
The Random Read command provides the host ability to sequentially clock data from the device
starting from a specified address. The host needs to issue a “dummy” WRITE operation in order
to specify the start address for the Random Read. The host does this by clocking in the four
bytes of the WRITE command and then follows them with a START condition instead of a data
byte. At this point, the device’s internal logic is pointing to the address from the aborted WRITE
operation. The host may then issue the Random Read command byte ($B1) to which the device
will respond with the EEPROM byte at the current address location and then increment the internal address by one. The device will continue to sequentially send out bytes as long as the host
keeps acknowledging each byte with an ACK. Address “roll over” is from the last byte of the current zone to the first byte of that zone. The host terminates Random Read by issuing a NACK
signal instead of an ACK.
Figure 7-8.
S
T
A
R
T
Random Read Command Structure
WRITE
Command
Address 1
Address 2
N
xxxx xxx0
0000 0000
0a6-- ---a0
n7--- ---n0
A
C
K
A
C
K
A
C
K
N
A
C
K
A
C
K
S
T
A
R Random Read
Command
T
xxxx 0001
N
A
C
K
A
C
K
A
C
K
d7--- ---d0
Data
S
T
O
P
d7--- ---d0
Data x N
32
5221A–CRYPT–10/08
7.9
7.9.1
Read User Zone: $B2
Functional
Figure 7-9.
Read User Zone Command Functional Description
Host
Device
Read Command
Address 1
Address 2
Number of bytes N
Data
...
Data
N data bytes
The Read User Zone command $B2 allows reading of data from the device's currently selected
user zone (the procedure for selecting a user zone is described below under “”).
The data byte address to be read is defined by Address 1 and Address 2 in the command and is
internally incremented following the transmission of each data byte. The value N defines how
many bytes CryptoMemory will read, a value of zero will result in 256 bytes read. The host however may cease clocking the device and end the transmission with a NACK and STOP at
anytime prior to receiving all N bytes. During a read operation the address will "roll over" from
the last byte of the current zone, to the first byte of the same zone.
If the host is not allowed to read the zone, the device will not acknowledge the N byte.
Figure 7-10. Read User Zone Command Structure
S
T
A
R
T Command
Address 1
1011 0010
xxxx xxxx
A
C
K
33
Address 2
N
xxxx xxxx
A
C
K
xxxx xxxx
A
C
K
NS
AT
CO
KP
A
C
K
A
C
K
d7--- ---d0
d7--- ---d0
Data
Data x N
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
7.10
System Write: $B4
7.10.1
Functional
Figure 7-11. System Write Command Functional Description
Host
N data bytes
Device
Command
Address 1
Address 2
Number of bytes N
Data
...
Data
The System Write command allows writing of configuration data to the device. Depending on the
value of the Address 1 parameter, the host may write data in the configuration zone, program
the fuses, or set the user zone.
Table 7-3.
System Write Command Detail
Command Description
Command
Addr 1
Addr 2
N
Data(N)
Write Config Zone
$B4
$00
addr
N ≤$10
N bytes
Write Fuses
$B4
$01
fuse ID
$00
Send Checksum
$B4
$02
$00
$02
Set User Zone
$B4
$03
zone
$00
2 bytes
7.10.1.1
Write Config Zone
The maximum number of bytes that may be written is $10 and this corresponds to the EEPROM
page size. In anti-tearing mode the maximum value for N is $08 for all devices. A write may be
started in the middle of an EEPROM page but should not extend past the end of the page. If the
address provided is an unauthorized address, the device will not write the requested data. Since
access rights vary throughout the configuration zone, the host may provide an authorized starting address, but a number of bytes that causes the device to reach unauthorized data. In this
case, the device will prevent the internal write cycle and no bytes will be written in the EEPROM.
After this command the host must perform ACK polling.
7.10.1.2
Write Fuses
The fuses may only be "programmed", that is written from '1' to '0'. The write fuses operation is
allowed only after successfully presenting the secure code (WRITE 7 password). The fuses
must be blown sequentially: FAB must be blown first, CMA may be blown only if FAB is ‘0’, and
PER only if CMA is ‘0’. After this command the host must perform ACK polling. The SEC fuse is
blown at the Atmel factory to protect lot history information.
34
5221A–CRYPT–10/08
7.10.1.3
Table 7-4.
Fuse Identification
Fuse
Fuse ID (Addr 2)
SEC
$07
FAB
$06
CMA
$04
PER
$00
Set User Zone
Before reading and writing data in the user zones, the host must select a zone with this command. At this time the host chooses whether anti-tearing should be active for this zone.
Table 7-5.
Anti-Tearing
Command Description
Command
Addr 1
Addr 2
N
Data (N)
Write Config Zone with Anti-Tearing
$B4
$08
addr
N ≤$08
N bytes
Set User Zone with Anti-Tearing
$B4
$0B
zone
$00
Data written to the configuration zone may be done with anti-tearing enabled by setting address
1 to $08 of the write configuration zone command.
To enable anti-tearing for writes to a user zone a set user zone command is executed with
address 1 set to $0B. All subsequent write user zone commands will be executed with anti-tearing enabled until the next set user zone command. Anti-tearing should be turned off if not
required, as it would otherwise cause more write cycles than necessary.
Figure 7-12. System Write Command Detail
S
T
A
R
T Command
Address 1
1011 0100
0000 xxxx
A
C
K
35
Address 2
N
xxxx xxxx
A
C
K
xxxx xxxx
A
C
K
A
C
K
Data
Data x N
d7--- ---d0
d7--- ---d0
A
C
K
S
T
O
P
A
C
K
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
7.11
System Read: $B6
7.11.1
Functional
Figure 7-13. System Read Command Functional Description
Host
Device
Read Command
Address 1
Address 2
Number of bytes N
Data
...
Data
N data bytes
The System Read command allows reading of system data from the device. Depending on the
value of address 1, the host may read the data in the configuration zone, or the fuses.
Table 7-6.
Zone Configuration Example
Command Description
Command
Addr 1
Addr 2
N
Read Config Zone
$B6
$00
addr
N
Read Fuse Byte
$B6
$01
$00
$01
7.11.2
Read Config Zone
The data byte address to be read is defined by address 2 in the command and is internally incremented following the transmission of each data byte. The value N defines how many bytes
CryptoMemory will read, a value of zero will result in 256 bytes read. If the address provided is
an unauthorized address, the device will not ACK the N byte and will not return any data. Since
access rights vary throughout the configuration zone, the host may provide an authorized starting address and a number of bytes N that causes the device to reach unauthorized data. In this
case the device will transmit the fuse byte (see below) in place of unauthorized bytes.
7.11.3
Read Fuse Byte
Fuse data is returned in the form of a single byte. Bits 0 to 3 represent the fuse states, a value of
‘0’ indicates the fuse has been blown. Bits 4 to 7 are not used as security fuses and are reserved
by Atmel.
Table 7-7.
Fuse Byte Bit-Map
F7
F6
F5
F4
F3
F2
F1
F0
resv
resv
resv
resv
SEC
PER
CMA
FAB
36
5221A–CRYPT–10/08
7.12
7.12.1
Verify Password: $BA
Functional
Figure 7-14. Verify Password Command Functional Description
Host
3 password bytes
Device
Command
Password Index
PW1
PW2
PW3
READ password indices: $10 to $17 for passwords 0,1,2 & 7.
WRITE password indices: $00 to $07 for passwords 0,1,2 & 7.
Secure code index: $07 (equivalent to WRITE Password 7).
Four password index bits "r" and "ppp" indicate the password to compare:
r = 0 : WRITE password,
r = 1 : READ password,
p2p1p0: Password set number.
Figure 7-15. Verify Password Command Structure
S
T
A
R
T Command
PW Index
1011 1010
Parameter 2
000r 0p2p1p0
A
C
K
N=3
**** ****
A
C
K
Data x 3
0000 0011
A
C
K
S
T
O
P
d7--- ---d0
A
C
K
A
C
K
Once the sequence has been carried out, the device requires the host to perform an ACK polling
sequence with the system read command $B6. In order to know whether the inserted password
was correct, the host can read the corresponding attempts counter and verify the value is zero.
37
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
8. Initialization Example
The first step in initializing CryptoMemory is to determine what data is to be stored in the device
and what the security settings need to be to protect this data. Once defined, determine the
proper settings for CryptoMemory registers and select values for passwords. To initialize the
CryptoMemory device, the following sequence is recommended to take place in a secure location to protect sensitive data and passwords that may be loaded into the device.
8.1
Write Data to User Zones
In the default configuration from Atmel, all user zones have free access rights. Writing initial data
into the user zones should be done before setting security configurations. Use the Set User
Zone command and Write User Zone command to write initial data into the user zones. The
Read User Zone command may be used to verify the data written.
8.2
Unlock Configuration Zone
Before any data can be written to the configuration zone, it must be unlocked by presenting the
correct security code (WRITE 7 Password). Use the Verify Password command with the proper
secure code supplied by Atmel to unlock the configuration zone. Use the Read Config Zone
command to read back the security code at address $E9 for verification that the configuration
zone has been unlocked.
8.3
Write Data to Configuration Zone
Writing this data is accomplished by performing the Write Config Zone command at the
appropriate address location. The Read Config Zone command may be used to verify the data
written. As soon as values are written to the registers, keys, and passwords, they become
effective in determining the security of the user zones.
8.4
Set Security Fuses
Once all data is written and verified into user zones and the configuration zone the security fuses
should be set before the device is released from the secure location used for device initialization. There are three fuses, FAB, CMA and PER that must be set. These three fuses must be set
in the order listed (FAB, then CMA, then PER). The Write Fuse command is used to set each of
the three fuses individually. The Read Fuse command may be used to check the status of all
three fuses. Once all fuses have been set the Read Fuse command should return a value of
zero for the second nibble of the fuse byte.
The AT88SC0104CA is used for this example. A small pattern is written into the first two user
zones. Security for each of these two user zones and the associated register values are shown
in the table below. Simple values for passwords are used.
Table 8-1.
CryptoMemory Asynchronous Command Set
User Zone
Data
Security Requirements
Access Register
Password/Key Register
0
Zone 0 Data
None
$FF
$FF
1
Zone 1 Data
Read/Write Password (Set 1)
$7F
$F9
38
5221A–CRYPT–10/08
The following shows the two-wire commands sent to the CryptoMemory device for the purpose
of initializing the device. The flow is consistent with the steps described above; comments have
been added as indicated with an asterisk (*).
*AT88SC0104CA Initialization Example
*WRITE DATA TO USER ZONES
*Set User Zone 0
B4 03 00 00
*Write data = Zone 0 Data
B0 00 00 0B 5A 6F 6E 65 20 30 20 44 61 74 61
*Set User Zone 1
B4 03 01 00
*Write data = Zone 1 Data
B0 00 00 0B 5A 6F 6E 65 20 31 20 44 61 74 61
*UNLOCK CONFIGURATION ZONE
BA 07 00 03 DD 42 97
*WRITE CODES IN CONFIGURATION ZONE
*Write Card Mfg Code = P001
B4 00 0B 04 50 30 30 31
*Write Identification Number = 00000000012345
B4 00 19 07 00 00 00 00 01 23 45
*Write Issuer Code = STATION 035
B4 00 40 10 53 54 41 54 49 4F 4E 20 30 33 35 00 00 00 00 00
*WRITE REGISTERS IN CONFIGURATION ZONE
*Write Registers AR1/PR1 = 7F F9
B4 00 22 02 7F F9 DF BF 57 B9
*WRITE PASSWORDS IN CONFIGURATION ZONE
*Write Passwords, read 7 = 10 00 01, write 7 = 11 00 11
B4 00 B9 07 11 00 11 FF 10 00 01
*READ ENTIRE CONFIGURATION ZONE TO VERIFY
B6 00 00 F0
*Device Response:
3B B2 11 00 10 80 00 01 10 10 FF 50 30 30 31 FF
8C AD A8 10 0A AB FF FF FB 00 00 00 00 01 23 45
39
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
FF FF 7F F9 FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
53 54 41 54 49 4F 4E 20 30 33 35 00 00 00 00 00
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF 11 00 11 FF 10 00 01
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
*SET SECURITY FUSES
*Set FAB Fuse
B4 01 06 00
*Set CMA Fuse
B4 01 04 00
*Set PER Fuse
B4 01 00 00
*Read Fuse Byte = X0
B6 01 00 01
*Device Response:
00
40
5221A–CRYPT–10/08
9. Asynchronous T=0 Protocol
9.1
Character format
The CryptoMemory complies with the asynchronous T=0 protocol defined in ISO 7816-3. The
character format is shown in the following figure: note that the byte is transmitted with the least
significant bit first.
8 data bits
Start bit
Z
I/O
Parity bit
d0
d1
d2
d3
d4
d5
d6
d7
p
Next Start bit
Guard Time
A
0
t1
tn
t 10
(n ± 0,2) etu
Even parity is used: the parity bit is such that the overall sum of bits in the data byte and the parity bit is an even number. If a transmission error is detected, the receiving device indicates this
by applying a low level on the I/O channel during the guard time. This tells the transmitting
device to retransmit the byte.
9.2
Command format
The command sequence is as follows:
1. In compliance with ISO 7816-3, the host must send the header consisting of 5 characters: CLA, INS, P1, P2, P3.
a. CLA refers to a class of instructions. This byte isn't tested by the device.
b.
INS is the instruction byte.
c.
P1 and P2 are reference bytes, such as a data byte address or password index.
d. P3 is the number of data bytes transferred during the command. For outgoing
transfers (e.g. read commands), P3 = 0 means that 256 data bytes will be emitted
by the card. For incoming commands, P3 = 0 means that no data bytes will be
transferred.
2. The device replies with a "procedure byte", normally equal to the INS code received. If
a problem occurred, then the device will respond with a status word pair SW1-SW2,
indicating the end of the command.
3. Data transfer (P3 bytes).
4. A final SW1-SW2 sequence gives the status of the device after completion of the command. A normal completion is indicated by SW1-SW2 = $90-$00.
Note:
41
for all bytes transmitted by the device or by the host, including header, procedure, status and data
bytes, if a parity error is detected, the receiver requests that byte to be sent again (see character
format).
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
9.2.1
PPS Support
All CryptoMemory devices with user memory sizes 32Kbits and larger support the Protocol and
Parameter Selection (PPS) protocol, section 7 of ISO 7816-3. The AT88SCxxxxCA family of
devices only has up to 8Kbits of user memory. Please consult the respective specification for
any of our higher density devices in the AT88SCxxxxC family for information on PPS support.
9.3
Command Set
Table 9-1.
CryptoMemory Asynchronous Command Set
Command Descriptions
B0
Write User Zone
B2
Read User Zone
B4
System Write
B6
BA
System Read
Verify Password
CLA
INS
P1
P2
P3
Data (N)
Normal
$00
$B0
addr
addr
N ≤$10
N bytes
with Anti-Tearing
$00
$B0
addr
addr
N ≤$08
N bytes
Read User Zone
$00
$B2
addr
addr
N
Write Config Zone
Write Fuses
$00
$00
$B4
$B4
$00
$01
addr
fuse ID
N ≤$10
$00
N bytes
Send Checksum
$00
$B4
$02
$00
$02
2 bytes
Set User Zone
$00
$B4
$03
zone
$00
Write Config Zone w/a-t
$00
$B4
$08
addr
N ≤$08
Set User Zone w/a-t
$00
$B4
$0B
zone
$00
Read Config Zone
$00
$B6
$00
addr
N
Read Fuse Byte
$00
$B6
$01
$00
$01
Read Checksum
$00
$B6
$02
$00
$02
$00
$BA
$0X
$00
$03
3 byte password
X = password set (0, 1,2 or 7)
$00
$BA
$1X
$00
$03
3 byte password
X = password set (0, 1,2 or 7)
Write Password
Read Password
9.3.1
N bytes
Status Words
Table 9-2.
SW1 SW2
Asynchronous Mode Return Status Words Definitions
Meaning
$62 $00
The memory is unchanged, waiting for checksum
$67 $00
The length is incorrect
$69 $00
The command is unauthorized
$6B $00
The address is incorrect
$6D $00
The instruction code is invalid
$90 $00
The command was successfully executed
42
5221A–CRYPT–10/08
These status words indicate the state of the device at the end of the command. In normal conditions, the device sends the INS byte as the procedure byte, and $90 $00 as the final status word.
In certain conditions described below, the device may interrupt the command by returning a status word in place of INS as the procedure byte.
$67 $00 is returned as a procedure byte when the number of data bytes to be transferred is
incorrect.
$69 $00 is returned after read/write commands as procedure bytes if the host is not allowed to
read/write at the address provided. It is also returned after Password commands if the maximum
number of attempts has been exceeded. The device will return $69 $00 as a final status word in
place of $90 $00, if the password presentation failed.
$6B $00 is returned as procedure bytes if the address is incorrect.
$6D $00 is returned as procedure bytes if the INS code received is not supported.
9.3.2
Example: Write EEPROM command
The following illustrates the data exchanges that occur during a write operation of 4 bytes: $04,
$09, $19, $97 to addresses $02, $03, $04, $05 in the current user zone.
Host
Start
Device
Val
CLA
**
INS
$B0
P1
**
P2
$02
P3
$04
INS
$B0
Data
$04
Data
$09
Data
$19
Data
$97
43
Class (ignored by CryptoMemory)
Write instruction
Address byte A1 (ignored by 0104CA - 0808CA)
Address byte A2 = $02
4 data bytes
Device responds with INS code
Byte to be written at start address $02.
Byte to be written at address $03
Byte to be written at address $04
Byte to be written at address $05
~ 5 ms
Write Cycle
Finish
Note
SW1
$90
SW2
$00
Write operation successful
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
9.4
9.4.1
Command Descriptions
Write User Zone: $B0
9.4.1.1
Functional
Figure 9-1.
Write User Zone Functional Command Description
Host
N data bytes
Device
Command
Address A1
Address A2
Number of bytes N
Data
...
Data
The Write User Zone command $B0 allows writing of data into the device's currently selected
user zone (the procedure for selecting a user zone is described below, (see “”).
The maximum number of bytes that may be written in a single WRITE operation is $10 and corresponds to the EEPROM page size. Each data byte within a page must only be loaded once. In
anti-tearing mode the maximum value for N is $08 for all devices. A write in anti-tearing mode is
activated with the Set User Zone command with the anti-tearing option (00 B4 0B zz 00), all subsequent writes to the user zone will be in anti-tearing mode.
If the host is not allowed to write in the zone, the device will return the "Command Unauthorized"
code ($69 $00) after it has received the P3 byte.
Figure 9-2.
Write User Zone Command Structure
Command Header
CLA
**
INS : Command P1 : Address 1 P2 : Address 2
P3 : N
0a
a
000n
--6-0
$B0
0000 0000
4 ---n0
Data Sent
Data(1)
d7--- ---d0
...
...
Data(N)
d7--- ---d0
44
5221A–CRYPT–10/08
9.4.2
Read User Zone: $B2
9.4.2.1
Functional
Figure 9-3.
Read User Zone Command Functional Description
Host
Device
Read Command
Address 1
Address 2
Number of bytes N
Data
...
Data
N data bytes
The Read User Zone command $B2 allows reading of data from the device's currently selected
user zone (the procedure for selecting a user zone is described below under “”). The byte
address is internally incremented following the transmission of each data byte. During a read
operation the address will "roll over" from the last byte of the current zone, to the first byte of the
same zone.
If the host is not allowed to read the zone, the device will return the "Command Unauthorized"
code ($69 $00) after it has received the header.
Figure 9-4.
Read User Zone Command Structure
Command Header
CLA
**
45
INS : Command P1 : Address 1 P2 : Address 2
0a6-- ---a0
$B2
0000 0000
Data Returned
P3 : N
n7--- ---n0
Data(1)
d7--- ---d0
...
...
Data(N)
d7--- ---d0
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
9.4.3
9.4.3.1
System WRITE: $B4
Functional
Figure 9-5.
System Write Command Functional Description
Host
N data bytes
Device
Command
Parameter P1
Parameter P2
Number of bytes N
Data
...
Data
The System Write command allows writing of system data to the device. Depending on the value
of the P1 parameter, the host may write data in the configuration zone program the fuses or set
the user zone.
Table 9-3.
System Write Command Detail
Command
CLA
INS
P1
P2
P3
Data (N)
Write Config Zone
$00
$B4
$00
addr
N ≤$10
N bytes
Write Fuses
$00
$B4
$01
fuse ID
$00
Send Checksum
$00
$B4
$02
$00
$02
Set User Zone
$00
$B4
$03
zone
$00
2 bytes
The anti-tearing function is controlled by P1: the host may choose to write in the configuration
zone with anti-tearing enabled by setting P1 = $08 instead of $00. Similarly, the host may
choose to activate anti-tearing for a user zone by carrying out the Set User Zone command with
P1 = $0B instead of $03. All subsequent Write User Zone commands are then carried out with
anti-tearing enabled until the next Set User Zone command. Anti-tearing should be turned off if
not required, as it would otherwise cause more write cycles than necessary.
46
5221A–CRYPT–10/08
Table 9-4.
9.4.4
System Write with Anti-Tearing
Command
CLA
INS
P1
P2
P3
Data (N)
Write Config Zone w/a-t
$00
$B4
$08
addr
N ≤$08
N bytes
Set User Zone w/a-t
$00
$B4
$0B
zone
$00
Write Config Zone
The maximum number of bytes to write for each call of the WRITE command is $16 and corresponds to the EEPROM page size. Each data byte within a page must only be loaded once. In
anti-tearing mode the maximum value for N is $08 for all devices.
If the address provided at P2 is an unauthorized address, the device will return the "Command
Unauthorized" code ($69 $00) after it has received the header. Since access rights vary throughout the configuration zone, the host may provide an authorized starting address, but a number of
bytes that causes the device to reach unauthorized data. In this case, the device will prevent the
internal write cycle and no bytes will be written in the EEPROM. At the end of the command the
"Command Unauthorized" code ($69 $00) will be returned instead of $90 $00 to indicate that no
write cycle occurred.
9.4.5
Write Fuses
Table 9-5.
Fuse Bytes
Fuse
Fuse ID (P2)
SEC
$07
FAB
$06
CMA
$04
PER
$00
The fuses may only be "programmed", that is written from '1' to '0'. The write fuses operation is
only allowed after successfully presenting the secure code (WRITE 7 password). The fuses
must be blown sequentially: FAB must be blown first, CMA may be blown only if FAB is ‘0’, and
PER only if CMA is ‘0’. The SEC fuse is blown at the Atmel factory to protect lot history
information.
9.4.6
Set User Zone
Before reading and writing data in the user zones, the host should select a zone with this command. At this time the host may choose whether anti-tearing should be active for this zone.
Figure 9-6.
System Write Command Structure
Command Header
CLA
**
47
INS : Command
$B4
P1
p7--- ---p0
Data Sent
P2
p7--- ---p0
P3
n7--- ---n0
Data(1)
d7--- ---d0
...
...
Data(N)
d7--- ---d0
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
9.5
9.5.1
System READ: $B6
Functional
System Read Command Functional Description
Host
Device
Read Command
Address 1
Address 2
Number of bytes N
Data
...
Data
N data bytes
The System Read command allows reading of system data from the device. Depending on the
value of the P1 parameter, the host may read the data in the configuration zone, or the fuses.
Table 9-6.
System Read Command Detail
Command
CLA
INS
P1
P2
P3
Read Config Zone
$00
$B6
$00
addr
N
Read Fuse Byte
$00
$B6
$01
$00
$01
Data (N)
9.5.2
Read Config Zone
To read 256 bytes, the host should set N = $00. This is true for any outgoing command, and is
defined by ISO 7816-3. If the address provided at P2 is an unauthorized address, the device will
return the "Command Unauthorized" code ($69 $00) after it has received the header. Since
access rights vary throughout the configuration zone, the host may provide an authorized starting address, but a number of bytes N that causes the device to reach unauthorized data. In this
case, the device will transmit the authorized bytes, but unauthorized bytes will be replaced by
the "fuse byte" (see below). At the end of this command the "Command Unauthorized" code
($69 $00) will be returned instead of $90 $00 to indicate that some of the bytes returned are not
valid.
9.5.3
Read Fuse Byte
Fuse data is returned in the form of a single byte. Bits 0 to 3 represent the fuse states; a value of
‘0’ indicates the fuse has been blown. Bits 4 to 7 are not used as Security Fuses and are
reserved by Atmel.
Figure 9-7.
Figure 9-8.
Fuse Byte Bit-Map
F7
F6
F5
F4
F3
F2
F1
F0
resv
resv
resv
resv
SEC
PER
CMA
FAB
System Read Command Structure
Command Header
CLA
**
INS : Command
$B6
P1
p7--- ---p0
Data Returned
P2
p7--- ---p0
P3
n7--- ---n0
Data(1)
d7--- ---d0
...
...
Data(N)
d7--- ---d0
48
5221A–CRYPT–10/08
9.5.4
9.5.4.1
Verify Password: $BA
Functional
Figure 9-9.
Verify Password Command Functional Description
Host
Device
Command
Password Index
PW1
PW2
PW3
3 password bytes
Read password indices : $10 to $17 for passwords 0,1,2 & 7.
Write password indices : $00 to $07 for passwords 0,1,2 & 7.
Secure code index : $07 (equivalent to WRITE Password 7).
Four password index bits "r" and "ppp" indicate the password to compare:
r = 0: WRITE password,
r = 1: READ password,
p2p1p0: Password set number.
Figure 9-10. Verify Password Command Structure
Command Header
CLA
**
INS : Command P1 : PW Index
$BA
000r 0p 2p1p0
Data Sent
P2
**
P3
$03
PW1
PW2
PW3
d7--- ---d0 d15 -- ---d8 d23-- --d16
If the maximum number of trials has been exceeded, the device will return $69 $00 instead of
the INS code, after receiving the header, to indicate the command is unauthorized. The device
increments the associated attempts count before verifying the password, to prevent attacks. If
the password is correct, the device memorizes this success, clears the attempts count and
returns $90 $00. If the password is wrong, the device simply returns $69 $00 after incrementing
the attempts count. The WRITE 7 password is also known as the Secure Code and must be
properly presented before access to the configuration zone is granted when personalizing the
device.
49
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
10. Initialization Example
The first step in initializing CryptoMemory is to determine what data is to be stored in the device
and what the security settings need to be to protect this data. Once defined, determine the
proper settings for CryptoMemory registers and select values for passwords. To initialize the
CryptoMemory device, the following sequence is recommended to take place in a secure location to protect sensitive data and passwords that may be loaded into the device.
10.1
Write Data to User Zones
In the default configuration from Atmel, all user zones have free access rights. Writing initial data
into the user zones should be done before setting security configurations. Use the Set User
Zone command and Write User Zone command to write initial data into the user zones. The
Read User Zone command may be used to verify the data written.
10.2
Unlock Configuration Zone
Before any data can be written to the configuration zone, it must be unlocked by presenting the
correct security code (Write 7 Password). Use the Verify Password command with the proper
secure code supplied by Atmel to unlock the configuration zone. Use the Read Config Zone
command to read back the security code at address $E9 for verification that the configuration
zone has been unlocked.
10.3
Write Data to Configuration Zone
Writing this data is accomplished by performing the Write Config Zone command at the
appropriate address location. The Read Config Zone command may be used to verify the data
written. As soon as values are written to the registers, keys, and passwords, they become
effective in determining the security of the user zones.
10.4
Set Security Fuses
Once all data is written and verified into user zones and the configuration zone the security fuses
should be set before the device is released from the secure location used for device initialization. There are three fuses, FAB, CMA and PER that must be set. These three fuses must be set
in the order listed (FAB, then CMA, then PER). The Write Fuse command is used to set each of
the three fuses individually. The Read Fuse command may be used to check the status of all
three fuses. Once all fuses have been set the Read Fuse command should return a value of
zero for the second nibble of the fuse byte.
The AT88SC0104CA is used for this example. A small pattern is written into the first two user
zones. Security for each of these two user zones and the associated register values are shown
in the table below. Simple values for passwords are used.
50
5221A–CRYPT–10/08
Table 10-1.
Zone Configuration Example
User Zone
Data
0
Zone 0 Data
1
2
3
Security Requirements
Access Register
Password/Key Register
None
$FF
$FF
Zone 1 Data
Read/Write Password (Set 1)
$7F
$F9
Zone 2 Data
Read/Write Authentication
(Set 2)
$DF
$BF
Zone 3 Data
Read/Write Password (Set 1),
Read/Write Authentication
(Set 1) with Encryption
Required
$57
$B9
The following shows the two-wire commands sent to the CryptoMemory device for the purpose
of initializing the device. The flow is consistent with the steps described above; comments have
been added as indicated with an asterisk (*).
*AT88SC0104CA Initialization Example
*WRITE DATA TO USER ZONES
*Set User Zone 0
00 B4 03 00 00
*Write data = Zone 0 Data
00 B0 00 00 0B 5A 6F 6E 65 20 30 20 44 61 74 61
*Set User Zone 1
00 B4 03 01 00
*Write data = Zone 1 Data
00 B0 00 00 0B 5A 6F 6E 65 20 31 20 44 61 74 61
*UNLOCK CONFIGURATION ZONE
00 BA 07 00 03 DD 42 97
*WRITE CODES IN CONFIGURATION ZONE
*Write Card Mfg Code = P001
00 B4 00 0B 04 50 30 30 31
*Write Identification Number = 00000000012345
00 B4 00 19 07 00 00 00 00 01 23 45
*Write Issuer Code = STATION 035
00 B4 00 40 10 53 54 41 54 49 4F 4E 20 30 33 35 00 00 00 00 00
*WRITE REGISTERS IN CONFIGURATION ZONE
*Write Registers AR1/PR1 = 7F F9
51
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
00 B4 00 22 02 7F F9 DF BF 57 B9
*WRITE PASSWORDS IN CONFIGURATION ZONE
*Write Passwords, read 7 = 10 00 01, write 7 = 11 00 11
00 B4 00 B9 07 11 00 11 FF 10 00 01
*READ ENTIRE CONFIGURATION ZONE TO VERIFY
00 B6 00 00 F0
*Device Response:
3B B2 11 00 10 80 00 01 10 10 FF 50 30 30 31 FF
8C AD A8 10 0A AB FF FF FB 00 00 00 00 01 23 45
FF FF 7F F9 FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
53 54 41 54 49 4F 4E 20 30 33 35 00 00 00 00 00
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF 11 00 11 FF 10 00 01
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
*SET SECURITY FUSES
*Set FAB Fuse
00 B4 01 06 00
*Set CMA Fuse
00 B4 01 04 00
*Set PER Fuse
00 B4 01 00 00
*Read Fuse Byte = X0
00 B6 01 00 01
*Device Response:
00
52
5221A–CRYPT–10/08
11. Absolute Maximum Ratings
Stresses beyond those listed under ‘Absolute Maximum Ratings’ may cause permanent damage
to the device. This is a stress rating only and functional operation of the device at these or any
other conditions beyond those indicated in the operational sections of this specification are not
implied. Exposure to absolute maximum rating conditions for extended periods of time may
affect device reliability.
Absolute Maximum Ratings
53
Operating Temperature
-40° C to +85° C
Storage Temperature
-65° C to + 150° C
Voltage on Any Pin with Respect to Ground
-0.7 to VCC + 0.7V
Maximum Operating Voltage
6.0V
DC Output Current
5.0mA
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
11.1
DC and AC Characteristics
Table 11-1.
DC Characteristics
Symbol
Parameter
Test Condition
Min
Max
Units
3.6
V
VCC
Supply Voltage
ICC
Supply Current (VCC = 3.3V)
Async READ at 3.57MHZ
5
mA
ICC
Supply Current (VCC = 3.3V)
Async WRITE at 3.57MHZ
5
mA
ICC
Supply Current (VCC = 3.3V)
Sync READ at 1MHZ
5
mA
ICC
Supply Current (VCC = 3.3V)
Sync WRITE at 1MHZ
5
mA
ISB
Standby Current (VCC = 3.3V)
VIN = VCC or GND
100
µA
VIL
SDA/IO Input Low Voltage
0
VCC x 0.2
V
VIL
CLK Input Low Voltage
0
VCC x 0.2
V
VIL
RST Input Low Voltage
0
VCC x 0.2
V
VIH
SDA/IO Input High Voltage
VCC x 0.7
VCC
V
VIH
SCL/CLK Input High Voltage
VCC x 0.7
VCC
V
VIH
RST Input High Voltage
VCC x 0.7
VCC
V
IIL
SDA/IO Input Low Current
0< VIL < VCC x 0.15
15
µA
IIL
SCL/CLK Input Low Current
0< VIL < VCC x 0.15
15
µA
IIL
RST Input Low Current
0< VIL < VCC x 0.15
50
µA
IIH
SDA/IO Input High Current
VCC x 0.7 < VIH < VCC
20
µA
IIH
SCL/CLK Input High Current
VCC x 0.7 < VIH < VCC
100
µA
IIH
RST Input High Current
VCC x 0.7 < VIH < VCC
150
µA
VOH
SDA/IO Output High Voltage
20K Ω external pull-up
VCC x 0.7
VCC
V
VOL
SDA/IO Output Low Voltage
IOL = 1mA
0
VCC x 0.15
V
IOH
SDA/IO Output High Current
VOH
20
µA
IOL
SDA/IO Output Low Current
VOL
10
mA
Notes:
2.7
Typ
1. Applicable over recommended operating voltage range from VCC = 2.7V to 3.6V
2. TAC = -400C to +850C (unless otherwise noted)
54
5221A–CRYPT–10/08
Table 11-2.
AC Characteristics
Symbol
Parameter
Min
Max
Units
FCLK
Async Clock Frequency
1
4
MHZ
FCLK
Sync Clock Frequency
0
1
MHZ
Clock Duty Cycle
40
60
%
TR
Rise Time - SDA/IO, RST
1
µS
TF
Fall Time - SDA/IO, RST
1
µS
TR
Rise Time - SCL/CLK
9% x period
µS
TF
Fall Time - SCL/CLK
9% x period
µS
TAA
Clock Low to Data Out Valid
250
nS
THD.STA
Start Hold Time
200
nS
TSU.STA
Start Set-up Time
200
nS
THD.DAT
Data In Hold Time
10
nS
TSU.DAT
Data In Set-up Time
100
nS
TSU.STO
Stop Set-up Time
200
nS
TDH
Data Out Hold Time
20
nS
TWR
Write Cycle Time
Notes:
5
mS
1. Applicable over recommended operating range from VCC = 2.7V to 3.6V
2. TAC = -400C to +850C, CL = 30pF (unless otherwise noted)
11.2
11.2.1
Timing Diagrams for Synchronous Communications
Bus Timing:
Figure 11-1. SCL: Serial Clock, SDA: Serial Data I/O
tHIGH
tF
tLOW
SCL
tSU.STA
tR
tLOW
tHD.STA
tHD.DAT
tSU.DAT
tSU.STO
SDA IN
tAA
tDH
SDA OUT
55
AT88SCXXXXCA
5221A–CRYPT–10/08
AT88SCXXXXCA
11.2.2
Write Cycle Timing:
Figure 11-2. SCL: Serial Clock, SDA: Serial Data I/O
SCL
SDA
8th BIT
ACK
WORDn
(1)
twr
STOP
CONDITION
Note:
START
CONDITION
The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of
the internal clear/write cycle.
Figure 11-3. Data Validity
DATA
CHANGE
ALLOWED
Figure 11-4. Start and Stop Definition
56
5221A–CRYPT–10/08
Figure 11-5. Output Acknowledge
12. Tamper Detection
CryptoMemory contains tamper detection sensors to detect operation outside of specified limits.
These sensors monitor the internal supply voltage and clock frequency. An additional sensor
detects high intensity light attacks. The die is disabled and will not function when tampering is
detected.
57
AT88SCXXXXCA
5221A–CRYPT–10/08
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5221A–CRYPT–10/08