AVAGO HSDL-3021-021 Irdaâ® data compliant low power 4.0 mbit/s with remote control infrared transceiver Datasheet

HSDL-3021
IrDA® Data Compliant Low Power 4.0 Mbit/s with
Remote Control Infrared Transceiver
Data Sheet
Description
The HSDL-3021 is a new generation low profile high
speed enhanced infrared (IR) transceiver module
that provides the capability of (1) interface between
logic and IR signals for through-air, serial, halfduplex IR data link, and (2) IR remote control
transmission for universal remote control
applications. The HSDL-3021 can be used for IrDA as
well as remote control application without the need
of any additional external components for
multiplexing.
The HSDL-3021 is fully compliant to IrDA® Physical
Layer specification version 1.4 low power from 9.6
kbit/s to 4.0 Mbit/s (FIR) and IEC825 Class 1 eye
safety standards.
The HSDL-3021 can be shut down completely to
achieve very low power consumption. In the shutdown mode, the PIN diode will be inactive and thus
produce very little photocurrent even under very
bright ambient light. It is also designed to interface to
input/output logic circuits as low as 1.5 V. These
features are ideal for battery operated mobile devices
such as PDAs and mobile phones that require low
power consumption.
Features
General Features
• Operating temperature from -25°C ~ 85°C
– Critical parameters are guaranteed over temperature and
supply voltage
• VCC supply 2.4 to 3.6 volts
• Miniature package
– Height: 2.5 mm
– Width: 8.0 mm
– Depth: 3.0 mm
• Integrated remote control LED driver
• Input/output interface voltage of 1.5 V
• Integrated EMI shield
• LED stuck-high protection
• Designed to accommodate light loss with cosmetic windows
• IEC 825-Class 1 eye safe
• Interface to various super I/O and controller devices
• Lead free package
IrDA® Features
• Fully compliant to IrDA 1.4 Physical Layer Low Power
Specifications from 9.6 kbit/s to 4.0 Mb/s
– Link distance up to 50 cm typically
• Complete shutdown for TxD_IrDA, RxD_IrDA and PIN diode
• Low power consumption
– Low shutdown current
Remote Control Features
• Wide angle and high radiant intensity
• Spectrally suited to remote control function at 890 nm
typically
• Typical link distance up to 8 meters (on-axis)
Applications
• Mobile data communication and universal remote control
– Mobile phones
– PDAs
– Webpads
R2
LEDA
1
IOVCC
IOVCC
2
VLED
CX3
CX4
LED
DRIVER
CX5
3
RxD
4
SD
5
SHIELD
TxD_IR
Rx PULSE
SHAPER
R1
VCC
CX1
CX2
VCC
6
TxD_RC
7
GND
8
Figure 1. HSDL-3021 block diagram.
8
7
6
5
4
3
2
1
Figure 2. Pinout.
Application Support Information
The Application Engineering
Group is available to assist you
with the application design
associated with HSDL-3021
infrared transceiver module.
You can contact them through
your local sales representatives
for additional details.
2
Order Information
Part Number
Packaging Type
Package
Quantity
HSDL-3021-021
Tape and Reel
Front Option
2500
Marking Information
The unit is marked with “HYWLL” on the shield
Y = Year
W = Work week
LL = Lot information
I/O Pins Configuration Table
Pin
Symbol
Description
I/O Type
Notes
1
LEDA
LED Anode
Note 1
2
IOVCC
Input/Output ASIC Voltage
Note 2
3
TxD_IR
IrDA Transmitter Data Input
Input. Active High
Note 3
4
RxD
IrDA Receive Data
Output. Active Low
Note 4
5
SD
Shutdown
Input. Active High
Note 5
6
VCC
Supply Voltage
7
TxD_RC
RC Transmitter Data Input
8
GND
Ground
Note 8
–
Shield
EMI shield
Note 9
Note 6
Input. Active High
Note 7
Notes:
1. Tied through external resistor, R2, to Vled. Refer to the table below for recommended series resistor value.
2. Connect to ASIC logic controller supply voltage or VCC. The voltage at this pin should be equal to or less than VCC.
3. This pin is used to transmit serial data when SD pin is low. If held high for longer than 50 µs, the LED is turned off. Do NOT float this pin.
4. This pin is capable of driving a standard CMOS or TTL load. No external pull-up or pull-down resistor is required. The pin is in tri-state when the
transceiver is in shutdown mode.
5. Complete shutdown of IC and PIN diode. The pin is used for setting IR receiver bandwidth, range of IR LED current and RC drive programming mode.
Refer to section on “Bandwidth Selection Timing” and “Remote Control Drive Modes” for more information. Do NOT float this pin. ***
6. Regulated, 2.4 V to 3.6 V.
7. Logic high turns on the RC LED. If held high longer than 50 µs, the RC LED is turned off. Do NOT float the pin.
8. Connect to system ground.
9. Connect to system ground via a low inductance trace. For best performance, do not connect directly to the transceiver GND pin.
Recommended Application Circuit Components
Component
Recommended Value
Note
R1
4.7 Ω, ± 5%, 0.25 watt
R2
2.7 Ω, for 2.4 < VLED ≤ 2.7 V;
3.3 Ω, for 2.7 < VLED ≤ 3.0 V
3.9 Ω, for 3.0 < VLED ≤ 3.3 V
4.7 Ω, for 3.3 < VLED ≤ 3.6 V
5.6 Ω, for 3.6 < VLED ≤ 4.2 V
10 Ω, for 4.2 < VLED ≤ 5 V
CX1, CX3, CX5
100 nF, ± 20%, X7R Ceramic
1
CX2, CX4
4.7 µF, ± 20%, Tantalum
1
Note:
1. CX1, CX2, CX3 & CX4 must be placed within 0.7 cm of HSDL-3021 to obtain optimum noise
immunity.
CAUTIONS: The BiCMOS inherent to the design of this component increases the component’s
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static
precautions be taken in handling and assembly of this component to prevent damage and/or
degradation which may be induced by ESD.
3
Absolute Maximum Ratings
For implementations where case to ambient thermal resistance is ≤ 50°C/W.
Parameter
Symbol
Min.
Max.
Units
Conditions
Storage Temperature
TS
-40
+100
°C
Operating Temperature
TA
-25
+85
°C
LED Anode Voltage
VLEDA
0
6.5
V
Supply Voltage
VCC
0
6
V
Input Voltage: TXD, SD/Mode
VI
0
5.5
V
Input/Output Supply Voltage: RXD
IOVCC
0
6
V
IR LED Current Pulse Amplitude
I(VLED)IR
190
mA
≤ 25% duty cycle,
≤ 90 µs pulse width
RC LED Current Pulse Amplitude
I(VLED)RC
400
mA
≤ 10% duty cycle,
≤ 90 µs pulse width
Recommended Operating Conditions
Parameter
Symbol
Min.
Operating Temperature
TA
Supply Voltage
Input/Output Voltage
Logic Input Voltage
for TXD, SD/Mode
Receiver Input
Irradiance
Max.
Units
-25
+85
°C
VCC
2.4
3.6
V
IOVCC
1.5
3.6
V
Logic High
VIH
IOVCC - 0.5
IOVCC
V
Logic Low
VIL
0
0.5
V
0.0090
500
0.0225
500
Logic High
Logic Low
Typ.
For in-band signals
≤ 115.2 kbit/s[3]
mW/cm2
EIH
EIL
0.3
µW/cm2
IR LED (Logic High) Current Pulse
Amplitude – SIR Mode
ILEDA
65
mA
IR LED (Logic High) Current Pulse
Amplitude – MIR/FIR Mode
ILEDA
150
mA
RC LED (Logic High) Current Pulse
Amplitude
ILEDA
250
mA
Receiver Data Rate
Ambient Light
0.0096
4.0
Conditions
0.576 Mbit/s ≤ in-band
signals ≤ 4.0 Mbit/s[3]
For in-band signals[3]
Mbit/s
See IrDA Serial Infrared Physical Layer
Link Specification, Appendix A for
ambient levels
Note:
3. An in-band optical signal is a pulse/sequence where the peak wavelength, lp, is defined as 850 ≤ lp ≤ 900 nm, and the pulse characteristics are
compliant with the IrDA Serial Infrared Physical Layer Link Specification v1.4.
4
Electrical and Optical Specifications
Specifications (Min. & Max. values) hold over the recommended operating conditions unless otherwise noted.
Unspecified test conditions may be anywhere in their operating range. All typical values (Typ.) are at 25°C with VCC set to
3.0 V and IOVCC set to 1.8 V unless otherwise noted.
Parameter
Symbol
Min.
Typ.
Max.
Units
Conditions
Viewing Angle
2q1/2
30
Peak Sensitivity Wavelength
lP
RxD_IrDA Output
Voltage
Logic High
VOH
IOVCC -0.5
IOVCC
V
Logic Low
VOL
0
0.4
V
tRPW(SIR)
1
4
µs
q1/2 ≤ 15°, CL = 9 pF
tRPW(MIR)
100
500
ns
q1/2 ≤ 15°, CL = 9 pF
tRPW(FIR)
80
175
ns
q1/2 ≤ 15°, CL = 9 pF
RxD_IrDA Pulse Width (Double) (FIR)[4]
tRPW(FIR)
200
290
ns
q1/2 ≤ 15°, CL = 9 pF
RxD_IrDA Rise & Fall Times
tr, tf
ns
CL = 9 pF
Receiver
RxD_IrDA Pulse Width (SIR)[4]
RxD_IrDA Pulse Width
(MIR)[4]
RxD_IrDA Pulse Width (Single)
Receiver Latency
(FIR)[4]
Time[5]
Receiver Wake Up Time[6]
°
885
nm
40
IOH = -200 µA, EI ≤ 0.3
µW/cm2
tL
100
µs
EI = 9.0 µW/cm2
tRW
200
µs
EI = 10 mW/cm2
Infrared (IR) Transmitter
IR Radiant Intensity (SIR Mode)
IEH
4
mW/sr
IR_ILEDA = 65 mA,
q1/2 ≤ 15°, TxD_IR ≥ VIH,
TA = 25°C
IR Radiant Intensity (MIR/FIR Mode)
IEH
10
mW/sr
IR_ILEDA = 150 mA,
q1/2 ≤ 15°, TxD_IR ≥ VIH,
TA = 25°C
IR Viewing Angle
2q1/2
30
IR Peak Wavelength
lP
TxD_IrDA Logic Levels
60
885
°
nm
High
VIH
IOVCC - 0.5
IOVCC
V
Low
VIL
0
0.5
V
High
IH
0.02
µA
VI ≥ VIH
Low
IL
-0.02
µA
0 ≤ VI ≤ VIL
tTW
180
ns
tPW(max)
25
TXD Pulse Width (SIR)
tPW(SIR)
1.6
µs
tPW (TXD_IR) = 1.6 µs at
115.2 kbit/s
TXD Pulse Width (MIR)
tPW(MIR)
217
ns
tPW (TXD_IR) = 217 ns at
1.152 Mbit/s
TXD Pulse Width (FIR)
tPW(FIR)
125
ns
tPW (TXD_IR) = 125 ns at
4.0 Mbit/s
TxD Rise & Fall Times (Optical)
t r, t f
600
ns
40
ns
tPW (TXD_IR) = 1.6 µs at
115.2 kbit/s
tPW (TXD_IR) = 125 ns at
4.0 Mbit/s
TxD_IrDA Input Current
Wake Up Time[7]
Maximum Optical Pulse
5
Width[8]
50
µs
Electrical and Optical Specifications (Cont’d.)
Parameter
Symbol
IR LED Anode On-State Voltage
(SIR Mode)
VON
(IR_LEDA)
IR LED Anode On-State Voltage
(MIR/FIR Mode)
(IR_LEDA)
Min.
VON
Typ.
Max.
Units
Conditions
2.19
V
IR_ILEDA = 65 mA,
IR VLED = 3.6 V, R = 13 Ω,
VI (TxD) ≥ VIH
2.22
V
IR_ILEDA = 150 mA,
IR VLED = 3.6 V, R = 13 Ω,
VI(TxD_IR) ≥ VIH
50
mW/sr
RC_ILEDA = 250 mA,
q1/2 ≤ 15°, TxD_RC ≥ VIH,
TA = 25°C
Remote Control (RC) Transmitter
RC Radiant Intensity
IEH
RC Viewing Angle
2q1/2
RC Peak Wavelength
lP
TxD_RC Logic Levels
TxD_RC Input Current
30
60
885
°
nm
High
VIH
IOVCC - 0.5
IOVCC
V
Low
VIL
0
0.5
V
High
IH
0.02
1
µA
VI ≥ VIH
Low
IL
-0.02
1
µA
0 ≤ VI ≤ VIL
VON
2.08
V
RC_ILEDA = 250 mA,
RC VLED = 3.6 V, R = 3.9 Ω,
VI(TxD_RC) ≥ VIH
RC LED Anode On-State Voltage
(RC_LEDA)
Transceiver
Input Current
Supply Current
High
IH
Low
IL
-1
0.01
1
µA
VI ≥ VIH
-0.02
1
µA
0 ≤ VI ≤ VIL
1
µA
VSD ≥ VCC - 0.5, TA = 25°C
2.9
mA
VI(TxD) ≤ VIL, EI = 0
mA
VI(TxD) ≥ VIL, EI = 10 mW/cm2
Shutdown ICC1
Idle
(Standby)
ICC2
2.0
Active
ICC3
3.5
Notes:
4. An in-band optical signal is a pulse/sequence where the peak wavelength, lP, is defined as 850 nm ≤ lP ≤ 900 nm, and the pulse characteristics
are compliant with the IrDA Serial Infrared Physical Layer Link Specification version 1.4.
5. For in-band signals 115.2 kbit/s where 9 µW/cm2 ≤ EI ≤ 500 mW/cm2.
6. For in-band signals 1.152 Mbit/s where 22 µW/cm2 ≤ EI ≤ 500 mW/cm2.
7. For in-band signals 4 Mbit/s where 22 µW/cm2 ≤ EI ≤ 500 mW/cm2.
8. Latency is defined as the time from the last TxD_IrDA light output pulse until the receiver has recovered full sensitivity.
9. Receiver Wake Up Time is measured from VCC power ON to valid RxD_IrDA output.
10, Transmitter Wake Up Time is measured from VCC power ON to valid light output in response to a TxD_IrDA pulse.
11. The Max Optical PW is defined as the maximum time which the IR LED will turn on. This is to prevent the long Turn On time for the IR LED.
6
Timing Waveforms
tpw
VOH
90%
50%
VOL
10%
tf
tr
Waveform 1. RXD output waveform
tpw
LED ON
90%
50%
10%
LED OFF
tr
tf
Waveform 2. LED optical waveform
TXD
LED
tpw (MAX.)
Waveform 3. TXD ”stuck on“ protection waveform
SD
SD
RX
LIGHT
TXD
RXD
TX
LIGHT
tRW
Waveform 4. Receiver wakeup time waveform
7
tTW
Waveform 5. TXD wakeup time waveform
IR MIR/FIR Mode - VLED_A vs ILED
2.5
2.3
2.4
2.2
2.3
2.2
2.1
VLED_A (V)
VLED_A (V)
IR SIR Mode - VLED_A vs ILED
2.4
2.0
1.9
1.8
2.1
2.0
1.9
1.8
1.7
1.7
1.6
1.6
1.5
000.0E+0
1.5
20.0E-3
40.0E-3
60.0E-3
80.0E-3
0
100.0E-3
0.05
0.1
ILED (A)
IR SIR Mode - Radiant Intensity vs ILED
RADIANT INTENSITY (mW/sr)
RADIANT INTENSITY (mW/sr)
0.25
70
20
15
10
5
60
50
40
30
20
10
0
20.0E-3
40.0E-3
60.0E-3
ILED (A)
8
0.2
IR MIR/FIR Mode - Radiant Intensity vs ILED
25
0
000.0E+0
0.15
ILED (A)
80.0E-3
100.0E-3
0
0.05
0.1
0.15
ILED (A)
0.2
0.25
HSDL-3021 Package Dimensions
MOUNTING
CENTER
4.0
1.025
2.05
CL
RC EMITTER AND
IrDA EMITTER
RECEIVER
2.5
1.175
0.35
0.65
0.80
2.55
2.85
4.0
8.0
3.0
2.9
1.85
CL
8
0.6
7
6
5
4
3
3.325
P 0.95 X 7 = 6.65
9
2
1
PIN 1
PIN 2
PIN 3
PIN 4
PIN 5
VLED
IOVCC
TxDR
RxD
SD
PIN 6
VDD
PIN 7
PIN 8
TxD RC
GND
UNIT: mm
PRODUCTION TOLERANCE: ± 0.2mm
HSDL-3021 Tape and Reel Dimensions
4.0 ± 0.1
UNIT: mm
1.75 ± 0.1
+ 0.1
∅ 1.5 0
1.5 ± 0.1
POLARITY
PIN 8: VLED
7.5 ± 0.1
8.4 ± 0.1
16.0 ± 0.2
PIN 1: GND
0.4 ± 0.05
3.4 ± 0.1
8.0 ± 0.1
2.8 ± 0.1
EMPTY
PROGRESSIVE DIRECTION
PARTS MOUNTED
LEADER
(400 mm MIN.)
(40 mm MIN.)
EMPTY
(40 mm MIN.)
OPTION #
"B"
"C"
QUANTITY
001
178
60
500
021
330
80
2500
UNIT: mm
DETAIL A
2.0 ± 0.5
B
C
∅ 13.0 ± 0.5
R 1.0
LABEL
21 ± 0.8
DETAIL A
16.4 +02
2.0 ± 0.5
10
HSDL-3021 Moisture Proof Packaging
All HSDL-3021 options are shipped in moisture
proof package. Once opened, moisture
absorption begins.
Recommended Storage Conditions
This part is compliant to JEDEC Level 4.
Time From Unsealing To Soldering
After removal from the bag, the
parts should be soldered within
three days if stored at the recommended storage conditions. When
MBB (Moisture Barrier Bag) is
opened and the parts are exposed
to the recommended storage
conditions more than three days
but less than 15 days, the parts
must be baked before reflow to
prevent damage to the parts.
Storage Temperature 10°C to 30°C
Relative Humidity
UNITS IN A SEALED
MOISTURE-PROOF
PACKAGE
Below 60% RH
Note: Using the parts that are
exposed for more than 15 days is
not recommended.
PACKAGE IS OPENED
(UNSEALED)
Baking Conditions
ENVIRONMENT
LESS THAN 30°C,
AND LESS THAN
60% RH
YES
Package
Temp
Time
In reels
60°C
≥ 48 hours
In bulk
100°C
≥ 4 hours
125°C
≥ 2 hours
Note: Baking should only be
done once.
NO BAKING
IS NECESSARY
YES
PACKAGE IS
OPENED LESS
THAN 72 HOURS
NO
PERFORM RECOMMENDED
BAKING CONDITIONS
Figure 3. Baking conditions chart.
11
NO
Recommended Reflow Profile
MAX. 260°C
255
T – TEMPERATURE – (°C)
R3
R4
230
217
200
R2
180
60 sec.to 90 sec.
ABOVE
217°C
150
R1
120
R5
80
25
50
0
P1
HEAT
UP
Process Zone
Heat Up
Solder Paste Dry
Solder Reflow
Cool Down
Time maintained above
liquidus point, 217°C
Peak Temperature
Time within 5°C of actual
Peak Temperature
Time 25°C to Peak Temperature
100
Symbol
P1, R1
P2, R2
P3, R3
P3, R4
P4, R5
The reflow profile is a straight-line
representation of a nominal
temperature profile for a convective
reflow solder process. The
temperature profile is divided into
four process zones, each with
different DT/Dtime temperature
change rates, or duration. The DT/
Dtime rates, or duration, are
detailed in the above table. The
temperatures are measured at the
component to printed circuit board
connections.
In process zone P1, the PC board
and HSDL-3021 pins are heated to a
temperature of 150°C to activate
the flux in the solder paste. The
temperature ramp up rate, R1, is
limited to 3°C per second to allow
for even heating of both the PC
board and HSDL-3021 pins.
12
150
200
t-TIME (SECONDS)
P2
P3
SOLDER PASTE DRY
SOLDER
REFLOW
250
300
P4
COOL
DOWN
DT
25°C to 150°C
150°C to 200°C
200°C to 260°C
260°C to 200°C
200°C to 25°C
>217°C
Maximum DT/DTime or Duration
3°C/s
100s to 180s
3°C/s
-6°C/s
-6°C/s
60s to 90s
260°C
–
–
20s to 40s
25°C to 260°C
8 mins
Process zone P2 should be of
sufficient time duration (100 to 180
seconds) to dry the solder paste.
The temperature is raised to a level
just below the liquidus point of the
solder.
of weak and unreliable connections.
The temperature is then rapidly
reduced to a point below the solidus
temperature of the solder to allow
the solder within the connections to
freeze solid.
Process zone P3 is the solder
reflow zone. In zone P3, the
temperature is quickly raised above
the liquidus point of solder to 260°C
(500°F) for optimum results. The
dwell time above the liquidus point
of solder should be between 60 and
90 seconds. This is to assure proper
coalescing of the solder paste into
liquid solder and the formation of
good solder connections. Beyond
the recommended dwell time, the
intermetallic growth within the
solder connections becomes
excessive, resulting in the formation
Process zone P4 is the cool down
after solder freeze. The cool down
rate, R5, from the liquidus point of
the solder to 25°C (77°F) should not
exceed 6°C per second maximum.
This limitation is necessary to allow
the PC board and HSDL-3021 pins
to change dimensions evenly,
putting minimal stresses on the
HSDL-3021.
It is recommended to perform
reflow soldering no more than
twice.
Appendix A: HSDL-3021 SMT Assembly Application Note
Solder Pad, Mask and Metal Stencil
METAL STENCIL
FOR SOLDER PASTE
PRINTING
STENCIL
APERTURE
LAND
PATTERN
SOLDER
MASK
PCBA
Figure 1. Stencil and PCBA.
Recommended Land Pattern
MOUNTING CENTER
2.7
MOUNTING CENTER
1.25
2.05
0.10
0.775
1.75
FIDUCIAL
0.475
0.6
0.35
1.425
2.375
Figure 2.
13
Recommended Metal solder Stencil
Aperture
It is recommended that only a
0.152 mm (0.006 inch) or a
0.127 mm (0.005 inch) thick
stencil be used for solder paste
printing. This is to ensure
adequate printed solder paste
volume and no shorting. See
Table 1 below the drawing for
combinations of metal stencil
aperture and metal stencil
thickness that should be used.
Aperture opening for shield pad
is 3.05 mm x 1.1 mm as per land
pattern.
APERTURES AS PER
LAND DIMENSIONS
t
w
l
Figure 3. Solder stencil aperture.
Table 1.
Aperture Size(mm)
Adjacent Land Keepout and Solder
Mask Areas
Adjacent land keepout is the
maximum space occupied by the
unit relative to the land pattern.
There should be no other SMD
Stencil Thickness, t (mm)
Length, l
Width, w
0.127 mm
1.75 ± 0.05
0.55 ± 0.05
0.11 mm
2.4 ± 0.05
0.55 ± 0.05
mid length of the pads for unit
alignment.
components within this area.
The minimum solder resist strip
width required to avoid solder
bridging adjacent pads is
0.2 mm. It is recommended that
two fiducial crosses be placed at
Note: Wet/Liquid Photo-imaginable
solder resist/mask is recommended.
j
k
h
l
SOLDER MASK
14
DIMENSION
mm
h
0.2
l
3.0
k
3.85
j
10.1
Appendix B: PCB Layout Suggestion
The effects of EMI and power
supply noise can potentially
reduce the sensitivity of the
receiver, resulting in reduced
link distance. The PCB layout
played an important role to
obtain a good PSRR and EM
immunity resulting in good
electrical performance. Things to
note:
1. The ground plane should be
continuous under the part,
but should not extend under
the shield trace.
2. The shield trace is a wide,
low inductance trace back to
the system ground. CX1, CX2,
CX3, CX4 and CX5 are
optional supply filter
capacitors; they may be left
out if a clean power supply is
used.
3. VLED can be connected to
either unfiltered or
unregulated power supply.
The bypass capacitors should
be connection before the
current limiting resistor R2
respectively. In a noisy
environment, including
15
capacitor CX3and CX4 can
enhance supply rejection.
CX3 that is generally a
ceramic capacitor of low
inductance providing a wide
frequency response while
CX4 is tantalum capacitor of
big volume and fast
frequency response. The use
of a tantalum capacitor is
more critical on the VLED
line, which carries a high
current.
4. VCC pin can be connected to
either unfiltered or
unregulated power supply.
The Resistor, R1 together
with the capacitors, CX1 and
CX2 acts as the low pass
filter.
5. IOVCC is connected to the
ASIC voltage supply or the
VCC supply. The capacitor,
CX5 acts as the bypass
capacitor.
6. Preferably a multi-layered
board should be used to
provide sufficient ground
plane. Use the layer
underneath and near the
transceiver module as Vcc,
and sandwich that layer
between ground connected
board layers. The diagram
below demonstrate an
example of a 4 layer board:
• Top Layer: Connect the
metal shield and module
ground pin to bottom
ground layer;
Place the bypass capacitors
within 0.5 cm from the VCC
and ground pin of the
module.
• Layer 2: Critical ground
plane zone. 3 cm in all
directions around the
module. Connect to a
clean, noiseless ground
node (e.g., bottom layer).
• Layer 3: Keep data bus
away from critical ground
plane zone.
• Bottom layer: Ground
layer. Ground noise
<75 mVp-p. Should be
separated from ground
used by noisy sources.
NOISE SOURCES TO BE PLACED AS FAR AWAY
FROM THE TRANSCEIVER AS POSSIBLE
TOP LAYER
R
1
CX1
CX2
CX3
CX5
R
2
CX4
LAYER 3
LAYER 3
LEGEND: GROUND VIA
BOTTOM LAYER (GND)
The area underneath the module
at the second layer, and 3 cm in
all directions around the module,
is defined as the critical ground
plane zone. The ground plane
should be maximized in this zone.
Top Layer
16
Refer to application note AN1114
or the Avago IrDA Data Link
Design Guide for details. The
layout below is based on a
2-layer PCB.
Bottom Layer
Appendix C: General Application
Guide for the HSDL-3021 infrared
IrDA Compliant 4 Mb/s Transceiver
Description
The HSDL-3021, a wide-voltage
operating range infrared
transceiver is a low-cost and small
form factor device that is
designed to address the mobile
computing market such as PDAs,
as well as small embedded mobile
products such as digital cameras
and cellular phones. It is
spectrally suited to universal
remote control transmission
function at 940 nm typically. It is
fully compliant to IrDA 1.4 low
power specification up 4Mb/s and
support most remote control
codes. The design of HSDL-3021
TOUCH PANEL
also includes the following unique
features :
• Spectrally suited to universal
remote control transmission
function at 940 nm typically
• Low passive component count
• Shutdown mode for low power
consumption requirement
• Direct interface with I/O logic
circuit
Selection of Resistor R2
Resistor R2 should be selected to
provide the appropriate peak
pulse IR and RC LED current
respectively at different ranges of
VCC as shown on page 3 under
“Recommended Application
circuit components.”
STN/TFT
LCD PANEL
KEY PAD
LCD CONTROL
A/D
PERIPHERIAL INTERFACE
PWM
Interface to the Recommended I/O
Chip
The HSDL-3021’s TXD data input
is buffered to allow for CMOS
drive levels. No peaking circuit or
capacitor is required. Data rate
from 9.6 kb/s to 4 Mb/s is
available at RXD pin. The
TXD_RC, pin 7, together with
LEDA, pin1, is used to select the
remote control transmit mode.
Alternatively, the TXD_IR, pin 3,
together with LEDA, pin 1, is used
for infrared transmit selection.
Following shows the hardware
reference design with HSDL-3021.
*Detailed configuration of HSDL3021 with the controller chip is
shown in Figure 3.
LCD BACKLIGHT
PANEL
*HSDL-3021
MOBILE
APPLICATION
CHIPSET
IrDA
INTERFACE
AC97
SOUND
MEMORY
EXPANSION
LOGIC BUS
DRIVER
ROM
FLASH
MEMORY I/F
POWER
MANAGEMENT
BASEBAND I2S
CONTROLLER
PCM SOUND
AUDIO INPUT
ANTENNA
SDRAM
Figure 2: Mobile application platform.
17
The use of the infrared techniques for data communication
has increased rapidly lately and
almost all mobile application
processors have built in the IR
port. This does away with the
external Endec and simplifies the
interfacing to a direct connection
between the processor and the
transceiver. The next section
discusses interfacing
configuration with a general
processor.
General Mobile Application Processor
VCC
CX1
R1
GND
CX2
IOVCC
VCC
IOVCC
GND
IOVCC
CX5
GND
GPIO
TxD_RC
IR_RxD
RxD
SD
GPIO
TxD_IR
IR_TxD
VLED
100 kW
R3
100 kW
VLEDA
HSDL-3021
CX3
GND
GND
CX4
GND
Figure 3: HSDL-3021 configuration with general mobile architecture processor.
The transceiver is directly
interfaced with the
microprocessor provided its
support infrared communication
commonly known as Infrared
Communications Port (ICP). The
ICP supports both SIR data rates
up to 115.2 kps and sometimes
FIR data with data rates up to
18
4 Mbps. The remote control
commands can be sent to one of
the available General Purpose IO
pins or the UART block with IrDA
functionality. It should be
observed that although both IrDA
data transmission and Remote
control transmission is possible
simultaneously by the hardware,
the software is required to resolve
this issue to prevent the mixing
and corruption of data while
being transmitted over the free
air. The above Figure 3 illustrates
a reference interfacing to
implement both IR and RC
functionality with HSDL-3021.
Remote Control Operation
The HSDL-3021 is spectrally
suited to universal remote
control transmission function at
940 nm typically. Remote control
applications are not governed by
any standards, owing to which
there are numerous remote
codes in market. Each of those
standards results in receiver
modules with different
sensitivities, depending on the
carrier frequencies and
responsively to the incident light
wavelength. Remote control
carrier frequencies are in the
range of 30 KHz to 60 KHz (for
details of some the frequently
used carrier frequencies, please
refer to AN1314). Some common
carrier frequencies and the
corresponding SA-1110 UART
frequency and baud rate divisor
are shown in Table 3.
Table 3.
Remote Control Carrier
Frequency (kHz)
SA-1110 UART
Frequency (kHz)
Baud Rate Divisor
30
28.8
8
32, 33
32.9
7
36, 36.7, 38, 39.2, 40
38.4
6
56
57.6
4
19
Window Design
To insure IrDA compliance, there
are some constraints on the
height and width of the optical
window. The minimum
dimensions ensure that the IrDA
cone angles are met, and there is
no vignetting, and the maximum
dimensions ensure that the effects
of stray light are minimized. The
minimum size corresponds to a
cone angle of 30 degrees, the
maximum to a cone angle of 60
degrees.
The drawing below shows the
module positioned in front of a
window.
Minimum and Maximum Window Sizes
Dimensions are in mm.
Depth (Z)
Y Min.
X Min.
0
1.70
6.80
1
2.23
7.33
2
2.77
7.87
3
3.31
8.41
4
3.84
8.94
5
4.38
9.48
6
4.91
10.01
7
5.45
10.55
8
5.99
11.09
9
6.52
11.62
10
7.06
12.16
Window Height Y vs. Module Depth Z
16
Z
Y
X
WINDOW HEIGHT Y – mm
14
12
10
ACCEPTABLE
RANGE
8
6
4
2
X is the width of the window, Y is
the height of the window, and Z is
the distance from the HSDL-3021
to the back of the window.
The equations that determine the
size of the window are as follows:
X = 5.1 + 2(Z + D) tan q
Y = 2(Z + D) tan q
Where q is the required half angle
for viewing. For the IrDA
minimum, it is 15 degrees, for the
IrDA maximum it is 30 degrees.
(D is the depth of the LED image
inside the part, 3.17 mm.) These
equations result in the following
tables and graphs:
20
0
2
4
6
8
10
MODULE DEPTH Z – mm
Window Width X vs. Module Depth Z
22
20
WINDOW WIDTH X – mm
The distance from the center of
the LED lens to the center of the
photodiode lens is 5.1 mm.
0
18
16
14
ACCEPTABLE
RANGE
12
10
8
6
0
2
4
6
8
MODULE DEPTH Z – mm
10
Y Max.
3.66
4.82
5.97
7.12
8.28
9.43
10.59
11.74
12.90
14.05
15.21
X Max.
8.76
9.92
11.07
12.22
13.38
14.53
15.69
16.84
18.00
19.15
20.31
APERTURE HEIGHT (Y) vs. MODULE DEPTH
10
16
9
APERTURE HEIGHT (Y) – mm
APERTURE WIDTH (X) – mm
APERTURE WIDTH (X) vs. MODULE DEPTH
18
14
12
10
8
6
4
X MIN.
2
0
8
7
6
5
4
3
2
Y MIN.
1
0
1
2
3
4
5
0
6
0
MODULE DEPTH (Z) – mm
1
2
3
4
MODULE DEPTH (Z) – mm
For the modules depth values
that are not shown on the tables
above, the minimum X and Y
values can be interpolated.
Window Material
Almost any plastic material will
work as a window material.
Polycarbonate is recommended.
The surface finish of the plastic
should be smooth, without any
texture. An IR filter dye may be
used in the window to make it
look black to the eye, but the
total optical loss of the window
should be 10% or less for best
optical performance. Light loss
should be measured at 875 nm.
The recommended plastic
materials for use as a cosmetic
window are available from
General Electric Plastics.
Recommended Plastic Materials:
Material #
Light Transmission
Haze
Refractive Index
Lexan 141
88%
1%
1.586
Lexan 920A
85%
1%
1.586
Lexan 940A
85%
1%
1.586
Note: 920A and 940A are more flame retardant than 141.
Recommended Dye: Violet #21051 (IR transmissant above 625 mm)
21
5
6
Shape of the Window
From an optics standpoint, the
window should be flat. This
ensures that the window will not
alter either the radiation pattern
of the LED, or the receive pattern
of the photodiode. If the window
must be curved for mechanical or
industrial design reasons, place
the same curve on the backside of
the window that has an identical
radius as the front side. While this
will not completely eliminate the
lens effect of the front curved
surface, it will significantly reduce
the effects. The amount of change
in the radiation pattern is
dependent upon the material
chosen for the window, the radius
of the front and back curves, and
the distance from the back surface
to the transceiver. Once these
items are known, a lens design
can be made which will eliminate
the effect of the front surface
curve. The following drawings
show the effects of a curved
window on the radiation pattern.
In all cases, the center thickness
of the window is 1.5 mm, the
window is made of polycarbonate
plastic, and the distance from the
transceiver to the back surface of
the window is 3 mm.
Flat Window
(First Choice)
Curved Front and Back
(Second Choice)
Curved Front, Flat Back
(Do not use)
22
Appendix E: General Application
Guide for the HSDL-3021
Remote Control Drive Modes
The HSDL-3021 can operate in
the single-TxD programmable
mode or the two-TxD direct
transmission mode.
LED in both IrDA mode as well as
Remote Control mode of
operation. This mode can be used
when the external controller uses
only one transmit pin for both
IrDA as well RC mode of
operation.
Single-TxD Programmable Mode
In the single-TxD programmable
mode, only one input pin (TxD_IR
input pin) is used to drive the
The transceiver is in default mode
(IrDA-SIR) when powered up. The
user needs to apply the following
programming sequence to both
the TxD_IR and SD inputs to
enable the transceiver to operate
in either the IrDA or remote
control mode.
tC
tTL
tA
tC
tB
tH
SHUTDOWN
(ACTIVE HIGH)
TxIR
(ACTIVE HIGH)
• • •
SHUTDOWN
DRIVE
IrDA LED
RC
MODE
tH
tH
• • •
• • •
RESET
DRIVE
RC LED
DRIVE
IrDA LED
TxRC
(GND)
Mode Programming Timing Table
Parameter
Symbol
Min
Typ
Max
Unit
Notes
The following timings describe input constraints required using the active serial interface for mode programming with pins
SD, TxIR, and TxRC:
Shutdown Input Pulse Width,
at Pin SD
tSDPW
30
-
∞
µs
Will activate complete shutdown
SD Mode Setup Time
tA
200
-
-
ns
Setup for mode programming
TxIR Pulse Width for RC Mode
tB
200
-
-
ns
RC drive enabled with pin TxIR
SD Programming Pulse Width
Note: ( tA + tB ) < tC < tSDPW
tC
-
-
5.0
µs
Pulse width mode programming
TxIR Setup Time for
SIR or MIR/FIR Mode
tS
50
-
-
ns
Setup time for IrDA bandwidth selection
TxIR or SD Hold Time to Latch
SIR, MIR/FIR or RC Mode
tH
50
-
-
ns
Hold time for IrDA or RC modes
23
Two-TxD Direct Transmission Mode
In the two-TxD direct
transmission mode, the LED can
be driven separately for IrDA and
RC mode of operation through the
TxD_IR and TxD_RC pins
respectively. This mode can be
used when the external controller
utilizes separate transmit pins for
IrDA and RC operation modes,
thereby eliminating the need for
external multiplexing.
Transceiver Control I/O Truth Table for Two-TxD Direct Transmission Mode
SD
TxIR
TxRC
LED
Remarks
0
0
0
OFF
IR Rx enabled. Idle mode
0
0
1
ON
Remote control operation
0
1
0
ON
IrDA Tx operation
0
1
1
-
Not recommended (both transmitters off)
1
0
0
OFF
Shutdown mode*
*The shutdown condition will set the transceiver to the default mode (IrDA-SIR)
Please refer to the Transceiver
I/O truth table for more detail.
Bandwidth Selection Timing
The power on state should be the
IrDA SIR mode. The data transfer
rate must be set by a programming sequence using the TxD_IR
and SD inputs as described below.
Note: SD should not exceed the
maximum, tC ≤ 5 µs, to prevent shutdown.
Setting to the High Bandwidth
MIR/FIR Mode (0.576 Mbits/s to
4 Mbits/s)
1. Set SD input to logic “HIGH.”
Wait tA ≥ 200 ns.
2. Set TxD_IR input to logic
“HIGH.” Wait tS ≥ 50 ns.
3. Set SD to logic “LOW” (this
negative edge latches state of
TxD_IR, which determines
speed setting).
4. After waiting tH ≥ 50 ns
TxD_IR can be set to logic
“LOW.” TxD_IR is now reenabled as normal IrDA
transmit input for the High
Bandwidth MIR/FIR mode.
24
Setting to the Low Bandwidth SIR
Mode (2.4 kbits/s to 115.2 kbits/s)
1. Set SD input to logic “HIGH.”
2. Set TxIR input to logic
“LOW.” Wait tS ≥ 50 ns.
3. Set SD to logic “LOW” (this
negative edge latches state of
TxIR, which determines
speed setting).
4. TxIR must be held for tS ≥
50 ns. TxIR is now re-enabled
as normal IrDA transmit
input for the Low Bandwidth
SIR mode.
50%
50%
SD
tC
tA
50%
TxIR
tS
tH
HIGH: MIR/FIR
50%
LOW: SIR
Power-Up Sequencing
To have a proper operation for HSDL-3201, the
following power-up sequencing must be followed.
a) It is strongly recommended that VCC must come
prior to IOVCC.
c) Setting IOVCC high before VCC while SD is high
is forbidden.
VCC
VCC
tIOVCCDL ≥ 0 µs
IOVCC
IOVCC
tSDDL ≥ 30 µs
SD
SD
tSDPW ≥ 30 µs
b) It is not recommended to turn on IOVCC before
VCC while SD is low. However, for application
that IOVCC comes prior to VCC while SD is low,
SD pin has to be set high to assure proper
functionality.
VCC
IOVCC
tSDDL ≥ 30 µs
SD
tSDPW ≥ 30 µs
Note:
tIOVCCDL = IOVCC delay time
tSDDL = SD delay time
tSDPW = shutdown input pulse width
25
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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2007 Avago Technologies Limited. All rights reserved. Obsoletes AV01-0697EN
AV02-0229EN March 16, 2007