TI1 INA271AQDRQ1 Voltage-output unidirectional-measurement current-shunt monitor Datasheet

INA270-Q1, INA271-Q1
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SBOS401B – JULY 2007 – REVISED FEBRUARY 2010
VOLTAGE-OUTPUT UNIDIRECTIONAL-MEASUREMENT CURRENT-SHUNT MONITORS
Check for Samples: INA270-Q1, INA271-Q1
FEATURES
APPLICATIONS
•
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1
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Qualified for Automotive Applications
Wide Common-Mode Range: –16 V to 80 V
CMRR: 120 dB
Accuracy:
– ±2.5-mV Offset (Max)
– ±1% Gain Error (Max)
– 20-mV/°C Offset Drift (Max)
– 55-ppm/°C Gain Drift (Max)
Bandwidth: Up to 130 kHz
Two Transfer Functions Available:
– 14 V/V (INA270)
– 20 V/V (INA271)
Quiescent Current: 900 mA (Max)
Power Supply: 2.7 V to 18 V
Provision for Filtering
Power Management
Automotive
Telecom Equipment
Notebook Computers
Battery Chargers
Cell Phones
Welding Equipment
D PACKAGE
(TOP VIEW)
IN–
1
8
IN+
GND
2
7
NC
PRE OUT
3
6
V+
BUF IN
4
5
OUT
NC – No internal connection
DESCRIPTION/ORDERING INFORMATION
The INA270 and INA271 family of current-shunt monitors with voltage output can sense voltage drops across
current shunts at common-mode voltages from –16 V to 80 V, independent of the supply voltage. The INA270
and INA271 pinouts readily enable filtering.
The INA270 and INA271 are available with two output voltage scales: 14 V/V and 20 V/V. The 130-kHz
bandwidth simplifies use in current-control loops.
The INA270 and INA271 operate from a single 2.7-V to 18-V supply, drawing a maximum of 900 mA of supply
current. They are specified over the extended operating temperature range of –40°C to 125°C and are offered in
an SO-8 package.
ORDERING INFORMATION (1)
TA
–40°C to 125°C
(1)
(2)
PACKAGE (2)
GAIN
14
20
SOIC – D
Reel of 2500
ORDERABLE PART NUMBER
TOP-SIDE MARKING
INA270AQDRQ1
INA270
INA271AQDRQ1
INA271
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
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1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2010, Texas Instruments Incorporated
INA270-Q1, INA271-Q1
SBOS401B – JULY 2007 – REVISED FEBRUARY 2010
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
FUNCTIONAL BLOCK DIAGRAM
RS
−16 V to +80 V
Supply
Load
Single-Pole Filter
Capacitor
+2.7 V to +18 V
IN+
IN–
5 kW
PRE OUT
BUF IN
0.01 µF
V+
0.1 µF
5 kW
OUT
A1
96 kW
A2
RL
INA270
GND
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VALUE
VS
Supply voltage
18 V
Differential analog input voltage range (VIN+ – VIN–)
–18 V to 18 V
Common-mode analog input voltage range
–16 V to 80 V
VO
Analog output voltage range (OUT and PRE OUT)
II
Input current (any pin)
qJA
Package thermal impedance (2)
TJ
Maximum junction temperature
TA
Operating free-air temperature range
Tstg
Storage temperature range
ESD
(1)
(2)
(3)
2
(GND – 0.3) V to (V+ + 0.3) V
5 mA
(3)
Electrostatic discharge rating
97.1°C/W
150°C
–40 to 125°C
–65 to 150°C
Human-Body Model HBM)
2000 V
Machine Model (MM)
100 V
Charged-Device Model (CDM)
1000 V
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Maximum power dissipation is a function of TJ(max), qJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/qJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
The package thermal impedance is calculated in accordance with JESD 51-7.
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SBOS401B – JULY 2007 – REVISED FEBRUARY 2010
RECOMMENDED OPERATING CONDITIONS
MIN
MAX
VS
Supply voltage
2.7
18
UNIT
V
TA
Operating free-air temperature
–40
125
°C
TYP
MAX
UNIT
0.15
(VS – 0.2)/
Gain
V
80
V
ELECTRICAL CHARACTERISTICS
VS = 5 V, VCM = 12 V, VSENSE = 100 mV, PRE OUT connected to BUF IN (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
(1)
MIN
Input
VSENSE
Full-scale input voltage
VCM
Common-mode input voltage
CMRR
Common-mode rejection
VOS
Offset voltage, RTI (2)
ΔVOS/ΔT
Input offset voltage
temperature coefficient
PSR
Offset voltage power-supply
rejection
IIB
ZO
VSENSE = VIN+ + VIN–
Full range
–16
VIN+ = –16 V to 80 V
25°C
80
120
VIN+ = 12 V to 80 V
Full range
100
120
25°C
±0.5
Full range
dB
2.5
±3
mV
Full range
2.5
20
mV/°C
VS = 2.7 V to 18 V, VCM = 18 V
Full range
5
100
mV/V
Input bias current
IN– pin
Full range
±8
±16
Output impedance (3)
PRE OUT pin
25°C
96
kΩ
Buffer input bias current
25°C
–50
nA
Buffer input bias current
temperature coefficient
25°C
±0.3
nA/°C
Output (VSENSE ≥ 20 mV)
mA
(4)
G
Gain
GBUF
Output buffer gain
Total gain error
INA270
INA271
VSENSE = 20 mV to 100 mV
Total gain error
temperature coefficient
25°C
14
V/V
20
25°C
2
25°C
±0.2
V/V
±1
%
Full range
±2
Full range
50 ppm/°C
25°C
Total output error (5)
ZO
25°C
Full range
±0.75
±2.2
±1
±3
%
Nonlinearity error
VSENSE = 20 mV to 100 mV
25°C
±0.002
%
Output impedance
OUT pin
25°C
1.5
Ω
Maximum capacitive load
No sustained oscillation
25°C
10
nF
Voltage Output (6)
(1)
(2)
(3)
(4)
(5)
(6)
Swing to V+ power-supply rail
RL = 10 kΩ to GND
Full range
V+ – 0.05
V+ – 0.2
V
Swing to GND
RL = 10 kΩ to GND
Full range
VGND +
0.003
VGND +
0.05
V
Full range is –40°C to 125°C.
RTI = referred to input
Initial resistor variation is ±30% with an additional –2200-ppm/°C temperature coefficient.
For output behavior when VSENSE < 20 mV, see Application Information
Total output error includes effects of gain error and VOS.
See Typical Characteristics curve Output Swing vs Output Current and Accuracy Variations as a Result of VSENSE and Common-Mode
Voltage in the Application Information section.
Copyright © 2007–2010, Texas Instruments Incorporated
Product Folder Link(s): INA270-Q1 INA271-Q1
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ELECTRICAL CHARACTERISTICS (continued)
VS = 5 V, VCM = 12 V, VSENSE = 100 mV, PRE OUT connected to BUF IN (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
(1)
MIN
TYP
MAX
UNIT
Frequency Response
BW
Bandwidth
CL = 5 pF
25°C
130
fm
Phase margin
CL < 10 nF
25°C
40
°
SR
Slew rate
25°C
1
V/ms
ts
Settling time (1%)
25°C
2
ms
25°C
40
nV/√Hz
25°C
700
900
Full range
350
950
Noise, RTI
Vn
VSENSE = 10 mV to 100 mV,
CL = 5 pF
kHz
(7)
Voltage noise density
Power Supply
IQ
(7)
4
Quiescent current
VOUT = 2 V
VSENSE = 0 V
mA
RTI = referred to input
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SBOS401B – JULY 2007 – REVISED FEBRUARY 2010
TYPICAL CHARACTERISTICS
TA = 25°C, VS = 12 V, VCM = 12 V, VSENSE = 100 mV (unless otherwise noted)
GAIN vs FREQUENCY
GAIN vs FREQUENCY
45
45
CLOAD = 0 pF
40
40
35
35
30
Gain (dB)
Gain (dB)
CLOAD = 1000 pF
G = 20
25
G = 14
20
30
G = 14
20
15
15
10
10
5
G = 20
25
5
10k
100k
1M
10k
100k
Frequency (Hz)
COMMON-MODE AND POWER-SUPPLY REJECTION
vs FREQUENCY
GAIN PLOT
20
VS = 18V
18
140
130
VOUT (V)
14
Common- Mode and
Power- Supply Rejection (dB)
16
20V/V
12
10
8
14V/V
6
4
2
1200
120
CMRR
110
100
90
PSR
80
70
60
50
40
1300
1100
900
1000
800
700
500
600
400
200
300
0
100
0
10
100
1k
10k
100k
Frequency (Hz)
VDIFFERENTIAL (mV)
TOTAL OUTPUT ERROR vs VSENSE
OUTPUT ERROR vs COMMON-MODE VOLTAGE
4.0
0.1
3.5
0.09
0.08
3.0
Output Error (%)
Total Output Error
(% error of the ideal output value)
1M
Frequency (Hz)
2.5
2.0
1.5
1.0
0.07
0.06
0.05
0.04
0.03
0.02
0.5
0.01
0
0
50
100 150
200
250 300
350
400
450 500
0
–16 –12 –8 –4
VSENSE (mV)
0
4
8
12 16
20
...
76 80
Common-Mode Voltage (V)
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TYPICAL CHARACTERISTICS (continued)
TA = 25°C, VS = 12 V, VCM = 12 V, VSENSE = 100 mV (unless otherwise noted)
POSITIVE OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT
QUIESCENT CURRENT vs OUTPUT VOLTAGE
1000
12
900
11
VS = 12 V
800
Sourcing Current
700
25°C
8
–40°C
125°C
7
6
VS = 3 V
5
–40°C
Output stage is designed
to source current. Current
sinking
capability
is
approximately 400 µA.
3
2
1
125°C
0
0
600
500
400
300
Sourcing Current
25°C
4
IQ (µA)
Output Voltage (V)
10
9
200
100
0
0
5
10
25
20
15
1
2
30
3
4
5
7
6
8
9
10
Output Voltage (V)
Output Current (mA)
QUIESCENT CURRENT
vs COMMON-MODE VOLTAGE
34
VSENSE = 100 mV
VS = 12 V
VS = 2.7 V
775
IQ (µA)
675
575
475
VS = 12 V
375
VSENSE = 0 mV
VS = 2.7 V
275
175
−16 −12 −8 −4
Output Short-Circuit Current (mA)
875
OUTPUT SHORT-CIRCUIT CURRENT
vs SUPPLY VOLTAGE
–40°C
30
25°C
26
125°C
22
18
14
10
6
0
4
8
12 16
20
...
2.5 3.5
76 80
4.5
5.5 6.5
7.5 8.5
9.5 10.5 11.5 17
18
Supply Voltage (V)
VCM (V)
PREOUT OUTPUT RESISTANCE
PRODUCTION DISTRIBUTION
BUFFER GAIN vs FREQUENCY
200
150
Population
Gain (dB)
Phase
100
50
Gain
0
−50
100
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
10
1k
10k
100k
1M
10M
Frequency (Hz)
RPREOUT (kW)
6
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SBOS401B – JULY 2007 – REVISED FEBRUARY 2010
TYPICAL CHARACTERISTICS (continued)
TA = 25°C, VS = 12 V, VCM = 12 V, VSENSE = 100 mV (unless otherwise noted)
LARGE-SIGNAL STEP RESPONSE
10-mV TO 100-mV INPUT
500 mV/div
50 mV/div
SMALL-SIGNAL STEP RESPONSE
10-mV TO 20-mV INPUT
10 µs/div
10 µs/div
Copyright © 2007–2010, Texas Instruments Incorporated
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APPLICATION INFORMATION
Basic Connection
Figure 1 illustrates the basic connection of the INA270 and INA271. The input pins, IN+ and IN–, should be
connected as closely as possible to the shunt resistor to minimize any resistance in series with the shunt
resistance. Power-supply bypass capacitors are required for stability. Applications with noisy or high-impedance
power supplies may require additional decoupling capacitors to reject power-supply noise. Minimum bypass
capacitors of 0.01 mF and 0.1 mF in value should be placed close to the supply pins. Although not mandatory, an
additional 10-mF electrolytic capacitor placed in parallel with the other bypass capacitors may be useful in
applications with particularly noisy supplies.
RS
−16 V to +80 V
Supply
Load
Single-Pole Filter
Capacitor
+2.7 V to +18 V
IN+
IN–
5 kW
PRE OUT
BUF IN
0.01 µF
V+
0.1 µF
5 kW
OUT
A1
96 kW
A2
RL
INA270
GND
Figure 1. INA270 Basic Connections
Power Supply
The input circuitry of the INA270 and INA271 can accurately measure beyond its power-supply voltage, V+. For
example, the V+ power supply can be 5 V, whereas the load power-supply voltage is up to 80 V. The output
voltage range of the OUT terminal, however, is limited by the voltages on the power-supply pin.
Selecting RS
The value chosen for the shunt resistor, RS, depends on the application and is a compromise between
small-signal accuracy and maximum permissible voltage loss in the measurement line. High values of RS provide
better accuracy at lower currents by minimizing the effects of offset, while low values of RS minimize voltage loss
in the supply line. For most applications, best performance is attained with an RS value that provides a full-scale
shunt voltage range of 50 mV to 100 mV. Maximum input voltage for accurate measurements is (VS – 0.2)/Gain.
Transient Protection
The –16-V to 80-V common-mode range of the INA270 and INA271 is ideal for withstanding automotive fault
conditions ranging from 12-V battery reversal up to 80-V transients, since no additional protective components
are needed up to those levels. In the event that the INA270 and INA271 are exposed to transients on the inputs
in excess of their ratings, external transient absorption with semiconductor transient absorbers (zeners or
Transzorbs) are necessary.
8
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SBOS401B – JULY 2007 – REVISED FEBRUARY 2010
Use of MOVs or VDRs is not recommended except when they are used in addition to a semiconductor transient
absorber. Select the transient absorber such that it will never allow the INA270 and INA271 to be exposed to
transients greater than 80 V (that is, allow for transient absorber tolerance, as well as additional voltage because
of transient absorber dynamic impedance).
Despite the use of internal zener-type ESD protection, the INA270 and INA271 are not suited to using external
resistors in series with the inputs, since the internal gain resistors can vary up to ±30%, but the internal resistors
are tightly matched. If gain accuracy is not important, then resistors can be added in series with the INA270 and
INA271 inputs, with two equal resistors on each input.
Output Voltage Range
The output of the INA270 and INA271 is accurate within the output voltage swing range set by the power-supply
pin, V+.
The INA270 and INA271 readily enable the inclusion of filtering between the preamp output and buffer input.
Single-pole filtering can be accomplished with a single capacitor because of the 96-kΩ output impedance at
PRE OUT on pin 3 (see Figure 2a).
The INA270 and INA271 readily lend themselves to second-order Sallen-Key configurations (see Figure 2b).
When designing these configurations consider that the PRE OUT 96-kΩ output impedance exhibits an initial
variation of ±30% with the addition of a –2200-ppm/°C temperature coefficient.
RS
Supply
Load
RS
Supply
Load
Second-Order, Sallen-Key Filter Connection
CFILT
Single-Pole Filter
Capacitor
RS
CFILT
+2.7 V to +18 V
+2.7 V to +18 V
IN+
PRE OUT
IN–
5 kW
BUF IN
V+
IN+
5 kW
5 kW
Output
A1
V+
5 kW
Output
96 kW
A2
RL
RL
IN A 270
IN A 270
GND
a ) S i n g le - P o le F ilt e r
A.
BUF IN
A1
96 kW
A2
PRE OUT
IN–
GND
b ) S e c o n d - O r d e r, S a lle n - K e y F i lt e r
The INA270 and INA271 can be easily connected for first-order or second-order filtering. Remember to use the
appropriate buffer gain (INA270 = 1.4, INA271 = 2) when designing Sallen-Key configurations.
Figure 2. First-Order or Second-Order Filtering
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Accuracy Variations as a Result of VSENSE and Common-Mode Voltage
The accuracy of the INA270 and INA271 current-shunt monitors is a function of two main variables: VSENSE
(VIN+ – VIN–) and common-mode voltage, VCM, relative to the supply voltage, VS. VCM is expressed as
(VIN+ + VIN–)/2; however, in practice, VCM is seen as the voltage at VIN+ because the voltage drop across VSENSE
is usually small.
This section addresses the accuracy of these specific operating regions:
Normal Case 1: VSENSE ≥ 20 mV, VCM ≥ VS
Normal Case 2: VSENSE ≥ 20 mV, VCM < VS
Low VSENSE Case 1: VSENSE < 20 mV, –16 V ≤ VCM < 0
Low VSENSE Case 2: VSENSE < 20 mV, 0 V ≤ VCM ≤ VS
Low VSENSE Case 3: VSENSE < 20 mV, VS < VCM ≤ 80 V
Normal Case 1: VSENSE ≥ 20 mV, VCM ≥ VS
This region of operation provides the highest accuracy. Here, the input offset voltage is characterized and
measured using a two-step method. First, the gain is determined by Equation 1.
VOUT1 – VOUT2
G=
100 mV – 20 mV
(1)
Where:
VOUT1 = Output voltage with VSENSE = 100 mV
VOUT2 = Output voltage with VSENSE = 20 mV
Then the offset voltage is measured at VSENSE = 100 mV and referred to the input (RTI) of the current-shunt
monitor, as shown in Equation 2.
VOUT1
– 100 mV
VOSRTI (referred to input) =
G
(2)
(
(
In Typical Characteristics, the Output Error vs Common-Mode Voltage curve shows the highest accuracy for the
this region of operation. In this plot, VS = 12 V; for VCM ≥ 12 V, the output error is at its minimum. This case is
also used to create the VSENSE ≥ 20 mV output specifications in Electrical Characteristics.
Low VSENSE Case 1: VSENSE < 20 mV, –16 V ≤ VCM < 0; and
Low VSENSE Case 3: VSENSE < 20 mV, VS < VCM ≤ 80 V
Although the INA270 family of devices are not designed for accurate operation in either of these regions, some
applications are exposed to these conditions. For example, when monitoring power supplies that are switched on
and off while VS is still applied to the INA270 or INA271, it is important to know what the behavior of the devices
is in these regions.
As VSENSE approaches 0 mV, in these VCM regions, the device output accuracy degrades. A larger-than-normal
offset can appear at the current-shunt monitor output with a typical maximum value of VOUT = 60 mV for
VSENSE = 0 mV. As VSENSE approaches 20 mV, VOUT returns to the expected output value with accuracy as
specified in Electrical Characteristics. Figure 3 illustrates this effect using the INA271 (Gain = 20).
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SBOS401B – JULY 2007 – REVISED FEBRUARY 2010
0.40
0.36
0.32
VOUT (V)
0.28
0.24
Actual
0.20
0.16
Ideal
0.12
0.08
0.04
0
0
2
4
6
8
10
12
14
16
18
20
VSENSE (mV)
Figure 3. Example for Low VSENSE Cases 1 and 3 (INA271, Gain = 20)
Low VSENSE Case 2: VSENSE < 20 mV, 0 V ≤ VCM ≤ VS
This region of operation is the least accurate for the INA270 family. To achieve the wide input common-mode
voltage range, these devices use two operational amplifier (op amp) front ends in parallel. One op amp front end
operates in the positive input common-mode voltage range, and the other in the negative input region. For this
case, neither of these two internal amplifiers dominates and overall loop gain is very low. Within this region, VOUT
approaches voltages close to linear operation levels for Normal Case 2.
This deviation from linear operation becomes greatest the closer VSENSE approaches 0 V. Within this region, as
VSENSE approaches 20 mV, device operation is closer to that described by Normal Case 2. Figure 4 illustrates
this behavior for the INA271. The VOUT maximum peak for this case is determined by maintaining a constant VS,
setting VSENSE = 0 mV and sweeping VCM from 0 V to VS. The exact VCM at which VOUT peaks during this case
varies from part to part. The maximum peak voltage for the INA270 is 0.28 V; for the INA271, the maximum peak
voltage is 0.4 V.
0.48
INA271 VOUT Limit(1)
0.48
VCM1
0.40
Ideal
VOUT (V)
0.36
0.32
VCM2
0.28
VCM3
0.24
0.20
0.16
VOUT limit at VSENSE = 0mV,
0 ≤ VCM1 ≤ VS
VCM4
0.12
VCM2, VCM3, and VCM4 illustrate the variance
from part to part of the VCM that can cause
maximum VOUT with VSENSE < 20mV.
0.08
0.04
0
0
2
4
6
8
10
12
14
16
18
20
22
24
VSENSE (mV)
Figure 4. Example for Low VSENSE Case 2 (INA271, Gain = 20)
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Shutdown
The INA270 and INA271 do not provide a shutdown pin; however, because they consume a quiescent current
less than 1 mA, they can be powered by either the output of logic gates or by transistor switches to supply
power. Driving the gate low shuts down the INA270/INA271. Use a totem-pole output buffer or gate that can
provide sufficient drive along with 0.1-mF bypass capacitor, preferably ceramic with good high-frequency
characteristics. This gate should have a supply voltage of 3 V or greater, because the INA270 and INA271
require a minimum supply greater than 2.7 V. In addition to eliminating quiescent current, this gate also turns off
the 10-mA bias current present at each of the inputs. Note that the IN+ and IN– inputs are able to withstand full
common-mode voltage under all powered and under-powered conditions. An example shutdown circuit is shown
in Figure 5.
IL
RS
−16 V to +80 V
Supply
Single-Pole Filter
Capacitor
IN+
Negative
and Positive
Common-Mode
Voltage
IN–
5 kW
PRE OUT
Load
BUF IN
V+
5 kW
V+ > 3 V
OUT
A1
74HC04
0.01 µF
96 kW
A2
RL
INA270, INA271
GND
Figure 5. INA270/INA271 Example Shutdown Circuit
RFI/EMI
Attention to good layout practices is always recommended. Keep traces short and, when possible, use a printed
circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible.
Small ceramic capacitors placed directly across amplifier inputs can reduce RFI/EMI sensitivity. PCB layout
should locate the amplifier as far away as possible from RFI sources. Sources can include other components in
the same system as the amplifier itself, such as inductors (particularly switched inductors handling a lot of current
and at high frequencies). RFI can generally be identified as a variation in offset voltage or dc signal levels with
changes in the interfering RF signal. If the amplifier cannot be located away from sources of radiation, shielding
may be needed. Twisting wire input leads makes them more resistant to RF fields. The difference in input pin
location of the INA270 and INA271 versus the INA193 through INA198 may provide different EMI performance.
12
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Copyright © 2007–2010, Texas Instruments Incorporated
Product Folder Link(s): INA270-Q1 INA271-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
23-Oct-2010
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
INA270AQDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Request Free Samples
INA271AQDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Request Free Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
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