To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com April 1st, 2010 Renesas Electronics Corporation Issued by: Renesas Electronics Corporation (http://www.renesas.com) Send any inquiries to http://www.renesas.com/inquiry. Notice 1. 2. 3. 4. 5. 6. 7. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. 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Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majorityowned subsidiaries. (Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics. HD74LV06A Hex Inverter Buffers / Drivers with Open Drain Outputs REJ03D0230–0600 Rev.6.00 Dec 23, 2005 Description The HD74LV06A has six inverter buffers / drivers with open drain outputs in a 14-pin package. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption extends the battery life. Features • • • • • • • VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) All outputs VO (Max.) = 5.5 V (@VCC = 2.0 V to 5.5 V, Output “Z” state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Output current ±8 mA (@VCC = 3.0 V to 3.6 V), ±16 mA (@VCC = 4.5 V to 5.5 V) Ordering Information Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) Part Name Package Type HD74LV06AFPEL SOP–14 pin (JEITA) PRSP0014DF-B (FP–14DAV) FP EL (2,000 pcs/reel) HD74LV06ARPEL SOP–14 pin (JEDEC) PRSP0014DE-A (FP–14DNV) RP EL (2,500 pcs/reel) HD74LV06ATELL TSSOP–14 pin T ELL (2,000 pcs/reel) PTSP0014JA-B (TTP–14DV) Note: Please consult the sales office for the above package availability. Function Table Input A L H Note: H: High level L: Low level Z: High impedance Rev.6.00 Dec 23, 2005 page 1 of 7 Output Y Z L HD74LV06A Pin Arrangement 1A 1 14 VCC 1Y 2 13 6A 2A 3 12 6Y 2Y 4 11 5A 3A 5 10 5Y 3Y 6 9 4A GND 7 8 4Y (Top view) Absolute Maximum Ratings Item Supply voltage range Input voltage range*1 Output voltage range*1, 2 Input clamp current Output clamp current Continuous output current Continuous current through VCC or GND Symbol VCC VI VO IIK IOK IO ICC or IGND PT Maximum power dissipation at 3 Ta = 25°C (in still air)* Storage temperature Tstg Ratings –0.5 to 7.0 –0.5 to 7.0 –0.5 to VCC + 0.5 –0.5 to 7.0 –20 ±50 ±35 ±50 Unit V V V 785 500 –65 to 150 mW mA mA mA mA Conditions Output: L VCC: OFF Output: Z VI < 0 VO < 0 VO = 0 to VCC SOP TSSOP °C Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 7.0 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150°C. Rev.6.00 Dec 23, 2005 page 2 of 7 HD74LV06A Recommended Operating Conditions Item Supply voltage range Input voltage range Output voltage range Output current Symbol VCC VI VO IOL Input transition rise or fall rate ∆t / ∆v Operating free-air temperature Ta Min 2.0 0 0 — — — — 0 0 0 –40 Max 5.5 5.5 5.5 50 2 8 16 200 100 20 85 Unit V V V µA mA Conditions VCC = 2.0 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V ns/V °C Note: Unused or floating inputs must be held high or low. Logic Diagram A Y DC Electrical Characteristics Ta = –40 to 85°C Item Input voltage Symbol VIH Input current IIN Off state output current IOZ VCC (V)* 2.0 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 2.0 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 Min to Max 2.3 3.0 4.5 0 to 5.5 Min to Max Quiescent supply current ICC 5.5 VIL Output voltage VOL Min 1.5 VCC × 0.7 VCC × 0.7 VCC × 0.7 — — — — — — — — — — Typ — — — — — — — — — — — — — — Max — — — — 0.5 VCC × 0.3 VCC × 0.3 VCC × 0.3 0.1 0.4 0.44 0.55 ±1 ±2.5 Unit V µA µA IOL = 50 µA IOL = 2 mA IOL = 8 mA IOL = 16 mA VIN = 5.5 V or GND VO = 5.5 V — — 20 µA VIN = VCC or GND, IO = 0 V Test Conditions 0 — — 5 µA VI or VO = 0 to 5.5 V IOFF Output leakage current Input capacitance CIN 3.3 — 2.3 — pF VI = VCC or GND Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. Rev.6.00 Dec 23, 2005 page 3 of 7 HD74LV06A Switching Characteristics VCC = 2.5 ± 0.2 V Item Symbol tPLH Propagation delay time tPHL Ta = 25°C Min Typ Max — 4.7 10.4 — 9.5 15.2 — 5.4 10.4 — 7.9 15.2 Ta = –40 to 85°C Min Max 1.0 13.0 1.0 18.0 1.0 13.0 1.0 18.0 Ta = 25°C Min Typ Max — 4.0 7.1 — 7.3 10.6 — 4.3 7.1 — 5.8 10.6 Ta = –40 to 85°C Min Max 1.0 8.5 1.0 12.0 1.0 8.5 1.0 12.0 Ta = 25°C Min Typ Max Ta = –40 to 85°C Min Max Unit ns Test Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF FROM (Input) TO (Output) A Y VCC = 3.3 ± 0.3 V Item Symbol tPLH Propagation delay time tPHL Unit ns Test Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF FROM (Input) TO (Output) A Y VCC = 5.0 ± 0.5 V Item Symbol tPLH Propagation delay time tPHL — — — — 3.3 5.6 3.4 4.1 5.5 7.5 5.5 7.5 1.0 1.0 1.0 1.0 Unit 6.5 8.5 6.5 8.5 ns Test Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF FROM (Input) TO (Output) A Y Operating Characteristics CL = 50 pF Item Symbol Power dissipation capacitance CPD VCC (V) 3.3 5.0 Min — — Ta = 25°C Typ 9.6 11.4 Ta = 25°C Typ 0.3 Max 0.8 Max — — Unit pF Test Conditions f = 10 MHz Noise Characteristics CL = 50 pF Item Symbol VCC (V) Unit Quiet output, maximum dynamic VOL VOL (P) 3.3 Min — Quiet output, minimum dynamic VOL VOL (V) 3.3 — –0.1 –0.8 V High-level dynamic input voltage VIH (D) 3.3 2.31 — — V Low-level dynamic input voltage VIL (D) 3.3 — — 0.99 V Rev.6.00 Dec 23, 2005 page 4 of 7 V Test Conditions HD74LV06A Test Circuit VCC RL = 1 kΩ CL* Note: CL includes the probe and jig capacitance. • Waveform − 1 tr Input 10% tf 90% 50% VCC 90% 50% VCC tPHL VCC 10% 0V tPLH VOH Output 50% VCC VOL + 0.3 V VOL Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns 2. The output are measured one at a time with one transition per measurement. Rev.6.00 Dec 23, 2005 page 5 of 7 HD74LV06A Package Dimensions JEITA Package Code P-SOP14-3.95x8.65-1.27 RENESAS Code PRSP0014DE-A *1 Previous Code FP-14DNV MASS[Typ.] 0.13g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. F D 14 8 c *2 Index mark HE E bp Terminal cross section ( Ni/Pd/Au plating ) Reference Dimension in Millimeters Symbol Min 1 7 *3 e Z bp x M A L1 A1 θ L y Detail F JEITA Package Code P-SOP14-5.5x10.06-1.27 RENESAS Code PRSP0014DF-B *1 Previous Code FP-14DAV D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Nom Max 8.65 9.05 3.95 0.10 0.14 0.25 1.75 0.34 0.40 0.46 0.15 0.20 0.25 0° 8° 5.80 6.10 6.20 1.27 0.25 0.15 0.635 0.40 0.60 1.27 1.08 MASS[Typ.] 0.23g D F 14 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. 8 c HE *2 E bp Index mark Terminal cross section ( Ni/Pd/Au plating ) 1 Z 7 e *3 bp x Reference Dimension in Millimeters Symbol M A L1 A1 θ y L Detail F Rev.6.00 Dec 23, 2005 page 6 of 7 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Min Nom Max 10.06 10.5 5.50 0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0° 8° 7.50 7.80 8.00 1.27 0.12 0.15 1.42 0.50 0.70 0.90 1.15 HD74LV06A JEITA Package Code P-TSSOP14-4.4x5-0.65 RENESAS Code PTSP0014JA-B *1 Previous Code TTP-14DV MASS[Typ.] 0.05g D F 14 8 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. HE c *2 E bp Index mark Terminal cross section ( Ni/Pd/Au plating ) Reference Dimension in Millimeters Symbol 7 1 *3 Z bp x M L1 A e A1 θ L y Detail F Rev.6.00 Dec 23, 2005 page 7 of 7 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Min Nom Max 5.00 5.30 4.40 0.03 0.07 0.10 1.10 0.15 0.20 0.25 0.10 0.15 0.20 0° 8° 6.20 6.40 6.60 0.65 0.13 0.10 0.83 0.4 0.5 0.6 1.0 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. 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