IRF IRHNJ57130 Simple drive requirement Datasheet

PD-93754G
IRHNJ57130
JANSR2N7481U3
100V, N-CHANNEL
RADIATION HARDENED
POWER MOSFET
SURFACE MOUNT (SMD-0.5)
REF: MIL-PRF-19500/703
5
TECHNOLOGY
™
Product Summary
Part Number Radiation Level
IRHNJ57130
100K Rads (Si)
IRHNJ53130
300K Rads (Si)
IRHNJ54130
500K Rads (Si)
RDS(on)
0.06Ω
0.06Ω
0.06Ω
ID
22A*
22A*
22A*
QPL Part Number
JANSR2N7481U3
JANSF2N7481U3
JANSG2N7481U3
IRHNJ58130
0.075Ω
22A*
JANSH2N7481U3
1000K Rads(Si)
International Rectifier’s R5TM technology provides
high performance power MOSFETs for space
applications.These devices have been characterized
for Single Event Effects (SEE) with useful performance
up to an LET of 80 (MeV/(mg/cm2)). The combination
of low RDS(on) and low gate charge reduces the
power losses in switching applications such as DC
to DC converters and motor control. These devices
retain all of the well established advantages of
MOSFETs such as voltage control, fast switching,
ease of paralleling and temperature stability of
electrical parameters.
SMD-0.5
Features:
n
n
n
n
n
n
n
n
n
Single Event Effect (SEE) Hardened
Ultra Low RDS(on)
Low Total Gate Charge
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Surface Mount
Ceramic Package
Light Weight
Absolute Maximum Ratings
Pre-Irradiation
Parameter
ID @ VGS = 12V, TC = 25°C
ID @ VGS = 12V, TC = 100°C
IDM
PD @ TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current À
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy Á
Avalanche Current À
Repetitive Avalanche Energy À
Peak Diode Recovery dv/dt Â
Operating Junction
Storage Temperature Range
Pckg. Mounting Surface Temp.
Weight
Units
22*
16
88
75
0.6
±20
70
22
7.5
1.4
-55 to 150
300 (for 5s)
1.0 (Typical)
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
g
* Current is limited by package
For footnotes refer to the last page
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1
10/27/11
IRHNJ57130, JANSR2N7481U3
Pre-Irradiation
Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)
BVDSS
Parameter
Min
Drain-to-Source Breakdown Voltage
100
—
—
V
—
0.11
—
V/°C
—
—
0.06
Ω
2.0
13
—
—
—
—
—
—
4.0
—
10
25
V
S
∆BVDSS/∆TJ Temperature Coefficient of Breakdown
Voltage
RDS(on)
Static Drain-to-Source On-State
Resistance
VGS(th)
Gate Threshold Voltage
g fs
Forward Transconductance
IDSS
Zero Gate Voltage Drain Current
Typ Max Units
µA
IGSS
IGSS
Qg
Q gs
Q gd
td(on)
tr
td(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4.0
100
-100
50
7.4
20
25
100
35
30
—
Ciss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
1005
365
50
—
—
—
nA
nC
ns
nH
pF
Test Conditions
VGS = 0V, ID = 1.0mA
Reference to 25°C, ID = 1.0mA
VGS = 12V, ID = 16A
Ã
VDS = VGS, ID = 1.0mA
VDS ≥ 15V, IDS = 16A Ã
VDS= 80V ,VGS = 0V
VDS = 80V,
VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
VGS =12V, ID = 22A
VDS = 50V
VDD = 50V, ID = 22A,
VGS =12V, RG = 7.5Ω
Measured from the center of
drain pad to center of source pad
VGS = 0V, VDS = 25V
f = 1.0MHz
Source-Drain Diode Ratings and Characteristics
Parameter
IS
ISM
VSD
t rr
Q RR
Min Typ Max Units
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) À
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
ton
Forward Turn-On Time
* Current is limited by package
—
—
—
—
—
—
—
—
—
—
22*
88
1.2
250
850
Test Conditions
A
V
ns
nC
Tj = 25°C, IS = 22A, VGS = 0V Ã
Tj = 25°C, IF = 22A, di/dt ≤100A/µs
VDD ≤ 25V Ã
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC
RthJ-PCB
Junction-to-Case
Junction-to-PC board
Min Typ Max
—
—
—
6.9
1.67
—
Units
°C/W
Test Conditions
soldered to a 2” square copper-clad board
Note: Corresponding Spice and Saber models are available on International Rectifier Web site.
For footnotes refer to the last page
2
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Radiation Characteristics
Pre-Irradiation
IRHNJ57130, JANSR2N7481U3
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability.
The hardness assurance program at International Rectifier is comprised of two radiation environments.
Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both
pre- and post-irradiation performance are tested and specified using the same drive circuitry and test
conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @ Tj = 25°C, Post Total Dose Irradiation ÄÅ
Parameter
BVDSS
VGS(th)
IGSS
IGSS
IDSS
RDS(on)
RDS(on)
VSD
Up to 500K Rads(Si)1 1000K Rads (Si)2 Units
Min
Max
Min
Max
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Zero Gate Voltage Drain Current
Static Drain-to-Source Ã
On-State Resistance (TO-3)
Static Drain-to-Source Ã
On-State Resistance (SMD-.5)
Diode Forward Voltage Ã
Test Conditions
100
2.0
—
—
—
—
—
4.0
100
-100
10
0.064
100
1.5
—
—
—
—
—
4.0
100
-100
25
0.08
nA
—
0.06
—
0.075
Ω
VGS = 12V, ID =16A
—
1.2
—
1.2
V
VGS = 0V, IS = 22A
V
µA
Ω
VGS = 0V, I D = 1.0mA
VGS = VDS, ID = 1.0mA
VGS = 20V
VGS = -20 V
VDS= 80V, VGS = 0V
VGS = 12V, ID =16A
1. Part numbers IRHNJ57130 (JANSR2N7481U3), IRHNJ53130 (JANSF2N7481U3) and IRHNJ54130 (JANSG2N7481U3)
2. Part number IRHNJ58130 (JANSH2N7481U3)
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for
Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Typical Single Event Effect Safe Operating Area
LET
2
(MeV/(mg/cm ))
Energy
Range
(MeV)
(µm)
VDS (V)
@VGS =
@VGS =
@VGS =
@VGS =
@VGS =
0V
-5V
-10V
-15V
-20V
300 ± 7.5%
38 ± 7.5%
100
100
100
100
100
61 ± 5%
330 ± 7.5%
31 ± 10%
100
100
100
35
25
84 ± 5%
350 ± 10%
28 ± 7.5%
100
100
80
25
-
Bias VDS (V)
38 ± 5%
120
100
80
60
40
20
0
LET=38 ± 5%
LET=61 ± 5%
LET=84 ± 5%
0
-5
-10
-15
-20
Bias VGS (V)
Fig a. Typical Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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3
IRHNJ57130, JANSR2N7481U3
100
Pre-Irradiation
100
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
BOTTOM 5.0V
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
10
5.0V
20µs PULSE WIDTH
TJ = 25 °C
1
0.1
1
10
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
2.5
I D , Drain-to-Source Current (A)
TJ = 25 ° C
TJ = 150 ° C
V DS = 15
50V
20µs PULSE WIDTH
8.0
9.0
10.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
4
1
10
100
Fig 2. Typical Output Characteristics
100
7.0
20µs PULSE WIDTH
TJ = 150 °C
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
6.0
5.0V
10
1
0.1
VDS , Drain-to-Source Voltage (V)
10
5.0
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
BOTTOM 5.0V
TOP
TOP
ID = 22A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 12V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
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Pre-Irradiation
2000
20
1200
VGS , Gate-to-Source Voltage (V)
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
1600
C, Capacitance (pF)
IRHNJ57130, JANSR2N7481U3
Ciss
800
Coss
400
Crss
0
1
10
10
5
FOR TEST CIRCUIT
SEE FIGURE 13
0
10
VDS , Drain-to-Source Voltage (V)
20
30
40
50
QG , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
1000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
VDS = 80V
VDS = 50V
VDS = 20V
15
0
100
ID = 22A
TJ = 150 ° C
10
TJ = 25 ° C
1
V GS = 0 V
0.1
0.4
0.6
0.8
1.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
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1.2
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
10
1 00µs
1ms
1
0.1
10ms
Tc = 25°C
Tj = 150°C
Single Pulse
1
DC
10
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
5
IRHNJ57130, JANSR2N7481U3
Pre-Irradiation
30
LIMITED BY PACKAGE
VGS
25
I D , Drain Current (A)
RD
VDS
D.U.T.
RG
+
-V DD
20
V GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
15
Fig 10a. Switching Time Test Circuit
10
VDS
5
0
90%
25
50
75
100
125
150
TC , Case Temperature ( °C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
10%
VGS
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1 D = 0.50
0.20
0.10
PDM
0.05
0.1
0.02
0.01
0.01
0.00001
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
6
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Pre-Irradiation
IRHNJ57130, JANSR2N7481U3
15V
L
VDS
D.U.T.
RG
VGS
20V
IAS
DRIVER
+
- VDD
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
A
EAS , Single Pulse Avalanche Energy (mJ)
120
TOP
BOTTOM
90
ID
9.8A
14A
22A
60
30
0
25
50
75
100
125
Starting TJ , Junction Temperature ( °C)
150
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Current Regulator
Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50KΩ
QG
12 V
QGS
.3µF
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
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12V
.2µF
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
7
IRHNJ57130, JANSR2N7481U3
Pre-Irradiation
Footnotes:
À Repetitive Rating; Pulse width limited by
maximum junction temperature.
Á VDD = 50V, starting TJ = 25°C, L= 0.3 mH
Peak IL = 22A, VGS = 12V
 ISD ≤ 22A, di/dt ≤ 155A/µs,
VDD ≤ 100V, TJ ≤ 150°C
à Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
Ä Total Dose Irradiation with VGS Bias.
12 volt VGS applied and VDS = 0 during
irradiation per MIL-STD-750, method 1019, condition A.
Å Total Dose Irradiation with VDS Bias.
80 volt VDS applied and V GS = 0 during
irradiation per MlL-STD-750, method 1019, condition A.
Case Outline and Dimensions — SMD-0.5
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Data and specifications subject to change without notice. 10/2011
8
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