UTC LLV321 General purpose, low voltage,rail-to-rail output amplifier Datasheet

UNISONIC TECHNOLOGIES CO., LTD
LLV321
LINEAR INTEGRATED CIRCUIT
GENERAL PURPOSE, LOW
VOLTAGE,RAIL-TO-RAIL
OUTPUT AMPLIFIERS
„
DESCRIPTION
The LLV321 is a single, low cost and voltage feedback amplifier, that
consumes only 80μA supply current, 1.2MHz of bandwidth and 1.5V/μs
of slew rate at a low supply voltage of 2.7V. It is supplied from 2.7V
(±1.35V) to 5.5V (±2.75V). The common mode voltage range extends
below the negative rail and the output provides rail-to-rail performance.
The LLV321 is fabricated on a CMOS process. The combination of
low power, rail-to-rail performance, low voltage operation, and tiny
package options makes the device well suited for use in personal
electronics equipment such as cellular handsets, pagers, PDAs, and
other battery powered applications.
The LLV321 is also applied in portable test instruments, telephone
systems, low cost general purpose applications, cellular phones, MP3
players, personal data assistants, A/D buffer, DSP interface, audio
applications, smart card readers, keyless entry, Infrared receivers for
remote controls, digital still cameras and hard disk drives.
„ FEATURES (at 2.7V)
* Input Voltage Varies From -0.25V to +1.5V
* Supply Current: 80µA
* Output Voltage Varies from 0.01V to 2.69V
* Gain Bandwidth: 1.2MHz
* Slew Rate: 1.5V/µs
* Fully Specified at +2.7V and +5V Supplies
* Operating Temperature Range: -40°C ~ +125°C
* Halogen Free
„
ORDERING INFORMATION
Ordering Number
LLV321G-AL5-R
LLV321G-AL5-R
„
Package
SOT-353
Packing
Tape Reel
(1)Packing Type
(1) R: Tape Reel
(2)Package Type
(2) AL5: SOT-353
(3)Halogen Free
(3) G: Halogen Free
MARKING
www.unisonic.com.tw
Copyright © 2010 Unisonic Technologies Co., Ltd
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LLV321
„
„
PIN CONFIGURATION
+IN
1
-VS
2
-IN
3
5
+VS
4
OUT
+
-
PIN DESCRIPTION
PIN NO.
1
2
3
4
5
„
LINEAR INTEGRATED CIRCUIT
PIN NAME
+IN
-VS
-IN
OUT
+VS
DESCRIPTION
Positive Input
Negative Supply Voltage
Negative Input
Output
Positive Supply Voltage
LOGIC SYMBOL
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QW-R105-041.A
LLV321
„
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
RATINGS
UNIT
Input Voltage
VI
-VS-0.5~+VS+0.5
V
Supply Voltages
Vs
0~+6
V
Maximum Junction Temperature
TJ
+175
°C
Storage Temperature Range
TSTG
-65~+150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
„
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Power Supply Operating
Ambient Operating Temperature
„
SYMBOL
VS
TOPR
RATINGS
2.5~5.5
-40~+125
UNIT
V
°C
ELECTRICAL CHARACTERISTICS
(TC= 25°C, VS = +2.7V, G = 2, RL = 10kΩ to VS/2, RF = 10kΩ, VO(DC) = VCC/2; unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP MAX UNIT
AC Performance
Gain Bandwidth Product
GBWP CL = 50pF, RL =2kΩ to VS/2
1.2
MHz
Phase Margin
Φm
52
deg
Gain Margin
Gm
17
dB
Slew Rate
SR
VO= 1VPP
1.5
V/µs
Input Voltage Noise
en
>50kHz
36
nV/√Hz
DC Performance
Input Offset Voltage (Note 1)
VOS
1.7
7
mV
Average Drift
TCVOS
8
µV/°C
Input Bias Current (Note 2)
IB
<1
nA
Input Offset Current (Note 2)
IOS
<1
nA
Power Supply Rejection Ratio (Note 1)
PSRR
DC
50
65
dB
Supply Current
IS
80
120
µA
Input Characteristics
Input Common Mode Voltage Range
VCML
Low
0
-0.25
V
(Note 1)
High
1.5
1.3
V
VCMH
Common Mode Rejection Ratio (Note 1)
CMRR
50
70
dB
Output Characteristics
VOL
RL = 10kΩ to VS/2; Low
0.1
0.01
V
Output Voltage Swing (Note 1)
VOH
RL = 10kΩ to VS/2; High
2.69 2.6
V
Note: 1. Guaranteed by testing or statistical analysis at +25°C.
2. +IN and -IN are gates to CMOS transistors with typical input bias current of <1nA. CMOS leakage is too
small to practically measure.
3. Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as
noted. Outgoing quality levels are determined from tested parameters.
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LLV321
„
LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS (Cont.)
(TC= 25°C, VS = +5V, G = 2, RL = 10kΩ to VS/2, RF = 10kΩ, VO(DC) = VCC/2; unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNIT
AC Performance
Gain Bandwidth Product
GBWP CL = 50pF, RL =2kΩ to VS/2
1.4
MHz
Phase Margin
Φm
73
deg
Gain Margin
Gm
12
dB
Slew Rate
SR
1.5
V/µs
Input Voltage Noise
en
>50kHz
33
nV/√Hz
DC Performance
Input Offset Voltage (Note 1)
VOS
1
7
mV
Average Drift
TCVOS
6
µV/°C
Input Bias Current (Note 2)
IB
<1
nA
Input Offset Current (Note 2)
IOS
<1
nA
Power Supply Rejection Ratio (Note 1)
PSRR
DC
50
65
dB
Open Loop Gain (Note 1)
Av
50
70
dB
Supply Current
IS
100
150
µA
Input Characteristics
Input Common Mode Voltage Range
VCML
Low
0
-0.4
V
(Note 1)
High
3.8
3.6
V
VCMH
Common Mode Rejection Ratio (Note 1)
CMRR
50
75
dB
Output Characteristics
VO
RL = 2kΩ to VS/2; Low/High
V
0.036~4.95
RL = 10kΩ to VS/2; Low
0.1
0.013
V
VOL
Output Voltage Swing
(Note 1)
RL = 10kΩ to VS/2; High
4.98
4.9
V
VOH
(Note 1)
Io
Sourcing; VO=0V
5
+34
mA
Short Circuit Output Current (Note 1)
Sinking; VO=5V
10
-23
mA
Io
Note: 1. Guaranteed by testing or statistical analysis at +25°C.
2. +IN and -IN are gates to CMOS transistors with typical input bias current of <1nA. CMOS leakage is too
small to practically measure.
3. Min/max ratings are based on product characterization and simulation. Individual parameters are tested as
noted. Outgoing quality levels are determined from tested parameters.
UNISONIC TECHNOLOGIES CO., LTD
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LLV321
„
LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION
General Description
The UTC LLV321 is a low cost, single supply, low voltage and voltage feedback amplifier which is characterized
a rail- to- rail output. It is designed to operate on a CMOS process, and is unity gain stable. Figure 1 shows the
typical non-inverting circuit schematic
+VS
6.8µF
+
0.01µF
+
+IN
UTC
LLV321
-
OUT
Rf
Rg
Figure 1. Typical Non-Inverting Configuration
Power Dissipation
For the UTC LLV321, the maximum internal power dissipation is directly depending on the maximum junction
temperature. If the maximum junction temperature is higher than 150°C, some performances are declined. If the
maximum junction temperature becomes higher than 175°C for an extended time, device failure may be cause.
Driving Capacitive Loads
In figure 2, a small series resistance (RS) at the output of the amplifier, will improve stability and settling
performance. Driving a capacitive load introduces phase-lag into the output signal, which reduces phase margin in
the amplifier. The unity gain follower is the most sensitive configuration. In a unity gain follower configuration, the
UTC LLV321 requires a 450Ω series resistor to drive a 200pF load. The response is as seen in TYPICAL
CHARACTERISTIC.
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LLV321
TYPICAL CHARACTERISTIC
Small Signal Pulse Response
300
200
100
0
300
200
100
0
VOUT1
0
Magnitude (dB)
„
LINEAR INTEGRATED CIRCUIT
12.5
Time (µs)
25
Frequency Response vs. CL
for Unity Gain Configuration
3
2
1
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
0.01
CL=50pF
RS=0
CL=100pF
RS=400Ω
CL=200pF
RS=450Ω
0.1
1
Frequency (MHz)
10
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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