TI1 LM321MF Lm321 low power single op amp Datasheet

LM321
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SNOS935B – FEBRUARY 2001 – REVISED MARCH 2013
LM321 Low Power Single Op Amp
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FEATURES
DESCRIPTION
•
The LM321 brings performance and economy to low
power systems. With a high unity gain frequency and
a specified 0.4V/µs slew rate, the quiescent current is
only 430µA/amplifier (5V). The input common mode
range includes ground and therefore the device is
able to operate in single supply applications as well
as in dual supply applications. It is also capable of
comfortably driving large capacitive loads.
1
2
•
•
•
•
•
•
(VCC = 5V, TA = 25°C. Typical values unless
specified.)
Gain-Bandwidth Product 1MHz
Low Supply Current 430µA
Low Input Bias Current 45nA
Wide Supply Voltage Range +3V to +32V
Stable With High Capacitive Loads
Single Version of LM324
APPLICATIONS
•
•
•
•
•
Chargers
Power Supplies
Industrial: Controls, Instruments
Desktops
Communications Infrastructure
Connection Diagram
SOT-23
The LM321 is available in the SOT-23 package.
Overall the LM321 is a low power, wide supply range
performance op amp that can be designed into a
wide range of applications at an economical price
without sacrificing valuable board space.
Application Circuit
DC Summing Amplifier
(VIN's ≥ 0 VDC and VO ≥ VDC)
Top View
Where: V0 = V1 + V2 - V3 - V4, (V1+V2) ≥
(V3 + V4) to keep VO > 0 VDC
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2013, Texas Instruments Incorporated
LM321
SNOS935B – FEBRUARY 2001 – REVISED MARCH 2013
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)
Differential Input Voltage
Input Current (VIN < −0.3V)
±Supply Voltage
(2)
50mA
Supply Voltage (V+ - V−)
32V
−0.3V to +32V
Input Voltage
Output Short Circuit to GND,
V+ ≤ 15V and TA = 25°C (3)
Continuous
Storage Temperature Range
−65°C to 150°C
Junction Temperature
(4)
150°C
Mounting Temperature
Lead Temp (Soldering, 10 sec)
260°C
Infrared (10 sec)
215°C
Thermal Resistance to Ambient (θJA)
ESD Tolerance
(1)
(2)
(3)
(4)
(5)
265°C/W
(5)
300V
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector base junction of
the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is
also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the op amps to go to
the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and
normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than −0.36V (at
25°C).
Short circuits from the output V+ can cause excessive heating and eventual destruction. When considering short circuits to ground the
maximum output current is approximately 40mA independent of the magnitude of V+. At values of supply voltage in excess of +15V,
continuous short circuits can exceed the power dissipation ratings and cause eventual destruction.
The maximum power dissipation is a function of TJ(MAX), θJA , and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) - TA)/ θJA. All numbers apply for packages soldered directly onto a PC board.
Human Body Model, 1.5kΩ in series with 100pF.
Operating Ratings
(1)
−40°C to 85°C
Temperature Range
Supply Voltage
(1)
2
3V to 30V
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
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SNOS935B – FEBRUARY 2001 – REVISED MARCH 2013
Electrical Characteristics
Unless otherwise specified, all limits specified for at TA = 25°C; V+ = 5V, V− = 0V, VO = 1.4V. Boldface limits apply at
temperature extremes.
Symbol
Parameter
Conditions
Min
(1)
(3)
Typ
Max
Units
2
7
9
mV
5
50
150
nA
45
250
500
nA
V+ - 1.5
V+ -2
V
(2)
(1)
VOS
Input Offset Voltage
IOS
Input Offset Current
IB
Input Bias Current
VCM
Input Common-Mode Voltage Range
V+ = 30V (5)
For CMRR > = 50dB
0
AV
Large Signal Voltage Gain
(V+ = 15V, RL = 2kΩ
VO = 1.4V to 11.4V)
25
15
100
V/mV
PSRR
Power Supply Rejection Ratio
RS ≤ 10kΩ,
V+ ≤ 5V to 30V
65
100
dB
CMRR
Common Mode Rejection Ratio
RS ≤ 10kΩ
65
85
dB
VO
Output Swing
V+ = 30V, RL = 2kΩ
26
V+ = 30V, RL = 10kΩ
27
(4)
VOH
VOL
IS
Supply Current, No Load
V+ = 5V, RL = 10kΩ
V
28
5
20
mV
V+ = 5V
0.430
0.7
1.15
1.2
mA
V+ = 30V
0.660
1.5
2.85
3
ISOURCE
Output Current Sourcing
VID = +1V, V+ = 15V,
VO = 2V
20
10
40
20
ISINK
Output Current Sinking
VID = −1V
V+ = 15V, VO = 2V
10
5
20
8
mA
VID = −1V
V+ = 15V, VO = 0.2V
12
100
µA
+
mA
IO
Output Short Circuit to Ground
V = 15V
40
SR
Slew Rate
V+ = 15V, RL = 2kΩ,
VIN = 0.5 to 3V
CL = 100pF, Unity Gain
0.4
V/µs
V+ = 30V, f = 100kHz,
VIN = 10mV, RL =2kΩ,
CL = 100pF
1
MHz
60
deg
0.015
%
(6)
GBW
Gain Bandwidth Product
φm
Phase Margin
THD
Total Harmonic Distortion
en
(1)
(2)
(3)
(4)
(5)
(6)
Equivalent Input Noise Voltage
f = 1kHz, AV = 20dB
RL = 2kΩ, VO = 2VPP,
CL = 100pF, V+ = 30V
f = 1kHz, RS = 100Ω
V+ = 30V
40
85
mA
nV/
All limits are specified by testing or statistical analysis.
Typical values represent the most likely parametric norm.
VO ≅ 1.4V, RS = 0Ω with V+ from 5V to 30V; and over the full input common-mode range (0V to V+ - 1.5V) at 25°C.
The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the input lines.
The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V (at 25°C). The
upper end of the common-mode voltage range is V+ - 1.5V at 25°C, but either or both inputs can go to +32V without damage,
independent of the magnitude of V+.
Short circuits from the output V+ can cause excessive heating and eventual destruction. When considering short circuits to ground the
maximum output current is approximately 40mA independent of the magnitude of V+. At values of supply voltage in excess of +15V,
continuous short circuits can exceed the power dissipation ratings and cause eventual destruction.
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LM321
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Simplified Schematic
4
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SNOS935B – FEBRUARY 2001 – REVISED MARCH 2013
Typical Performance Characteristics
Unless otherwise specified, VS = +5V, single supply, TA = 25°C.
Small Signal Pulse Response
Large Signal Pulse Response
Supply Current
vs.
Supply Voltage
Sinking Current
vs.
Output Voltage
Source Current
vs.
Output Voltage
Open Loop Frequency Response
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LM321
SNOS935B – FEBRUARY 2001 – REVISED MARCH 2013
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APPLICATION HINTS
The LM321 op amp can operate with a single or dual power supply voltage, has true-differential inputs, and
remain in the linear mode with an input common-mode voltage of 0 VDC. This amplifier operates over a wide
range of power supply voltages, with little change in performance characteristics. At 25°C amplifier operation is
possible down to a minimum supply voltage of 3V.
Large differential input voltages can be easily accommodated and, as input differential voltage protection diodes
are not needed, no large input currents result from large differential input voltages. The differential input voltage
may be larger than V+ without damaging the device. Protection should be provided to prevent the input voltages
from going negative more than −0.3 VDC (at 25°C).An input clamp diode with a resistor to the IC input terminal
can be used.
To reduce the power supply drain, the amplifier has a class A output stage for small signal levels which converts
to class B in a large signal mode. This allows the amplifiers to both source and sink large output currents.
Therefore both NPN and PNP external current boost transistors can be used to extend the power capability of
the basic amplifiers. The output voltage needs to raise approximately 1 diode drop above ground to bias the onchip vertical PNP transistor for output current sinking applications.
For AC applications, where the load is capacitively coupled to the output of the amplifier, a resistor should be
used, from the output of the amplifier to ground to increase the class A bias current and to reduce distortion.
Capacitive loads which are applied directly to the output of the amplifier reduce the loop stability margin. Values
of 50pF can be accommodated using the worst-case non-inverting unity gain connection. Large closed loop
gains or resistive isolation should be used if large load capacitance must be driven by the amplifier.
The bias network of the LM321 establishes a supply current which is independent of the magnitude of the power
supply voltage over the range of from 3 VDC to 30 VDC.
Output short circuits either to ground or to the positive power supply should be of short time duration. Units can
be destroyed, not as a result of the short circuit current causing metal fusing, but rather due to the large increase
in IC chip dissipation which will cause eventual failure due to excessive junction temperatures. The larger value
of output source current which is available at 25°C provides a larger output current capability at elevated
temperatures than a standard IC op amp.
The circuits presented in the section on typical applications emphasize operation on only a single power supply
voltage. If complementary power supplies are available, all of the standard op amp circuits can be used. In
general, introducing a pseudo-ground (a bias voltage reference of V+/2) will allow operation above and below this
value in single power supply systems. Many application circuits are shown which take advantage of the wide
input common-mode voltage range which includes ground. In most cases, input biasing is not required and input
voltages which range to ground can easily be accommodated.
6
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SNOS935B – FEBRUARY 2001 – REVISED MARCH 2013
TYPICAL APPLICATIONS
Non-Inverting DC Gain (0V Input = 0V Output)
DC Summing Amplifier (V)
(IN's ≥ 0 VDC and VO ≥ VDC)
Amplitude Modulator Circuit
Where: V0 = V1 + V2 - V3 - V4, (V1+V2) ≥ (V3 + V4) to keep VO > 0
VDC
Power Amplifier
LED Driver
V0 = 0 VDC for VIN = 0 VDC, AV = 10
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LM321
SNOS935B – FEBRUARY 2001 – REVISED MARCH 2013
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Fixed Current Sources
8
Lamp Driver
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SNOS935B – FEBRUARY 2001 – REVISED MARCH 2013
REVISION HISTORY
Changes from Revision A (March 2013) to Revision B
•
Page
Changed layout of National Data Sheet to TI format ............................................................................................................ 8
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PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LM321MF
ACTIVE
SOT-23
DBV
5
1000
TBD
Call TI
Call TI
-40 to 85
A63A
LM321MF/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
A63A
LM321MFX
ACTIVE
SOT-23
DBV
5
3000
TBD
Call TI
Call TI
-40 to 85
A63A
LM321MFX/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
A63A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
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11-Apr-2013
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
LM321MF
SOT-23
DBV
5
1000
178.0
8.4
LM321MF/NOPB
SOT-23
DBV
5
1000
178.0
LM321MFX
SOT-23
DBV
5
3000
178.0
LM321MFX/NOPB
SOT-23
DBV
5
3000
178.0
3.2
3.2
1.4
4.0
8.0
Q3
8.4
3.2
3.2
1.4
4.0
8.0
Q3
8.4
3.2
3.2
1.4
4.0
8.0
Q3
8.4
3.2
3.2
1.4
4.0
8.0
Q3
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Mar-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM321MF
SOT-23
DBV
5
1000
210.0
185.0
35.0
LM321MF/NOPB
SOT-23
DBV
5
1000
210.0
185.0
35.0
LM321MFX
SOT-23
DBV
5
3000
210.0
185.0
35.0
LM321MFX/NOPB
SOT-23
DBV
5
3000
210.0
185.0
35.0
Pack Materials-Page 2
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