LINER LTC2053-SYNC Precision, rail-to-rail, zero-drift, resistor-programmable instrumentation amplifier Datasheet

LTC2053/LTC2053-SYNC
Precision, Rail-to-Rail,
Zero-Drift, Resistor-Programmable
Instrumentation Amplifier
Description
Features
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116dB CMRR Independent of Gain
Maximum Offset Voltage: 10µV
Maximum Offset Voltage Drift: 50nV/°C
Rail-to-Rail Input
Rail-to-Rail Output
2-Resistor Programmable Gain
Supply Operation: 2.7V to ±5.5V
Typical Noise: 2.5µVP-P (0.01Hz to 10Hz)
Typical Supply Current: 750µA
LTC2053-SYNC Allows Synchronization to
External Clock
Available in MS8 and 3mm × 3mm × 0.8mm
DFN Packages
The LTC®2053 is a high precision instrumentation amplifier. The CMRR is typically 116dB with a single or dual
5V supply and is independent of gain. The input offset
voltage is guaranteed below 10µV with a temperature
drift of less than 50nV/°C. The LTC2053 is easy to use;
the gain is adjustable with two external resistors, like a
traditional op amp.
The LTC2053 uses charge balanced sampled data techniques to convert a differential input voltage into a single
ended signal that is in turn amplified by a zero-drift operational amplifier.
The differential inputs operate from rail-to-rail and the
single-ended output swings from rail-to-rail. The LTC2053
can be used in single-supply applications, as low as 2.7V.
It can also be used with dual ±5.5V supplies. The LTC2053
requires no external clock, while the LTC2053-SYNC has
a CLK pin to synchronize to an external clock.
Applications
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Thermocouple Amplifiers
Electronic Scales
Medical Instrumentation
Strain Gauge Amplifiers
High Resolution Data Acquisition
The LTC2053 is available in an MS8 surface mount package. For space limited applications, the LTC2053 is available in a 3mm × 3mm × 0.8mm dual fine pitch leadless
package (DFN).
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Typical Application
Typical Input Referred Offset vs Input
Common Mode Voltage (VS = 3V)
Differential Bridge Amplifier
15
3V
R < 10k
2
3
8
–
7
LTC2053
+
5
6
OUT
R2 10k
1, 4
GAIN = 1+
0.1µF
R1
10Ω
R2
R1
INPUT OFFSET VOLTAGE (µV)
0.1µF
10
5
0
G = 1000
G = 100
–5
G = 10
–10
–15
2053 TA01
VS = 3V
VREF = 0V
TA = 25°C
G=1
0
1.0
1.5
2.0
2.5
0.5
INPUT COMMON MODE VOLTAGE (V)
3.0
2053 TA01b
2053syncfc
LTC2053/LTC2053-SYNC
Absolute Maximum Ratings
(Note 1)
Total Supply Voltage (V+ to V–).................................. 11V
Input Current......................................................... ±10mA
| V–IN – VREF |............................................................5.5V
| V+IN – VREF |.............................................................5.5V
Output Short-Circuit Duration........................... Indefinite
Operating Temperature Range
LTC2053C, LTC2053C-SYNC.................... 0°C to 70°C
LTC2053I, LTC2053I-SYNC..................–40°C to 85°C
LTC2053H........................................... –40°C to 125°C
Storage Temperature Range
MS8 Package...................................... –65°C to 150°C
DD Package........................................ –65°C to 125°C
Lead Temperature (Soldering, 10 sec)................... 300°C
Pin Configuration
TOP VIEW
EN
1
8 V+
–IN
2
7 OUT
+IN
3
V–
4
9
TOP VIEW
EN/CLK†
–IN
+IN
V–
6 RG
5 REF
1
2
3
4
8
7
6
5
V+
OUT
RG
REF
MS8 PACKAGE
8-LEAD PLASTIC MSOP
DD PACKAGE
8-LEAD (3mm s 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 200°C/W
†PIN 1 IS EN ON LTC2053, CLK ON LTC2053-SYNC
TJMAX = 125°C, θJA = 160°C/W
, UNDERSIDE METAL INTERNALLY CONNECTED TO V–
(PCB CONNECTION OPTIONAL)
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2053CDD#PBF
LTC2053CDD#TRPBF
LAEQ
8-Lead (3mm × 3mm) Plastic DFN
0°C to 70°C
LTC2053IDD#PBF
LTC2053IDD#TRPBF
LAEQ
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LTC2053HDD#PBF
LTC2053HDD#TRPBF
LAEQ
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LTC2053CMS8#PBF
LTC2053CMS8#TRPBF
LTVT
8-Lead Plastic MSOP
0°C to 70°C
LTC2053IMS8#PBF
LTC2053IMS8#TRPBF
LTJY
8-Lead Plastic MSOP
–40°C to 85°C
LTC2053HMS8#PBF
LTC2053HMS8#TRPBF
LTAFB
8-Lead Plastic MSOP
–40°C to 125°C
LTC2053CMS8-SYNC#PBF
LTC2053CMS8-SYNC#TRPBF
LTBNP
8-Lead Plastic MSOP
0°C to 70°C
LTC2053IMS8-SYNC#PBF
LTC2053IMS8-SYNC#TRPBF
LTBNP
8-Lead Plastic MSOP
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
2053syncfc
LTC2053/LTC2053-SYNC
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, REF = 200mV. Output voltage swing is referenced
to V–. All other specifications reference the OUT pin to the REF pin.
PARAMETER
CONDITIONS
Gain Error
AV = 1
Gain Nonlinearity
A V = 1, LTC2053
A V = 1, LTC2053-SYNC
Input Offset Voltage (Note 2)
VCM = 200mV
Average Input Offset Drift (Note 2)
TA = –40°C to 85°C
TA = 85°C to 125°C
Average Input Bias Current (Note 3)
TYP
MAX
l
0.001
0.01
l
l
3
3
12
15
ppm
ppm
–5
±10
µV
l
l
–1
±50
–2.5
nV/°C
µV/°C
VCM = 1.2V
l
4
10
Average Input Offset Current (Note 3)
VCM = 1.2V
l
1
3
Input Noise Voltage
DC to 10Hz
Common Mode Rejection Ratio
(Notes 4, 5)
A V = 1, VCM = 0V to 3V, LTC2053C, LTC2053C-SYNC
A V = 1, VCM = 0.1V to 2.9V, LTC2053I, LTC2053I-SYNC
A V = 1, VCM = 0V to 3V, LTC2053I, LTC2053I-SYNC
A V = 1, VCM = 0.1V to 2.9V, LTC2053H
A V = 1, VCM = 0V to 3V, LTC2053H
l
l
l
l
l
Power Supply Rejection Ratio (Note 6)
VS = 2.7V to 6V
l
Output Voltage Swing High
RL = 2k to V –
RL = 10k to V –
l
l
Output Voltage Swing Low
MIN
No Load
Supply Current, Shutdown
VEN ≥ 2.5V, LTC2053 Only
dB
dB
dB
dB
dB
110
116
dB
2.85
2.95
2.94
2.98
V
V
0.75
20
mV
1
mA
10
µA
0.5
V
2.5
VEN/CLK
nA
113
113
113
100
100
95
100
85
EN/CLK Pin Input Low Voltage, VIL
EN/CLK Pin Input Current
nA
µVP-P
l
EN/CLK Pin Input High Voltage, VIH
%
2.5
l
Supply Current
UNITS
= V–
V
–0.5
–10
µA
Internal Op Amp Gain Bandwidth
200
kHz
Slew Rate
0.2
V/µs
3
kHz
Internal Sampling Frequency
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
V+ = 5V, V– = 0V, REF = 200mV. Output voltage swing is referenced to V–. All other specifications reference the OUT pin to the REF pin.
PARAMETER
CONDITIONS
Gain Error
AV = 1
Gain Nonlinearity
AV = 1
Input Offset Voltage (Note 2)
VCM = 200mV
Average Input Offset Drift (Note 2)
TA = –40°C to 85°C
TA = 85°C to 125°C
Average Input Bias Current (Note 3)
Average Input Offset Current (Note 3)
MIN
TYP
MAX
UNITS
l
0.001
0.01
l
3
10
ppm
–5
±10
µV
l
l
–1
±50
–2.5
nV/°C
µV/°C
VCM = 1.2V
l
4
10
nA
VCM = 1.2V
l
1
3
nA
Common Mode Rejection Ratio
(Notes 4, 5)
A V = 1, VCM = 0V to 5V, LTC2053C
A V = 1, VCM = 0V to 5V, LTC2053C-SYNC
A V = 1, VCM = 0.1V to 4.9V, LTC2053I
A V = 1, VCM = 0.1V to 4.9V, LTC2053I-SYNC
A V = 1, VCM = 0V to 5V, LTC2053I, LTC2053I-SYNC
A V = 1, VCM = 0.1V to 4.9V, LTC2053H
A V = 1, VCM = 0V to 5V, LTC2053H
l
l
l
l
l
l
l
105
100
105
100
95
100
85
116
116
116
116
116
dB
dB
dB
dB
dB
dB
dB
Power Supply Rejection Ratio (Note 6)
VS = 2.7V to 6V
l
110
116
dB
%
2053syncfc
LTC2053/LTC2053-SYNC
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = 0V, REF = 200mV. Output voltage swing is referenced to V–.
All other specifications reference the OUT pin to the REF pin.
PARAMETER
Output Voltage Swing High
CONDITIONS
= 2k to V –
RL
RL = 10k to V –
Output Voltage Swing Low
l
l
MIN
TYP
4.85
4.95
4.94
4.98
l
Supply Current
No Load
Supply Current, Shutdown
VEN ≥ 4.5V, LTC2053 Only
0.85
l
EN/CLK Pin Input Low Voltage, VIL
EN/CLK Pin Input High Voltage, VIH
EN/CLK Pin Input Current
MAX
UNITS
V
V
20
mV
1.1
mA
10
µA
0.5
V
–10
µA
4.5
VEN/CLK = V –
V
–1
Internal Op Amp Gain Bandwidth
200
kHz
Slew Rate
0.2
V/µs
3
kHz
Internal Sampling Frequency
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
V+ = 5V, V– = –5V, REF = 0V.
PARAMETER
CONDITIONS
Gain Error
AV = 1
l
MIN
Gain Nonlinearity
AV = 1
l
Input Offset Voltage (Note 2)
VCM = 0V
Average Input Offset Drift (Note 2)
TA = –40°C to 85°C
TA = 85°C to 125°C
Average Input Bias Current (Note 3)
TYP
MAX
UNITS
0.001
0.01
%
3
10
ppm
10
±20
µV
l
l
–1
±50
–2.5
nV/°C
µV/°C
VCM = 1V
l
4
10
nA
Average Input Offset Current (Note 3)
VCM = 1V
l
1
3
nA
Common Mode Rejection Ratio
(Notes 4, 5)
A V = 1, VCM = –5V to 5V, LTC2053C
A V = 1, VCM = –5V to 5V, LTC2053C-SYNC
A V = 1, VCM = –4.9V to 4.9V, LTC2053I
A V = 1, VCM = –4.9V to 4.9V, LTC2053I-SYNC
A V = 1, VCM = –5V to 5V, LTC2053I, LTC2053I-SYNC
A V = 1, VCM = –4.9V to 4.9V, LTC2053H
A V = 1, VCM = –5V to 5V, LTC2053H
l
l
l
l
l
l
l
105
100
105
100
95
100
90
118
118
118
118
118
dB
dB
dB
dB
dB
dB
dB
Power Supply Rejection Ratio (Note 6)
VS = 2.7V to 11V
l
110
116
dB
Maximum Output Voltage Swing
RL = 2k to GND, C- and I-Grades
RL = 10k to GND, All Grades
RL = 2k to GND, LTC2053H Only
l
l
l
±4.5
±4.6
±4.4
±4.8
±4.9
±4.8
V
V
V
Supply Current
No Load
l
Supply Current, Shutdown
VEN ≥ 4.5V, LTC2053 Only
0.95
1.3
mA
20
µA
EN Pin Input Low Voltage, VIL
–4.5
V
CLK Pin Input Low Voltage, VIL
0.5
V
–20
µA
EN/CLK Pin Input High Voltage, VIH
EN/CLK Pin Input Current
4.5
VEN/CLK = V –
V
–3
Internal Op Amp Gain Bandwidth
200
kHz
Slew Rate
0.2
V/µs
3
kHz
Internal Sampling Frequency
2053syncfc
LTC2053/LTC2053-SYNC
Electrical Characteristics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: These parameters are guaranteed by design. Thermocouple effects
preclude measurement of these voltage levels in high speed automatic
test systems. VOS is measured to a limit determined by test equipment
capability.
Note 3: If the total source resistance is less than 10k, no DC errors result
from the input bias currents or the mismatch of the input bias currents or
the mismatch of the resistances connected to –IN and +IN.
Note 4: The CMRR with a voltage gain, AV, larger than 10 is 120dB (typ).
Note 5: At temperatures above 70°C, the common mode rejection ratio
lowers when the common mode input voltage is within 100mV of the
supply rails.
Note 6: The power supply rejection ratio (PSRR) measurement accuracy
depends on the proximity of the power supply bypass capacitor to the
device under test. Because of this, the PSRR is 100% tested to relaxed
limits at final test. However, their values are guaranteed by design to meet
the data sheet limits.
Typical Performance Characteristics
Input Offset Voltage vs Input
Common Mode Voltage
5
0
G = 1000
G = 100
–5
G = 10
–10
–15
20
VS = 5V
VREF = 0V
10 TA = 25°C
G = 1000
5
0
G = 100
–5
G=1
–10
1.0
1.5
2.0
2.5
0.5
INPUT COMMON MODE VOLTAGE (V)
–15
3.0
0
2
3
4
1
INPUT COMMON MODE VOLTAGE (V)
VS = ±5V
15 VREF = 0V
TA = 25°C
10
G = 10
G = 1000
5
G=1
0
G = 100
–5
–10
–15
G = 10
G=1
0
INPUT OFFSET VOLTAGE (µV)
10
Input Offset Voltage vs Input
Common Mode Voltage
15
VS = 3V
VREF = 0V
TA = 25°C
INPUT OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
15
Input Offset Voltage vs Input
Common Mode Voltage
–20
5
–5
2053 G02
–1
1
3
–3
INPUT COMMON MODE VOLTAGE (V)
2053 G03
2053 G01
Input Offset Voltage vs Input
Common Mode Voltage
Input Offset Voltage vs Input
Common Mode Voltage
5
0
TA = 85°C
–5
TA = 25°C
TA = 70°C
TA = –55°C
–15
–20
0
1.0
1.5
2.0
2.5
0.5
INPUT COMMON MODE VOLTAGE (V)
10
TA = 85°C
5
0
2053 G04
TA = 70°C
–5
TA = 25°C
–10
–15
3.0
20
VS = 5V
15 VREF = 0V
G = 10
INPUT OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
10
–10
Input Offset Voltage vs Input
Common Mode Voltage
20
20
VS = 3V
15 VREF = 0V
G = 10
5
–20
2
3
4
1
INPUT COMMON MODE VOLTAGE (V)
10
TA = 25°C
5
TA = 85°C
0
TA = 70°C
–5
–10
TA = –55°C
–15
TA = –55°C
0
VS = ±5V
15 VREF = 0V
G = 10
5
2053 G05
–20
–5
–1
1
3
–3
INPUT COMMON MODE VOLTAGE (V)
5
2053 G06
2053syncfc
LTC2053/LTC2053-SYNC
Typical Performance Characteristics
60
H-GRADE PARTS
VS = 3V
VREF = 0V
G = 10
40
INPUT OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
60
Input Offset Voltage vs Input
Common Mode Voltage
20
0
TA = 85°C
TA = 25°C
–20
–40
–60
TA = 125°C
0
1.0
1.5
2.0
2.5
0.5
INPUT COMMON MODE VOLTAGE (V)
100
H-GRADE PARTS
VS = 5V
VREF = 0V
G = 10
40
20
0
TA = 85°C
TA = 25°C
–20
–40
–60
3.0
Input Offset Voltage vs Input
Common Mode Voltage
INPUT OFFSET VOLTAGE (µV)
Input Offset Voltage vs Input
Common Mode Voltage
TA = 125°C
0
2053 G07
H-GRADE PARTS
80 VS = ±5V
60 VREF = 0V
G = 10
40
20
TA = 85°C
0
TA = 25°C
–20
–40
–60
TA = 125°C
–80
2
3
4
1
INPUT COMMON MODE VOLTAGE (V)
5
–100
–5
2053 G08
–1
1
3
–3
INPUT COMMON MODE VOLTAGE (V)
5
2053 G09
RS = 5k
RS = 0k
0
RS = 10k
–20
SMALL CIN
–40
50
RS = 15k
RS
+
RS = 20k
–
1.0
1.5
2.0
2.5
0.5
INPUT COMMON MODE VOLTAGE (V)
40
30
20
3.0
R+ = 0k, R– = 15k
0
R+ = 5k, R– = 0k
R+ = 10k, R– = 0k
+
R
–10
–20
–30
SMALL CIN
–40
–50
R–
0
VS = ±5V
VREF = 0V
R+ = R– = RS
CIN < 100pF
G = 10
TA = 25°C
20
RS = 15k
RS = 10k
0
RS = 5k
–10
–20
+
–
R+ = 15k, R– = 0k
1.0
1.5
2.0
2.5
0.5
INPUT COMMON MODE VOLTAGE (V)
0
2053 G10
R+ = 0k, R– = 10k
R+ = 0k, R– = 5k
10
10
–30
Error Due to Input RS Mismatch vs
Input Common Mode (CIN < 100pF)
VS = 3V
VREF = 0V
CIN < 100pF
G = 10
TA = 25°C
20
25
RS = 20k
15
10
5
0
RS = 20k
RS = 15k
RS = 10k
–5
–10
–15
–20
RS
0
VS = 5V
VREF = 0V
R+ = R– = RS
CIN < 100pF
G = 10
TA = 25°C
Error Due to Input RS vs Input
Common Mode (CIN < 100pF)
40
3.0
2053 G13
2
3
4
1
INPUT COMMON MODE VOLTAGE (V)
RIN+ = 0k, RIN– = 15k
0
RIN+ = 10k, RIN– = 0k
–10
RIN+ = 15k, RIN– = 0k
–20
–30
RIN+ = 20k, RIN– = 0k
0
40
RIN+ = 0k, RIN– = 20k
RIN+ = 0k, RIN– = 10k
10
2
3
4
1
INPUT COMMON MODE VOLTAGE (V)
–5
2053 G11
Error Due to Input RS Mismatch vs
Input Common Mode (CIN < 100pF)
VS = 5V
30 VREF = 0V
CIN < 100pF
20 G = 10
TA = 25°C
–40
–25
5
ADDITIONAL OFFSET ERROR (µV)
20
ADDITIONAL OFFSET ERROR (µV)
40
–60
ADDITIONAL OFFSET ERROR (µV)
30
VS = 3V
VREF = 0V
R+ = R– = RS
CIN < 100pF
G = 10
TA = 25°C
ADDITIONAL OFFSET ERROR (µV)
ADDITIONAL OFFSET ERROR (µV)
60
Error Due to Input RS vs Input
Common Mode (CIN < 100pF)
ADDITIONAL OFFSET ERROR (µV)
Error Due to Input RS vs Input
Common Mode (CIN < 100pF)
5
2053 G14
–1
1
3
–3
INPUT COMMON MODE VOLTAGE (V)
5
2053 G12
Error Due to Input RS Mismatch vs
Input Common Mode (CIN < 100pF)
VS = ±5V
30 VREF = 0V
CIN < 100pF
20 G = 10
TA = 25°C
10
R+ = 0k, R– = 20k
R+ = 0k, R– = 15k
0
–10
R+ = 15k, R– = 0k
–20
R+ = 20k, R– = 0k
–30
–40
–5
–1
1
3
–3
INPUT COMMON MODE VOLTAGE (V)
5
2053 G15
2053syncfc
LTC2053/LTC2053-SYNC
Typical Performance Characteristics
RS = 15k
RS = 10k
0
RS = 5k
–10
RS
–20
BIG CIN
–30
–40
+
–
RS
0
1.0
1.5
2.0
2.5
0.5
INPUT COMMON MODE VOLTAGE (V)
VS = 5V
VREF = 0V
50 R+ = R– = RS
CIN > 1µF
30 G = 10
TA = 25°C
–30
–50
R+ = 0k, R– = 500Ω
R+ = 0k, R– = 100Ω
0
–200
R+ = 100Ω, R– = 0k
R+ = 500Ω, R– = 0k
R+
R+ = 1k, R– = 0k
–
R–
1.0
1.5
2.0
2.5
0.5
INPUT COMMON MODE VOLTAGE (V)
100
R+ = 0k, R– = 500Ω
50
R+ = 0k, R– = 100Ω
0
R+ = 100Ω, R– = 0k
50
–200
R+ = 500Ω, R– = 0k
R+ = 1k, R– = 0k
0
RS = 1k
RS = 500Ω
–20
–40
–60
–5
2053 G17
R+ = 0k, R– = 1k
–150
3.0
RS = 5k
0
–80
5
RS = 10k
–1
1
3
–3
INPUT COMMON MODE VOLTAGE (V)
5
2053 G18
Error Due to Input RS Mismatch
vs Input Common Mode (CIN >1µF)
150
VS = 5V
150 VREF = 0V
TA = 25°C
–100
+
BIG CIN
0
2
3
4
1
INPUT COMMON MODE VOLTAGE (V)
Error Due to Input RS vs Input
Common Mode (CIN > 1µF)
VS = ±5V
= 0V
60 VREF
R+ = R– = RS
40 CIN > 1µF
G = 10
20 TA = 25°C
Error Due to Input RS Mismatch
vs Input Common Mode (CIN >1µF)
ADDITIONAL OFFSET ERROR (µV)
ADDITIONAL OFFSET ERROR (µV)
R+ = 0k, R– = 1k
100
–150
0
200
VS = 3V
150 VREF = 0V
TA = 25°C
–100
RS = 500Ω
2053 G16
200
–50
RS = 1k
–10
Error Due to Input RS Mismatch
vs Input Common Mode (CIN >1µF)
50
RS = 5k
10
–70
3.0
80
RS = 10k
ADDITIONAL OFFSET ERROR (µV)
70
Error Due to Input RS vs Input
Common Mode (CIN > 1µF)
ADDITIONAL OFFSET ERROR (µV)
ADDITIONAL OFFSET ERROR (µV)
VS = 3V
= 0V
30 VREF
R+ = R– = RS
C > 1µF
20 IN
G = 10
T = 25°C
10 A
ADDITIONAL OFFSET ERROR (µV)
40
Error Due to Input RS vs Input
Common Mode (CIN > 1µF)
2
3
4
1
INPUT COMMON MODE VOLTAGE (V)
VS = ±5V
VREF = 0V
100 TA = 25°C
R+ = 0k, R– = 1k
R+ = 0k, R– = 500Ω
50
R+ = 0k, R– = 100Ω
0
R+ = 100Ω, R– = 0k
–50
R+ = 500Ω, R– = 0k
R+ = 1k, R– = 0k
–100
5
–150
–5
–1
1
3
–3
INPUT COMMON MODE VOLTAGE (V)
2053 G20
5
2053 G21
2053 G19
Offset Voltage vs Temperature
VOS vs REF (Pin 5)
80
30
VIN+ = VIN– = REF
G = 10
TA = 25°C
20
VIN+ = VIN– = REF
G = 10
TA = 25°C
40
40
VS = 5V
VS = ±5V
0
VS = 3V
–20
20
10
0
VS = 5V
VS = 3V
–10
VOS (µV)
20
VOS (µV)
INPUT OFFSET VOLTAGE (µV)
60
VOS vs REF (Pin 5)
60
0
VS = 10V
–20
–40
–80
–50
–40
–20
–60
–25
0
25
50
75
TEMPERATURE (°C)
100
125
2053 G22
–30
0
1
2
VREF (V)
3
4
2053 G23
–60
0
1
2
3
5
4
VREF (V)
6
7
8
9
2053 G24
2053syncfc
LTC2053/LTC2053-SYNC
Typical Performance Characteristics
Gain Nonlinearity, G = 1
4
2
0
–2
–4
VS = ±2.5V
8 VREF = 0V
G = 10
6
RL = 10k
4 TA = 25°C
–2
–8
–10
–2.4 –1.9 –1.4 –0.9 –0.4 0.1 0.6
OUTPUT VOLTAGE (V)
1.1
3
G = 10
TA = 25°C
VS = ±5V
200
VS = 5V
150
VS = 3V
100
50
0
1
10
100
1000
FREQUENCY (Hz)
0.6
–0.4
1.6
OUTPUT VOLTAGE (V)
10000
1
0
–1
–2
0
2
2053 G28
4
6
TIME (s)
3.0
8
5
4
VS = 3V, SOURCING
2.0
1.5
0.5
0
0.01
VS = 3V, SINKING
VS = 5V, SINKING
1
0.1
OUTPUT CURRENT (mA)
10
100
FREQUENCY (Hz)
1000
2053 G27
10
VS = 5V
TA = 25°C
2
1
0
–1
–2
–3
0
2
2053 G29
VS = 5V, SOURCING
2.5
1.0
1
R+ = 0k, R– = 10k
4
6
TIME (s)
8
10
2053 G30
Output Voltage Swing
vs Output Current
4.0
3.5
–
R–
3
OUTPUT VOLTAGE SWING (V)
OUTPUT VOLTAGE SWING (V)
4.5
TA = 25°C
+
2053 G26
VS = 3V
TA = 25°C
2
–3
R+
Input Referred Noise in
10Hz Bandwidth
Output Voltage Swing
vs Output Current
5.0
70
2.6
Input Referred Noise in
10Hz Bandwidth
INPUT REFERRED NOISE VOLTAGE (µV)
INPUT REFERRED NOISE DENSITY (nV/•Hz)
250
–1.4
2053 G25
Input Voltage Noise Density
vs Frequency
R+ = 10k, R– = 0k
80
–10
–2.4
1.6
R+ = R– = 10k
100
90
–4
–8
R+ = R– = 1k
110
0
–6
VS = 3V, 5V, ±5V
VIN = 1VP-P
120
2
–6
300
CMRR vs Frequency
130
CMRR (db)
6
NONLINEARITY (ppm)
VS = ±2.5V
VREF = 0V
G=1
RL = 10k
TA = 25°C
8
NONLINEARITY (ppm)
Gain Nonlinearity, G = 10
10
INPUT REFERRED NOISE VOLTAGE (µV)
10
VS = ±5V
TA = 25°C
3
2
1
0
–1
–2
–3
–4
10
2053 G31
SOURCING
–5
0.01
SINKING
1
0.1
OUTPUT CURRENT (mA)
10
2053 G32
2053syncfc
LTC2053/LTC2053-SYNC
Typical Performance Characteristics
Low Gain Settling Time
vs Settling Accuracy
Supply Current vs Supply Voltage
1.00
8
0.95
7
SUPPLY CURRENT
0.85
SETTLING TIME (ms)
TA = 125°C
0.90
TA = 85°C
0.80
TA = 0°C
0.75
TA = –55°C
0.70
6
5
4
3
2
0.65
1
0.60
2.5
4.5
6.5
8.5
SUPPLY VOLTAGE (V)
0
0.0001
10.5
2053 G33
35
3.35
CLOCK FREQUENCY (kHz)
SETTLING TIME (ms)
25
0.1
2053 G34
3.40
VS = 5V
dVOUT = 1V
0.1% ACCURACY
TA = 25°C
30
0.01
0.001
SETTLING ACCURACY (%)
Internal Clock Frequency
vs Supply Voltage
Settling Time vs Gain
20
15
10
3.30
TA = 125°C
3.25
TA = 85°C
3.20
3.15
5
0
VS = 5V
dVOUT = 1V
G < 100
TA = 25°C
TA = 25°C
1
10
100
GAIN (V/V)
1000
10000
2053 G35
3.10
2.5
4.5
TA = –55°C
6.5
8.5
SUPPLY VOLTAGE (V)
10.5
2053 G36
Pin Functions
EN (Pin 1, LTC2053 Only): Active Low Enable Pin.
CLK (Pin 1, LTC2053-SYNC Only): Clock input for Synchronizing to External System Clock.
–IN (Pin 2): Inverting Input.
+IN (Pin 3): Noninverting Input.
V– (Pin 4): Negative Supply.
REF (Pin 5): Voltage Reference (VREF) for Amplifier
Output.
RG (Pin 6): Inverting Input of Internal Op Amp. See
Figure 1.
OUT (Pin 7): Amplifier Output. See Figure 1.
V+ (Pin 8): Positive Supply.
2053syncfc
LTC2053/LTC2053-SYNC
Block Diagram
8
+IN
–IN
ZERO-DRIFT
OP AMP
+
3
CS
V+
OUT
CH
7
–
2
REF
5
V–
RG
6
4
EN/CLK*
1
2053 BD
*NOTE: PIN 1 IS EN ON THE LTC2053 AND CLK ON THE LTC2053-SYNC
Applications Information
Theory of Operation
±5 Volt Operation
The LTC2053 uses an internal capacitor (CS) to sample
a differential input signal riding on a DC common mode
voltage (see the Block Diagram). This capacitor’s charge is
transferred to a second internal hold capacitor (CH) translating the common mode of the input differential signal to
that of the REF pin. The resulting signal is amplified by a
zero-drift op amp in the noninverting configuration. The
RG pin is the negative input of this op amp and allows
external programmability of the DC gain. Simple filtering
can be realized by using an external capacitor across the
feedback resistor.
When using the LTC2053 with supplies over 5.5V, care
must be taken to limit the maximum difference between
any of the input pins (+IN or –IN) and the REF pin to
5.5V; if not, the device will be damaged. For example, if
rail-to-rail input operation is desired when the supplies
are at ±5V, the REF pin should be 0V, ±0.5V. As a second
example, if V+ is 10V and V– and REF are at 0V, the inputs
should not exceed 5.5V.
Input Voltage Range
The input common mode voltage range of the LTC2053
is rail-to-rail. However, the following equation limits the
size of the differential input voltage:
V– ≤ (V+IN – V–IN) + VREF ≤ V+ – 1.3
Where V+IN and V–IN are the voltages of the +IN and –IN
pins, respectively, VREF is the voltage at the REF pin and
V+ is the positive supply voltage.
For example, with a 3V single supply and a 0V to 100mV
differential input voltage, VREF must be between 0V and
1.6V.
Settling Time
The sampling rate is 3kHz and the input sampling period
during which CS is charged to the input differential voltage
VIN is approximately 150µs. First assume that on each
input sampling period, CS is charged fully to VIN. Since
CS = CH (= 1000pF), a change in the input will settle to
N bits of accuracy at the op amp noninverting input after
N clock cycles or 333µs(N). The settling time at the OUT
pin is also affected by the settling of the internal op amp.
Since the gain bandwidth of the internal op amp is typically
200kHz, the settling time is dominated by the switched
capacitor front end for gains below 100 (see the Typical
Performance Characteristics section).
2053syncfc
10
LTC2053/LTC2053-SYNC
Applications Information
SINGLE SUPPLY, UNITY GAIN
SINGLE SUPPLY, UNITY GAIN
5V
V+IN
+
VIN
V–IN
–
3
2
5V
8
+
7
–
DUAL SUPPLY, NONUNITY GAIN
5
6
V+IN
VOUT
+
VIN
V–IN
–
3
2
5V
8
+
7
–
4
5
6
V+IN
VOUT
+
VIN
V–IN
–
3
2
5V
8
+
7
–
4
5
6 R2
4
V+IN
VOUT
+
VIN
V–IN
–
8
3
+
2
R1
–5V
0V < V–IN < 5V AND |V–IN – VREF| < 5.5V
0V < V+IN < 5V AND |V+IN – VREF| < 5.5V
0V < VIN + VREF < 3.7V
–5V < V–IN < 5V AND |V–IN – VREF| < 5.5V
–5V < V+IN < 5V AND |V+IN – VREF| < 5.5V
–5V < VIN + VREF < 3.7V
VOUT = VIN + VREF
VOUT = 1 +
R2
R1
5
4
VREF
7
–
–5V
VREF
0V < V+IN < 5V
0V < V–IN < 5V
0V < VIN < 3.7V
VOUT = VIN
DUAL SUPPLY, NONUNITY GAIN
VIN + VREF
6 R2
VOUT
R1
VREF
–5V < V–IN < 5V AND |V–IN – VREF| < 5.5V
–5V < V+IN < 5V AND |V+IN – VREF| < 5.5V
–5V < VIN + VREF < 3.7V
VOUT = 1 +
R2
R1
(VIN + VREF)
2053 F01
Figure 1
Input Current
Power Supply Bypassing
Whenever the differential input VIN changes, CH must be
charged up to the new input voltage via CS. This results
in an input charging current during each input sampling
period. Eventually, CH and CS will reach VIN and, ideally,
the input current would go to zero for DC inputs.
The LTC2053 uses a sampled data technique and, therefore,
contains some clocked digital circuitry. It is, therefore,
sensitive to supply bypassing. For single or dual supply
operation, a 0.1µF ceramic capacitor must be connected
between Pin 8 (V+) and Pin 4 (V–) with leads as short as
possible.
In reality, there are additional parasitic capacitors which
disturb the charge on CS every cycle even if VIN is a DC
voltage. For example, the parasitic bottom plate capacitor
on CS must be charged from the voltage on the REF pin
to the voltage on the –IN pin every cycle. The resulting
input charging current decays exponentially during each
input sampling period with a time constant equal to RSCS.
If the voltage disturbance due to these currents settles
before the end of the sampling period, there will be no
errors due to source resistance or the source resistance
mismatch between –IN and +IN. With RS less than 10k,
no DC errors occur due to this input current.
In the Typical Performance Characteristics section of this
data sheet, there are curves showing the additional error
from non-zero source resistance in the inputs. If there
are no large capacitors across the inputs, the amplifier is
less sensitive to source resistance and source resistance
mismatch. When large capacitors are placed across the
inputs, the input charging currents previously described
result in larger DC errors, especially with source resistor
mismatches.
Synchronizing to an External Clock
(LTC2053-SYNC Only)
The LTC2053 has an internally generated sample clock that
is typically 3kHz. There is no need to provide the LTC2053
with a clock. However, in some applications, it may be
desirable for the user to control the sampling frequency
more precisely to avoid undesirable aliasing. This can be
done with the LTC2053-SYNC. This device uses Pin 1 as a
clock input whereas the LTC2053 uses Pin 1 as an enable
pin. If CLK (Pin 1) is left floating on the LTC2053-SYNC,
the device will run on its internal oscillator, similar to the
LTC2053. However, if not externally synchronizing to a
system clock, it is recommended that the LTC2053 be
used instead of the LTC2053-SYNC because the LTC2053SYNC is sensitive to parasitic capacitance on the CLK pin
when left floating. Clocking the LTC2053-SYNC is accomplished by driving the CLK pin at 8 times the desired
sample clock frequency. This completely disables the
internal clock. For example, to achieve the nominal
LTC2053 sample clock rate of 3kHz, a 24kHz external clock
should be applied to the CLK pin of the LTC2053‑SYNC.
2053syncfc
11
LTC2053/LTC2053-SYNC
Applications Information
If a square wave is used to drive the CLK pin, a 5µs RC
time constant should be placed in front of the CLK pin to
maintain low offset voltage performance (see Figure 2).
This avoids internal and external coupling of the high
frequency components of the external clock at the instant
the LTC2053-SYNC holds the sampled input.
V+IN
+
3
VD
V–IN
–
8
+
CLK
2
LTC2053-SYNC
4.7nF
1
–
5
4
7
6 R2
EXTERNAL
CLOCK
5V
0V
VOUT
R1
2053 F02
Figure 2. Centered Justified for a Single Line of Text
20
14
15
12
INPUT OFFSET (µV)
INPUT BIAS CURRENT (nA)
VS = ±5V
10
5
0
VS = 5V
–5
VS = 3V
–10
TYP LTC2053
SAMPLE FREQUENCY
–15
–20
0
2053 F03
Figure 3. LTC2053-SYNC Input
Offset vs Sample Frequency
10
8
6
4
TYP LTC2053
SAMPLE FREQUENCY
2
4000
6000
8000 10000
2000
SAMPLE FREQUENCY (Hz) (= FCLK/8)
12
VS = 5V
VREF = 0
VCM = 1V
INPUT REFERRED NOISE VOLTAGE (µVPP)
1k
5V
The LTC2053-SYNC is tested with a sample clock of 3kHz
(fCLK = 24kHz) to the same specifications as the LTC2053.
In addition, the LTC2053-SYNC is tested at one-half and
2x this frequency to verify proper operation. The curves
in the Typical Performance Characteristics section of this
data sheet apply to the LTC2053-SYNC when driving it
with a 24kHz clock at Pin 1 (fCLK = 24kHz, 3kHz sample
clock rate). Below are three curves that show the behavior
of the LTC2053-SYNC as the clock frequency is varied.
The offset is essentially unaffected over a 2:1 increase or
decrease of the typical LTC2053 sample clock speed. The
bias current is directly proportional to the clock speed.
The noise is roughly proportional to the square root of
the clock frequency. For optimum noise and bias current
performance, drive the LTC2053-SYNC with a nominal
24kHz external clock (3kHz sample clock).
0
0
4000
6000
8000 10000
2000
SAMPLE FREQUENCY (Hz) (= FCLK/8)
2053 F04
Figure 4. LTC2053-SYNC Average Input
Bias Current vs Sample Frequency
VS = 5V
TA = 25°C
NOISE IN 10Hz BANDWIDTH
10
8
TYP LTC2053
SAMPLE FREQUENCY
6
4
2
0
0
4000
6000
8000
2000
SAMPLE FREQUENCY (FCLK/8)
10000
2053 F05
Figure 5. LTC2053-SYNC Input Referred
Noise vs Sample Frequency
2053syncfc
12
LTC2053/LTC2053-SYNC
Typical Applications
Precision ÷2
(Low Noise 2.5V Reference)
Precision Current Source
8V 0.1µF
5V
2
–
8
1
LTC2053 RG 7
REF 6 0.1µF
+
3
5
EN
4
1
R
VOUT
i
8
LT1027–5
3
4
1µF
VC
2
–
1
7
4
5
6
2.5V
(110nV/•Hz)
1k
V
i = —C , i ≤ 5mA
R
10k
8
LTC2053
2.7k
LOAD
+
2
0.1µF
0 < VOUT < (5V – VC)
2053 TA03
0.1µF
2053 TA02
Precision Doubler
(General Purpose)
5V
VIN
3
+
5V
0.1µF
3
8
7
LTC2053
2
Precision Inversion
(General Purpose)
–
4
1
5
6
VOUT
+
0.1µF
8
7
LTC2053
VIN
2
–
1
4
5
6
VOUT
VOUT = 2VIN
0.1µF
0.1µF
0.1MF
–5V
2053 TA04
–5V
VOUT = –VIN
2053 TA05
2053syncfc
13
LTC2053/LTC2053-SYNC
Typical Applications
Differential Thermocouple Amplifier
10M
0°C m 500°C
TYPE K
THERMOCOUPLE
(40.6µV/°C)
1M
YELLOW
+
ORANGE
–
5V 0.1µF
10M
1M
10k
3
10k 2
1
0.001µF
0.001µF
8
+
LTC2053
–
RG
EN
4
REF
5
7
6
10mV/°C
0.1µF
249k
1%
100Ω
5V
THERMAL
COUPLING
1k
1%
0.1µF
5V
2
4
LT1025
3
VO
R–
4
5
3
6
–
+
SCALE FACTOR
TRIM
1
LTC2050
2
200k
2053 TA06
High Side Power Supply Current Sense
VREG
ILOAD
0.00157
0.1µF
2
8
–
LTC2053
3
LOAD
+
5
1, 4
7
6 10k
OUT
100mV/A
OF LOAD
CURRENT
0.1µF
150Ω
2053 TA07
2053syncfc
14
LTC2053/LTC2053-SYNC
Package Description
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
0.70 p0.05
3.5 p0.05
1.65 p0.05
2.10 p0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 p 0.05
0.50
BSC
2.38 p0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
3.00 p0.10
(4 SIDES)
R = 0.125
TYP
5
0.40 p 0.10
8
1.65 p 0.10
(2 SIDES)
0.75 p0.05
4
0.25 p 0.05
1
(DD8) DFN 0509 REV C
0.50 BSC
2.38 p0.10
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
2053syncfc
15
LTC2053/LTC2053-SYNC
Package Description
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev F)
3.00 p 0.102
(.118 p .004)
(NOTE 3)
0.889 p 0.127
(.035 p .005)
5.23
(.206)
MIN
0.254
(.010)
7 6 5
0.52
(.0205)
REF
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
DETAIL “A”
0o – 6o TYP
GAUGE PLANE
3.20 – 3.45
(.126 – .136)
0.53 p 0.152
(.021 p .006)
DETAIL “A”
0.42 p 0.038
(.0165 p .0015)
TYP
8
0.65
(.0256)
BSC
1
1.10
(.043)
MAX
2 3
4
0.86
(.034)
REF
0.18
(.007)
RECOMMENDED SOLDER PAD LAYOUT
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.1016 p 0.0508
(.004 p .002)
MSOP (MS8) 0307 REV F
2053syncfc
16
LTC2053/LTC2053-SYNC
Revision History
(Revision history begins at Rev C)
REV
DATE
DESCRIPTION
PAGE NUMBER
C
7/10
Corrected text in the Absolute Maximum Ratings section
2
Updated Pin 6 and Pin 7 text in the Pin Functions section
9
Replaced Figure 1
11
2053syncfc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
17
LTC2053/LTC2053-SYNC
Typical Application
Linearized Platinum RTD Amplifier
5V 0.1µF
2
1.21k
3
–
*CONFORMING TO IEC751 OR DIN43760
RT = RO (1 + 3.908 • 10–3T – 5.775 • 10–7T2), RO = 100Ω
(e.g., 100Ω AT 0°C, 175.9Ω AT 200°C, 247.1Ω AT 400°C)
8
LTC2053
+
4
1
5
7
6
0.1µF
5V
2.7k
16.9k
10k
i ≈ 1mA
5V
2
3
PT100*
3-WIRE RTD
–
0.1µF
8
LTC2053
+
4
1
5
LT1634-1.25
49.9Ω
7
6
249k
1M
0.1µF
39.2k
0.1µF
GAIN CW
11k
16.2k
LINEARITY
10k
CW
ZERO
24.9k
5k
CW
10mV/°C
0°C – 400°C
(±0.1°C)
100Ω
953Ω
2053 TA08
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
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Zero-Drift Single/Dual Operation Amplifier
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2053syncfc
18 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
LT 0710 REV C • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2010