MM145453 www.ti.com SNLS061C – MAY 2000 – REVISED MARCH 2013 MM145453 Liquid Crystal Display Driver Check for Samples: MM145453 FEATURES DESCRIPTION • • • • • • • The MM145453 is a monolithic integrated circuit utilizing CMOS metal gate, low threshold enhancement mode devices. The chip can drive up to 33 LCD segments and can be paralleled to increase this number. The chip is capable of driving a 4½ digit 7-segment display with minimal interface between the display and the data source. 1 2 Serial Data Input Wide Power Supply Operation TTL Compatibility Up to 33 LCD Segments Alphanumeric or Bar Graph Capability Cascaded Operation Capability Pin Compatible with MC145453 APPLICATIONS • • • • • COPS or Microprocessor Displays Industrial Control Indicator Digital Clock, Thermometer, Counter, Voltmeter Instrumentation Displays Remote Displays The MM145453 stores display data in latches after it is clocked in, and holds the data until new display data is received. The MM145453 is available in a molded 44 pin surface mount PLCC package. The MM145453 is pin out and functionally compatible with the MC145453. Connection Diagram Figure 1. Top View See Package Number FN0044A 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2013, Texas Instruments Incorporated MM145453 SNLS061C – MAY 2000 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Voltage at Any Pin, Referenced to Gnd -0.3V to +10V Storage Temperature -65°C to +150°C Power Dissipation at 25°C 350mW Power Dissipation at 70°C 300mW Junction Temperature +150°C Lead Temperature (1) (2) (Soldering, 10s) 300°C “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. Recommended Operating Conditions VDD 3V to 10V Operating Temperature −40°C to 85°C Electrical Characteristics The following specifications apply for TA within operation range, VDD = 3.0V to 10V, VSS = 0V, unless otherwise specified. Parameter Conditions Max Units 10 V 10 µA VDD= 10V 40 µA VDD= 3V 0.4 V VDD= 5V 0.8 V 0.8 V Supply Voltage, VDD Average Supply Current, IDD Min Typical 3 All Outputs Open, Clock=Gnd, Data=Gnd,OSC=Gnd, BP_IN @ 32Hz VDD= 5V Input Logical '0' Voltage, VIL VDD= 10V Input Logical '1' Voltage, VIH VDD= 3V 2.0 V VDD= 5V 2.0 V VDD= 10V 8.0 V Segment Sink Current, IOL VDD= 3V, VOUT= 0.3V -20 -40 µA Segment Source Current, IOH VDD= 3V, VOUT= 2.7V 20 40 µA Backplane Out Sink Current, IOL VDD= 3V, VOUT= 0.3V -320 -500 µA Backplane Out Source Current, IOH VDD= 3V, VOUT= 2.7V 320 500 µA Segment Output Offset Voltage Segment Load = 250pF (1) Backplane Output Offset Voltage Backplane Load = 8750pF (1) +/-50 mV +/-50 mV Backplane Out Frequency ROSC_IN= 50kΩ, COSC_IN= 0.01µF Clock Input Frequency, fCLOCK (2) VDD= 3V (1) (3) 500 kHz VDD= 5V (1) 750 kHz 1.0 MHz VDD= 10V 75 (1) Hz Clock Input Duty Cycle (2) 40 Data Input Set-Up Time, tDS 300 ns Data Input Hold Time, tDH 300 ns (1) (2) (3) 2 60 % This parameter is guaranteed (but not production tested) over the operating temperature range and the operating supply voltage range. Not to be used in Q.A. testing. Clock input rise time (tr) and fall time (tf) must not exceed 300ns AC input waveform for test purposes: tr≤ 20ns, tf≤ 20ns, fCLOCK= 500kHz, Duty Cycle = 50% ±10% Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: MM145453 MM145453 www.ti.com SNLS061C – MAY 2000 – REVISED MARCH 2013 Timing Diagram Figure 2. Block Diagram Figure 3. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: MM145453 3 MM145453 SNLS061C – MAY 2000 – REVISED MARCH 2013 www.ti.com APPLICATIONS INFORMATION The MM145453 is specifically designed to operate 4½ digit 7-segment displays with minimal interface with the display and data source. Serial data transfer from the data source to the display driver is accomplished with 2 signals, serial Data and Clock. Using a format of a leading "1" followed by the 33 data bits and 2 trailing don't care bits, allows data transfer without the need of an additional Data Load signal. Since the MM145453 does not contain a character generator, the formatting of the segment information must be done prior to inputting the data to the MM145453. The transfer of the 33 data bits is complete at the falling edge of the 36th clock cycle, thus providing non-multiplexed, direct drive to the display. Outputs change only if the serial data bits differ from the previous time. Figure 4 shows the data input format. A single start bit of logical '1' precedes the 33 bits of segment data for a total of 34 bits that need to be defined and clocked in. After the 34 bits are clocked in, 2 additional clock cycles are required. At the 36th clock cycle an internal LOAD signal is generated synchronously with the rising edge of the Clock In signal, which loads the 33 bits of segment data in the shift register into the latches. At the falling edge of the 36th clock cycle an internal RESET signal is generated which clears all the shift registers for the next set of data. The shift registers are static master-slave configuration. There is no clear for the master portion of the first shift register, thus allowing continuous operation. The data during the 35th and 36th clock cycles is "don't care", but setting data to logical '0' for these two clock cycles is the preferred format. The data input bits map directly to the segment output pins and the display. The MM145453 does not have any format restrictions, as all outputs are controllable. The MM145453 has an internal oscillator which can generate the required clock signal to drive the LCD back plane. The frequency of the internal oscillator is set by a pull-up resistor (ROSC_IN) connected from the OSC_IN pin to VDD, and a capacitor (COSC_IN) connected from the OSC_IN pin to Ground. Due to the current sink limitations of the OSC_IN circuitry, the lowest recommended resistor value for setting the oscillator frequency is 9kΩ. It will typically take 2 to 4 RC time constants to charge the OSC_IN pin from near 0V to within 1V of VDD which is the high threshold voltage point for the OSC_IN circuitry. An approximate calculation of fOSC is: fOSC = 1 / (lη(VDD/1V) X ROSC_IN X COSC_IN) A ROSC_IN resistor value of 50kΩ with a COSC_IN capacitor value of 0.01µF and a VDD value of 5.00V would produce a typical oscillator frequency ( fOSC) of about 1200Hz. The fOSC signal is divided by 16 before it is presented at the BP_OUT pin. For this example the approximate BP_OUT frequency will be fOSC/16, or about 75Hz. The BP_IN pin of the MM145453 can be used with an externally supplied signal, provided it has a duty cycle of 50%. Any deviation from a precise 50% duty cycle will result in an offset voltage on the LCD. The use of an external clock allows synchronizing the display drive with AC power, other internal clocks, or DVM integration time to reduce interference from the display. When using an external clock for the back plane drive the internal oscillator should be disabled by connecting the OSC_IN pin directly to ground. This will prevent possible internal oscillations, and reduce device dissipation. The MM145453 is a pin out variation of the MM5453. For additional applications information please refer to the MM5453 data sheet. 4 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: MM145453 MM145453 www.ti.com SNLS061C – MAY 2000 – REVISED MARCH 2013 Input Data Format Figure 4. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: MM145453 5 MM145453 SNLS061C – MAY 2000 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision B (March 2013) to Revision C • 6 Page Changed layout of National Data Sheet to TI format ............................................................................................................ 5 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: MM145453 PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) MM145453V NRND PLCC FN 44 25 TBD Call TI Call TI 0 to 70 MM145453V MM145453V/NOPB ACTIVE PLCC FN 44 25 Green (RoHS & no Sb/Br) SN Level-3-245C-168 HR 0 to 70 MM145453V MM145453VX NRND PLCC FN 44 500 TBD Call TI Call TI 0 to 70 MM145453V MM145453VX/NOPB ACTIVE PLCC FN 44 500 Green (RoHS & no Sb/Br) SN Level-3-245C-168 HR 0 to 70 MM145453V (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MPLC004A – OCTOBER 1994 FN (S-PQCC-J**) PLASTIC J-LEADED CHIP CARRIER 20 PIN SHOWN Seating Plane 0.004 (0,10) 0.180 (4,57) MAX 0.120 (3,05) 0.090 (2,29) D D1 0.020 (0,51) MIN 3 1 19 0.032 (0,81) 0.026 (0,66) 4 E 18 D2 / E2 E1 D2 / E2 8 14 0.021 (0,53) 0.013 (0,33) 0.007 (0,18) M 0.050 (1,27) 9 13 0.008 (0,20) NOM D/E D2 / E2 D1 / E1 NO. OF PINS ** MIN MAX MIN MAX MIN MAX 20 0.385 (9,78) 0.395 (10,03) 0.350 (8,89) 0.356 (9,04) 0.141 (3,58) 0.169 (4,29) 28 0.485 (12,32) 0.495 (12,57) 0.450 (11,43) 0.456 (11,58) 0.191 (4,85) 0.219 (5,56) 44 0.685 (17,40) 0.695 (17,65) 0.650 (16,51) 0.656 (16,66) 0.291 (7,39) 0.319 (8,10) 52 0.785 (19,94) 0.795 (20,19) 0.750 (19,05) 0.756 (19,20) 0.341 (8,66) 0.369 (9,37) 68 0.985 (25,02) 0.995 (25,27) 0.950 (24,13) 0.958 (24,33) 0.441 (11,20) 0.469 (11,91) 84 1.185 (30,10) 1.195 (30,35) 1.150 (29,21) 1.158 (29,41) 0.541 (13,74) 0.569 (14,45) 4040005 / B 03/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. 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