NCV8570 200 mA, Ultra Low Noise, High PSRR, BiCMOS RF LDO Regulator Noise sensitive RF applications such as Power Amplifiers in satellite radios, infotainment equipment, and precision instrumentation for automotive applications require very clean power supplies. The NCV8570 is 200 mA LDO that provides the engineer with a very stable, accurate voltage with ultra low noise and very high Power Supply Rejection Ratio (PSRR) suitable for RF applications. In order to optimize performance for battery operated portable applications, the NCV8570 employs an advanced BiCMOS process to combine the benefits of low noise and superior dynamic performance of bipolar elements with very low ground current consumption at full loads offered by CMOS. Furthermore, in order to provide a small footprint for space−conscious applications, the NCV8570 is stable with small, low value capacitors and is available in very small DFN6 2x2.2 and TSOP−5 packages. http://onsemi.com MARKING DIAGRAMS 6 1 (Note: Microdot may be in either location) 5 • • • • • • • • • • • TSOP−5 SN SUFFIX CASE 483 5 − 1.8 V, 2.5 V, 2.75 V, 2.8 V, 3.0 V, 3.3 V − Contact Factory for Other Voltage Options Output Current Limit 200 mA Ultra Low Noise (typ 15 mVrms) Very High PSRR (typ 80 dB) Stable with Ceramic Output Capacitors as low as 1 mF Low Sleep Mode Current (max 1 mA) Active Discharge Circuit Current Limit Protection Thermal Shutdown Protection AEC Qualified PPAP Capable These are Pb−Free Devices 1 XXX = Specific Device Code A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) PIN ASSIGNMENTS CE 1 6 Cnoise GND 2 5 GND Vin 3 4 Vout (Top View) Satellite and HD Radio Noise Sensitive Applications (Video, Audio) Analog Power Supplies Portable/Built−in DVD Entertainment Systems GPS Vout NCV8570 CE Cnoise GND Vin 1 November, 2009 − Rev. 3 Vout GND Cnoise CE Vout Cnoise Cout (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. Figure 1. Typical Application Schematic © Semiconductor Components Industries, LLC, 2009 5 Vin Vin Cin XXXAYWG G 1 Typical Applications • • • • • XXMG G XX = Specific Device Code M = Date Code G = Pb−Free Package Features • Output Voltage Options: É É DFN6, 2x2.2 MN SUFFIX CASE 506BA 1 Publication Order Number: NCV8570/D NCV8570 Vin Vout Bandgap Reference Voltage Current Limit − + Cnoise CE Active Discharge GND Figure 2. Simplified Block Diagram PIN FUNCTION DESCRIPTION Pin No. DFN6 TSOP−5 Pin Name 1 3 CE 2, 5, EPAD 2 GND 3 1 Vin Power Supply Input Voltage 4 5 Vout Regulated Output Voltage 6 4 Cnoise Description Chip Enable: This pin allows on/off control of the regulator. To disable the device, connect to GND. If this function is not in use, connect to Vin. Internal 5 MW Pull Down resistor is connected between CE and GND. Power Supply Ground (Pins are fused for the DFN package) Noise reduction pin. (Connect 100 nF or 10 nF capacitor to GND) MAXIMUM RATINGS Rating Symbol Value Unit Input Voltage (Note 1) Vin −0.3 V to 6 V V Chip Enable Voltage VCE −0.3 V to Vin +0.3 V V VCnoise −0.3 V to Vin +0.3 V V Vout −0.3 V to Vin +0.3 V V TJ(max) 150 °C TSTG −55 to 150 °C Noise Reduction Voltage Output Voltage Maximum Junction Temperature (Note 1) Storage Temperature Range Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. NOTE: This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL−STD−883, Method 3015 Machine Model Method 200 V This device series meets or exceeds AEC Q100 standard. THERMAL CHARACTERISTICS Rating Symbol Package Thermal Resistance, DFN6: (Note 1) Junction−to−Lead (pin 2) Junction−to−Ambient RqJA Package Thermal Resistance, TSOP−5: (Note 1) Junction−to−Lead (pin 5) Junction−to−Ambient RqJA 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area http://onsemi.com 2 Value 37 120 109 220 Unit °C/W °C/W NCV8570 ELECTRICAL CHARACTERISTICS (Vin = Vout + 0.5 V, VCE = 1.2 V, Cin = 0.1 mF, Cout = 1 mF, Cnoise = 10 nF, TA = −40°C to 85°C, unless otherwise specified (Note 2)) Test Conditions Characteristic Symbol Min Typ Max Unit Vin 2.5 − 5.5 V REGULATOR OUTPUT Input Voltage Output Voltage (Note 3) 1.8 V 2.5 V 2.75 V 2.8 V 3.0 V 3.3 V Vin = (Vout +0.5 V) to 5.5 V Iout = 1 mA Vout 1.764 2.450 2.695 2.744 2.940 3.234 (−2%) − − − − − − 1.836 2.550 2.805 2.856 3.060 3.366 (+2%) V Output Voltage (Note 3) 1.8 V 2.5 V 2.75 V 2.8 V 3.0 V 3.3 V Vin = (Vout +0.5 V) to 5.5 V Iout = 1 mA to 200 mA Vout 1.746 2.425 2.6675 2.716 2.910 3.201 (−3%) − − − − − − 1.854 2.575 2.8325 2.884 3.090 3.399 (+3%) V − − − 80 80 65 − − − Power Supply Ripple Rejection Vin = Vout +1.0 V + 0.5 Vp−p Iout = 1 mA to 150 mA f = 120 Hz Cnoise = 100nF f = 1 kHz f = 10 kHz PSRR Line Regulation Vin = (Vout +0.5 V) to 5.5 V, Iout = 1 mA Regline −0.2 − 0.2 Load Regulation Iout = 1 mA to 200 mA Regload − 12 25 Output Noise Voltage f = 10 Hz to 100 kHz Iout = 1 mA to 150 mA Cnoise = 100 nF Cnoise = 10 nF Vn Vout = Vout(nom) – 0.1 V Output Current Limit Output Short Circuit Current dB %/V mV mVrms − − 15 20 − − ILIM 200 310 470 mA Vout = 0 V ISC 210 320 490 mA Dropout Voltage (Note 4, 5) 2.5 V 2.75 V 2.8 V 3.0 V 3.3 V Iout = 150 mA VDO − − − − − 105 105 105 100 100 155 155 155 150 150 mV Dropout Voltage (Note 6) 2.5 V 2.75 V 2.8 V 3.0 V 3.3 V Iout = 200 mA VDO − − − − − 170 150 150 140 130 215 205 205 200 200 mV Ground Current Iout = 1 mA Iout = 200 mA IGND − − 70 110 90 220 mA Disable Current VCE = 0 V GENERAL IDIS − 0.1 1 mA Thermal Shutdown Threshold (Note 4) TSD − 150 − °C Thermal Shutdown Hysteresis (Note 4) TSH − 20 − °C Vth(CE) − 1.2 − − 0.4 − V RPD(CE) 2.5 5 10 MW CHIP ENABLE Input Threshold Low High Internal Pull−Down Resistance (Note 7) http://onsemi.com 3 NCV8570 ELECTRICAL CHARACTERISTICS (Vin = Vout + 0.5 V, VCE = 1.2 V, Cin = 0.1 mF, Cout = 1 mF, Cnoise = 10 nF, TA = −40°C to 85°C, unless otherwise specified (Note 2)) Characteristic Test Conditions Symbol Min Typ Max Unit Cnoise = 10 nF Cnoise = 100 nF ton − − 0.4 4 − − ms Iout = 1 mA Iout = 10 mA toff − − 800 200 − − ms TIMING Turn−on Time Iout = 150 mA Turn−off Time Cnoise = 10 nF/100 nF 2. Performance guaranteed over the indicated operating temperature range by design and/or characterization, production tested at TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 3. Contact factory for other voltage options. 4. Guaranteed by design and characterization. 5. Characterized when output voltage falls 100 mV below the regulated voltage at Vin = Vout + 1 V if Vout < 2.5 V, then VDO = Vin − Vout at Vin = 2.5 V. 6. Measured when output voltage falls 100 mV below the regulated voltage at Vin = Vout + 0.5 V if Vout < 2.5 V, then VDO = Vin − Vout at Vin = 2.5 V. 7. Expected to disable device when CE pin is floating. http://onsemi.com 4 NCV8570 TYPICAL CHARACTERISTICS 2.520 1.815 Vout, OUTPUT VOLTAGE (V) Vout = 1.8 V 1.810 1.805 Iout = 1 mA 1.800 Iout = 150 mA 1.795 1.790 1.785 1.780 −40 −20 0 20 40 60 80 Vout, OUTPUT VOLTAGE (V) 1.820 100 2.505 Iout = 1 mA 2.500 Iout = 150 mA 2.495 2.490 2.485 2.480 −40 −20 0 20 40 60 80 Figure 3. Output Voltage vs. Temperature (Vout = 1.8 V) Figure 4. Output Voltage vs. Temperature (Vout = 2.5 V) 100 2.820 Vout = 2.75 V Vout, OUTPUT VOLTAGE (V) Vout, OUTPUT VOLTAGE (V) 2.510 TA, AMBIENT TEMPERATURE (°C) 2.750 2.745 Iout = 1 mA 2.740 Iout = 150 mA 2.735 2.730 2.725 2.720 −40 −20 0 20 40 60 80 100 2.815 Vout = 2.8 V 2.810 2.805 Iout = 1 mA 2.800 Iout = 150 mA 2.795 2.790 2.785 2.780 −40 −20 0 20 40 60 80 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 5. Output Voltage vs. Temperature (Vout = 2.75 V) Figure 6. Output Voltage vs. Temperature (Vout = 2.8 V) 100 3.320 3.020 3.010 3.005 Iout = 1 mA 3.000 Iout = 150 mA 2.995 2.990 2.985 2.980 −40 −20 0 20 40 60 80 Vout, OUTPUT VOLTAGE (V) Vout = 3.0 V Vout, OUTPUT VOLTAGE (V) 3.015 Vout = 2.5 V TA, AMBIENT TEMPERATURE (°C) 2.760 2.755 2.515 3.315 Vout = 3.3 V 3.310 3.305 Iout = 150 mA 3.295 3.290 3.285 3.280 −40 100 Iout = 1 mA 3.300 −20 0 20 40 60 80 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 7. Output Voltage vs. Temperature (Vout = 3.0 V) Figure 8. Output Voltage vs. Temperature (Vout = 3.3 V) http://onsemi.com 5 100 NCV8570 TYPICAL CHARACTERISTICS 140 3.5 IGND, GROUND CURRENT (mA) Vout, OUTPUT VOLTAGE (V) 4.0 3.3 V 3.0 V 2.8 V 2.5 V 3.0 2.5 2.0 1.8 V 1.5 1.0 TA = 25°C Iout = 1 mA 0.5 0.0 0.0 1.0 2.0 3.0 4.0 5.0 90 80 Iout = 1 mA 70 60 50 −20 0 20 40 60 80 TA, AMBIENT TEMPERATURE (°C) Figure 9. Output Voltage vs. Input Voltage Figure 10. Ground Current vs. Temperature 100 135 180 Vout = 3.3 V Vout = 2.8 V 160 Vout = 3.0 V Vout = 2.5 V 140 VDO, DROPOUT VOLTAGE (mV) IGND, GROUND CURRENT (mA) 100 Vin, INPUT VOLTAGE (V) TA = 25°C Iout = 150 mA 120 100 Vout = 1.8 V 80 Iout = 1 mA 60 40 20 0 0.0 1.0 2.0 3.0 4.0 5.0 130 Vout = 2.5 V 125 120 TA = 85°C 115 110 105 TA = 25°C 100 95 TA = −40°C 90 85 0 6.0 25 50 75 100 125 150 Vin, INPUT VOLTAGE (V) Iout, OUTPUT CURRENT (mA) Figure 11. Ground Current vs. Input Voltage Figure 12. Dropout Voltage vs. Output Current 125 125 Vout = 2.8 V 120 TA = 85°C VDO, DROPOUT VOLTAGE (mV) VDO, DROPOUT VOLTAGE (mV) Iout = 150 mA 110 40 −40 6.0 200 115 110 TA = 25°C 105 100 95 TA = −40°C 90 85 80 75 130 120 0 25 50 75 100 125 150 120 Vout = 3.0 V TA = 85°C 115 110 105 TA = 25°C 100 95 TA = −40°C 90 85 80 75 0 25 50 75 100 125 150 Iout, OUTPUT CURRENT (mA) Iout, OUTPUT CURRENT (mA) Figure 13. Dropout Voltage vs. Output Current Figure 14. Dropout Voltage vs. Output Current http://onsemi.com 6 NCV8570 TYPICAL CHARACTERISTICS VDO, DROPOUT VOLTAGE (mV) 125 Vout = 3.3 V 120 TA = 85°C 115 110 105 TA = 25°C 100 95 TA = −40°C 90 85 80 75 0 25 50 75 100 125 150 Iout, OUTPUT CURRENT (mA) ISC, SHORT CIRCUIT CURRENT LIMIT (mA) Figure 15. Dropout Voltage vs. Output Current ILIM, CURRENT LIMIT (mA) 340 330 320 310 300 290 280 −40 −20 0 20 40 60 80 100 320 310 300 290 −40 −20 0 20 40 60 80 Figure 16. Current Limit vs. Temperature Figure 17. Short Circuit Current vs. Temperature 100 700 −30 Vn, NOISE DENSITY (nV/√Hz) TA = 25°C Vout = 1.8 V Iout = 150 mA −20 PSRR (dB) 330 TA, AMBIENT TEMPERATURE (°C) 0 −40 −50 −60 Cnoise = 10 nF −80 −90 −100 340 TA, AMBIENT TEMPERATURE (°C) −10 −70 350 Cnoise = 100 nF 10 100 1,000 10,000 100,000 TA = 25°C Vout = 1.8 V Iout = 150 mA Cnoise = 100 nF 600 500 400 300 200 100 0 10 100 1,000 10,000 100,000 f, FREQUENCY (Hz) FREQUENCY (Hz) Figure 18. PSRR vs. Frequency Figure 19. Noise Density vs. Frequency http://onsemi.com 7 NCV8570 TYPICAL CHARACTERISTICS 4.2 V VCE 1 V/div 3.6 V Vin 500 mV/div TA = 25°C Vout = 1.8 V Iout = 150 mA Cout = 1 mF TA = 25°C Vout 1 V/div Vin = 4 V Iout = 150 mA Cnoise = 0 nF Vout 10 mV/div TIME (20 ms/div) TIME (100 ms/div) Figure 20. Enable Voltage and Output Voltage vs. Time (Start−Up) Figure 21. Line Transient Iout 100 mA/div Vout 50 mV/div Vin = 2.8 V Vout = 1.8 V Cout = 1 mF ESR of OUTPUT CAPACITOR (W) 10 TA = 25°C Unstable Region Vout = 3.0 V 1 Vout = 1.8 V Stable Region 0.1 0.01 Cout = 1 mF to 10 mF 0 25 50 75 100 125 TIME (40 ms/div) Iout, OUTPUT CURRENT (mA) Figure 22. Load Transient Figure 23. Output Capacitor ESR vs. Output Current http://onsemi.com 8 150 NCV8570 APPLICATION INFORMATION General Output Noise The NCV8570 is a 200 mA (current limited) linear regulator with a logic input for on/off control for the high speed turn−off output voltage. Access to the major contributor of noise within the integrated circuit is provided as the focus for noise reduction within the linear regulator system. The main contributor for noise present on the output pin Vout is the reference voltage node. This is because any noise which is generated at this node will be subsequently amplified through the error amplifier and the PMOS pass device. Access to the reference voltage node is supplied directly through the Cnoise pin. Noise can be reduced from a typical value of 20 mVrms by using 10 nF to 15 mVrms by using a 100 nF from the Cnoise pin to ground. A bypass capacitor is recommended for good noise performance and better load transient response. Power Up/Down During power up, the NCV8570 maintains a high impedance output (Vout) until sufficient voltage is present on Vin to power the internal bandgap reference voltage. When sufficient voltage is supplied (approx 1.2 V), Vout will start to turn on (assume CE shorted to Vin), linearly increasing until the output regulation voltage has been reached. Active discharge circuitry has been implemented to insure a fast turn off time. Then CE goes low, the active discharge transistor turns on creating a fast discharge of the output voltage. Power to drive this circuitry is drawn from the output node. This is to maintain the lowest quiescent current when in the sleep mode (VCE = 0.4 V). This circuitry subsequently turns off when the output voltage discharges. Thermal Shutdown When the die temperature exceeds the Thermal Shutdown threshold, a Thermal Shutdown (TSD) event is detected and the output (Vout) is turned off. There is no effect from the active discharge circuitry. The IC will remain in this state until the die temperature moves below the shutdown threshold (150°C typical) minus the hysteresis factor (20°C typical). This feature provides protection from a catastrophic device failure due to accidental overheating. It is not intended to be used as a substitute for proper heat sinking. The maximum device power dissipation can be calculated by: CE (chip enable) The enable function is controller by the logic pin CE. The voltage threshold of this pin is set between 0.4 V and 1.2 V. A voltage lower than 0.4 V guarantees the device is off. A voltage higher than 1.2 V guarantees the device is on. The NCV8570 enters a sleep mode when in the off state drawing less than 1 mA of quiescent current. The device can be used as a simple regulator without use of the chip enable feature by tying the CE pin to the Vin pin. PD + TJ * TA R qJA Thermal resistance value versus copper area and package is shown in Figure 24. RqJA, THERMAL RESISTANCE JUNCTION−TO−AMBIENT (°C/W) 380 Current Limit Output Current is internally limited within the IC to a minimum of 200 mA. The design is set to a higher value to allow for variation in processing and the temperature coefficient of the parameter. The NCV8570 will source this amount of current measured with a voltage 100 mV lower than the typical operating output voltage. The specification for short circuit current limit (@ Vout = 0 V) is specified at 320 mA (typ). There is no additional circuitry to lower the current limit at low output voltages. This number is provided for informational purposes only. 330 280 TSOP−5 (1 oz) 230 TSOP−5 (2 oz) 180 DFN6 2x2.2 (1 oz) 130 80 Output Capacitor DFN6 2x2.2 (2 oz) 0 100 200 300 400 PCB COPPER AREA The NCV8570 has been designed to work with low ESR ceramic capacitors. There is no ESR lower limit for stability for the recommended 1 mF output capacitor. Stable region for Output capacitor ESR vs Output Current is shown in Figure 23. Typical characteristics were measured with Murata ceramic capacitors. GRM219R71E105K (1 mF, 25 V, X7R, 0805) and GRM21BR71A106K (10 mF, 10 V, X7R, 0805). 500 (mm2) Figure 24. RqJA vs. PCB Copper Area (TSOP−5 for comparison only) http://onsemi.com 9 600 700 NCV8570 ORDERING INFORMATION Nominal Output Voltage Marking 1.8 V MT NCV8570MN250R2G 2.5 V MU NCV8570MN275R2G 2.75 V MV NCV8570MN280R2G 2.8 V MW NCV8570MN300R2G 3.0 V MX NCV8570MN330R2G 3.3 V MY NCV8570SN18T1G 1.8 V ACV NCV8570SN25T1G 2.5 V ACW NCV8570SN275T1G 2.75 V ACX NCV8570SN28T1G 2.8 V ACY NCV8570SN30T1G 3.0 V ACZ NCV8570SN33T1G 3.3 V AC2 Device NCV8570MN180R2G Package Shipping† DFN6 2x2.2 (Pb−Free) 3000 / Tape & Reel TSOP−5 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 10 NCV8570 PACKAGE DIMENSIONS TSOP−5 CASE 483−02 ISSUE H D 5X NOTE 5 2X 0.10 T 2X 0.20 T NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. 0.20 C A B M 5 1 4 2 L 3 B S K DETAIL Z G A DIM A B C D G H J K L M S DETAIL Z J C 0.05 SEATING PLANE H T SOLDERING FOOTPRINT* 0.95 0.037 MILLIMETERS MIN MAX 3.00 BSC 1.50 BSC 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 11 NCV8570 PACKAGE DIMENSIONS 6 PIN DFN, 2x2.2, 0.65P CASE 506BA−01 ISSUE A A B D L NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. L L1 ÉÉÉ ÉÉÉ PIN ONE REFERENCE 2X 0.10 C DETAIL A E ALTERNATE TERMINAL CONSTRUCTIONS TOP VIEW ÉÉ ÉÉ EXPOSED Cu 2X 0.10 C A 0.10 C A3 MOLD CMPD A1 DETAIL B DETAIL B ÉÉ ÇÇ ÇÇ ALTERNATE CONSTRUCTIONS 7X 0.08 C C SEATING PLANE 6X L1 1.36 PACKAGE OUTLINE 6X 0.58 D2 DETAIL A L MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 0.30 2.00 BSC 1.10 1.30 2.20 BSC 0.70 0.90 0.65 BSC 0.20 −−− 0.25 0.35 0.00 0.10 SOLDERING FOOTPRINT* SIDE VIEW A1 6X DIM A A1 b D D2 E E2 e K L L1 e 3 1 2.50 0.96 E2 1 K 6 4 6X 6X b BOTTOM VIEW 0.35 0.10 C A B 0.05 C 0.65 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NOTE 3 The products described herein (NCV8570), may be covered by one or more U.S. patents. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 12 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCV8570/D