AN011 A novel, cost-effective technique for converting VRM8.X VID to VRM9.0 compatible VID Abstract Since AIC1569A has been designed to meet the VID Configuration Pentium II Processor, the equipped voltage level VID pins are used to set the voltage reference for CPU range is from 3.5V to 1.3V. As the trend of new core voltage. This is accomplished by a build-in generation CPU core voltage decreasing goes on, the Digital-to-Analog converter in AIC1569A. There are 5 only and also major problem of VID setting is the VID pins named from VID0 to VID4 comprising 32 mismatch with (the VID setting can’t meet) the selections of voltage level. On the other hand, VID requirement of the (these) new processors. However, definition of Socket A CPU (AMD ThunderBird) also is (Somehow,) this problem can be solved by adding a configured with 5 pins, named VIDx (x=0~4), to define simple circuit externally. Due to the overlap voltage the voltage range from 1.85V to 1.1V. The following range between Socket A CPU and that provided by table shows both the AIC1569A and ThunderBird CPU AIC1569A, this method provides a cost-effective voltage levels versus VID setting. solution for Socket A CPU. VID[3:0] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Socket A 1.850 1.825 1.800 1.775 1.750 1.725 1.700 1.675 1.650 1.625 1.600 1.575 1.550 1.525 1.500 1.475 VCORE (VID4=0) AIC1569A 2.05 2.00 1.95 1.90 1.85 1.80 1.75 1.70 1.65 1.60 1.55 1.50 1.45 1.40 1.35 1.30 keep 2.050 2.000 1.950 1.900 1.850 1.800 1.750 1.700 1.650 1.600 1.550 1.500 1.450 1.400 1.350 1.300 VCORE (VID4=1) Socket A AIC1569A redefine 1.450 3.5 2.075 1.425 3.4 2.025 1.400 3.3 1.975 1.375 3.2 1.925 1.350 3.1 1.875 1.325 3.0 1.825 1.300 2.9 1.775 1.275 2.8 1.725 1.250 2.7 1.675 1.225 2.6 1.625 1.200 2.5 1.575 1.175 2.4 1.525 1.150 2.3 1.475 1.125 2.2 1.425 1.100 2.1 1.375 No CPU 0V 1.325 By comparing the voltage values in the table, 2 First, voltage range of AIC1569A can not cover the problems are found in the VID mismatch condition. range of Socket A CPU, as mentioned above. Second, July 2000 1 AN011 for Socket A CPU, the voltage step is 25mV within all Circuit Modification range. However, in AIC1569A, voltage step is 100mV How do we apply this redefined VID voltage to within the range from 3.5V to 2.1V and 50mV from practical circuit? The principle is quite simple. Since 2.1V to 1.3V. You may have noticed that, the difference the VID4 pin of AIC1569A is no longer used, it is between 100mV step and 50mV step can be connected to ground to keep the reference voltage in categorized by the VID4 value. Besides, the range of the range from 2.05V to 1.3V. The “plus 25mV” 3.5V~2.1V is not used for Socket A CPU. Thus we can function is controlled by the other on/off pin, named redefine the VID4 pin as a “plus 25mV” function, used VID5. The status of VID5 controls an NPN transistor to within the range of 2.1V to 1.3V. The gray area in the enable a resistor that connects between VFB and above table is the redefined VID voltage level. GND to modify the feedback voltage. Two circuits are shown in the following figure to convey this idea. AIC1569A VID[0:3] D/A VID4 EA COMP Z1 VFB R2 3K Vcore R1 200K Vcc VID5 Qs 2N2222 R3 1K Worst Choice Suggested Circuit Second Choice In the above figure, “Suggested Circuit” is a little voltage. VID5, Grounding of R1 depends on the complicated but much more reliable than the “Second control circuit which is comprised of R3 and Qs. As Choice”. R2 is the original resistor used with Z1 to VID5 open, Qs is turned off. R1 would not consume accomplish the compensation network. Adding an R1 any current, voltage on VFB equal to Vcore. And when resistor effectively divides the feedback voltage. This VID5 closed, Qs is turned on. Voltage on VFB is then also causes the compensator to increase the output no longer Vcore, it gets a smaller Vcore than actual 2 AN011 output voltage. The “Worst Choice” is applied by the same principle as the “Suggested Circuit”, but may induce much more R1 1.7 = R1 + R2 1.7 + 0.025 ⇒ R1 = 1.7 × (3K/0.025) = 204KO noise and interference while VID5 is open. Thus, R2 is chosen to be 200KO, as we saw in the The “Second Choice may be the best choice while above schematics. On the other hand, voltage offset considering the trade off between cost and noise under different VID set can also be calculated. The problem. The advantage of this circuit eliminate the following table shows the calculated value and point may induce noise while converter operating. One measured value of the new VID modification circuit. consideration may be its disadvantage is the switch is not suggested to change while converter operation, the reason is noise may be introduce during the time changing the switch position. With this point of view, change switch position of “Suggested Circuit” can be proceed any time, no matter the converter is operating or not. Control Circuit Design and Verification The principle now is very clear, using VID5 to enable the divide circuit. The divided voltage can be calculated by the following equation: VFB = R1 × VCORE R1 + R2 By the linear equation shown above, the relation between VFB and Vcore is proportional, not offset. This means we have to choose a proper value of divide resistor (R1) to match the 25mV offset at different reference voltage as possible as we can. Usually, the R2 value is a parameter decided in compensator design. This simplifies the design of divider. Let’s assume R2 is designed to be 3KO, then a mid point is chosen in the VID voltage range. For example, the mid point is 1.7V, and the value of R1 can be calculated as follows. 3 AN011 VID[3:0] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Defined Voltage (V) Measured Voltage (V) Deviation (mV) Voltage Rise (mV) VID5 OFF VID5 ON VID5 OFF VID5 ON VID5 OFF VID5 ON Calculated Measured 2.050 2.000 1.950 1.900 1.850 1.800 1.750 1.700 1.650 1.600 1.550 1.500 1.450 1.400 1.350 1.300 2.075 2.025 1.975 1.925 1.875 1.825 1.775 1.725 1.675 1.625 1.575 1.525 1.475 1.425 1.375 1.325 2.052 2.000 1.952 1.900 1.852 1.800 1.752 1.702 1.652 1.600 1.552 1.501 1.452 1.400 1.352 1.300 2.083 2.031 1.981 1.929 1.880 1.827 1.778 1.727 1.677 1.624 1.575 1.523 1.474 1.421 1.372 1.320 2 0 2 0 2 0 2 2 2 0 2 1 2 0 2 0 8 6 6 4 5 2 3 2 2 -1 0 -2 -1 -4 -3 -5 30 30 29 28 27 27 26 25 24 24 23 22 21 21 20 19 33 31 29 29 30 27 28 27 27 24 25 23 24 21 22 20 The above table contains the designed and measured Conclusion data that is tested at no load condition. First column is From the test result, some conclusions are made: the set of VID pins (Note VID4 is always connected to 1. The redefined VID table can be categorized into 2 ground as shown in above schematics). The second parts, the original part of VID4=0, voltage level and third columns are the redefined voltage levels. range is from 2.05V to 1.3V in 50mV step. The The column with “VID5 on” is always 25mV higher other part is an extension from the first part with than the column with “VID5 off”. The fourth and fifth additional 25mV, which is controlled by a new columns are the authentic data measured with VID5 VID5 bit. Hence, the total provided voltage range off and on, respectively. The sixth and seventh is from 2.075V to 1.3V in 25mV step (32 voltage columns show the calculated data of deviation voltage level totally). between setting and measured voltage. Obviously the 2. The extended VID setting can provide the same voltage variation with VID5 on turns more dramatic voltage step as the needs of the Socket A CPU, than off, especially at the larger and smaller voltage which setting. The last 2 columns are the data from the implementation the voltage step is not so accurate. circuit’s point of view to see the differences between The highest voltage defined in Socket A CPU is the R2 design and implementation. And the result 1.85V. That means there are 9 voltage levels turns out to be almost the same. (from 2.075V to 1.875V), that are not used. On the is 25mV. However, during the other hand, this derived VID setting can only provide the voltage of 1.3V. In other words, the 4 AN011 range of 8 voltage levels from 1.275V to 1.1V is original design when the VID5 is open. Please not provided to the Socket A CPU. note that lots of care should be taken when 3. Thus, the valid range provided by the redefined implementing this application. Cost difference VID table is 1.85V to 1.3V, 23 voltage levels totally. between “Second Choice” and “Worst Choice” is Besides, the “No CPU” defined in Socket A CPU is only a pin. also not provided. 4. The typical Vcore voltage for Socket A CPU is As the new generation CPU’s performance 1.7V. Therefore, this new derived VID can meet progressing rapidly, the requirement of power supply the requirement with no doubt. For the sleeping specification also challenges the power electronics mode, typically Vcore voltage is 1.3V, also can be technology. Although Multi-Phase converter can meet provided, but with less flexibility. the power requirement for CPU of the next few 5. The voltage level with VID5=1, that is, adding generations, High cost and complex technology is the 25mV, had worse voltage deviation than VID5=0, price that has to pay at this moment. yet still acceptable. The worst case is about 8mV This article introduces a cost effectively solution for higher at 2.075V and 5mV lower at 1.325V. These those users who are not ready to go for the values may vary according to case design. Multi-Phase technology, but have involved with 6. Actually, for more cost-effective method, this products of K7 Socket A CPU. By adding a simple circuit can simply be further simplified by using R1 circuit (2 resistor, 1 NPN transistor), the old design can and VID5 as the “Second Choice” and “Worse then meet the VID requirement of Socket A CPU. It’s Choice” shown above. This can also achieve the simple, easy and cost-effective. same result but may induce much more noise than 5