ETL MC74VHC1GT86 2-input exclusive or gate / cmos logic level shifter with lsttl-compatible input Datasheet

2-Input Exclusive OR Gate / CMOS Logic Level Shifter
with LSTTL–Compatible Inputs
MC74VHC1GT86
The MC74VHC1GT86 is an advanced high speed CMOS 2–input Exclusive OR gate fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.
The device input is compatible with TTL–type input thresholds and the output has a full 5 V CMOS level output swing. The input
protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic–level translator from
3.0 V CMOS logic to 5.0V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high–voltage power supply.
The MC74VHC1GT86 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1GT86 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when
V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch,
battery backup, hot insertion, etc.
• High Speed: t PD = 4.8 ns (Typ) at V CC = 5 V
• Power Down Protection Provided on Inputs and Outputs
• Low Power Dissipation: I CC = 2 mA (Max) at T A = 25°C
• Balanced Propagation Delays
• TTL–Compatible Inputs: V IL = 0.8 V; V IH = 2.0 V
• Pin and Function Compatible with Other Standard Logic Families
• CMOS–Compatible Outputs: V OH > 0.8 V CC ;
• Chip Complexity: FETs = 83; Equivalent Gates = 16
V OL < 0.1 V CC @Load
MARKING DIAGRAMS
5
4
1
2
VMd
3
SC–70/SC–88A/SOT–353
DF SUFFIX
CASE 419A
Pin 1
d = Date Code
5
Figure 1. Pinout (Top View)
4
VMd
1
2
3
SOT–23/TSOP–5/SC–59
DT SUFFIX
CASE 483
Figure 2. Logic Symbol
Pin 1
d = Date Code
FUNCTION TABLE
Inputs
PIN ASSIGNMENT
1
2
3
4
5
IN B
IN A
GND
OUT Y
V CC
A
L
L
H
H
B
L
H
L
H
Output
Y
L
H
H
L
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 4 of this data sheet.
VHT86–1/4
MC74VHC1GT86
MAXIMUM RATINGS
Parameter
Value
Unit
– 0.5 to + 7.0
V
– 0.5 to +7.0
V
V CC=0
– 0.5 to +7.0
V
High or Low State
–0.5 to V cc + 0.5
I IK
Input Diode Current
–20
mA
I OK
Output Diode Current
V OUT < GND; V OUT > V CC
+20
mA
I OUT
DC Output Current, per Pin
+ 25
mA
I CC
DC Supply Current, V CC and GND
+50
mA
PD
Power dissipation in still air
SC–88A, TSOP–5
200
mW
θ JA
Thermal resistance
SC–88A, TSOP–5
333
°C/W
TL
Lead Temperature, 1 mm from Case for 10 s
260
°C
TJ
Junction Temperature Under Bias
+ 150
°C
T stg
Storage temperature
–65 to +150
°C
V ESD
ESD Withstand Voltage
Human Body Model (Note 2)
>2000
V
Machine Model (Note 3)
> 200
Charged Device Model (Note 4)
N/A
I LATCH–UP
Latch–Up Performance Above V CC and Below GND at 125°C (Note 5)
± 500
mA
1. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
eyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not
implied. Functional operation should be restricted to the Recommended Operating Conditions.
2. Derating – SC–88A Package: –3 mW/°C from 65°C to 125°C
– TSOP5 Package: –6 mW/°C from 65°C to 125°C
3. Tested to EIA/JESD22–A114–A
4. Tested to EIA/JESD22–A115–A
5. Tested to JESD22–C101–A
6. Tested to EIA/JESD78
DC Supply Voltage
DC Input Voltage
DC Output Voltage
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
V CC
DC Supply Voltage
V IN
DC Input Voltage
V OUT
DC Output Voltage
TA
Operating Temperature Range
t r ,t f
Input Rise and Fall Time
V CC = 3.3 ± 0.3 V
V CC = 5.0 ± 0.5 V
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Temperature °C
80
90
100
110
120
130
140
Time,
Hours
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
Time,
Years
117.8
47.9
20.4
9.4
4.2
2.0
1.0
NORMALIZED FAILURE RATE
Symbol
V CC
V IN
V OUT
Min
3.0
0.0
0.0
– 55
0
0
Max
5.5
5.5
V CC
+ 125
100
20
Unit
V
V
V
°C
ns/V
1
1
10
100
1000
TIME, YEARS
Figure 3. Failure Rate vs. Time Junction Temperature
VHT86–2/4
MC74VHC1GT86
DC ELECTRICAL CHARACTERISTICS
Symbol
V IH
V IL
V OH
Parameter
Test Conditions
Minimum High–Level
Input Voltage
T A = 25°C
T A < 85°C –55°C<TA<125°C
Min Typ Max Min Max Min Max Unit
3.0
1.4
1.4
1.4
4.5
5.5
2.0
2.0
2.0
2.0
2.0
2.0
V
Maximum Low–Level
Input Voltage
Minimum High–Level
Output Voltage
V CC
(V)
V
V IN = V IH or V IL
I OH = – 50 µA
3.0
0.53
0.53
0.53
4.5
5.5
0.8
0.8
0.8
0.8
0.8
0.8
V
3.0
2.9
3.0
2.9
2.9
4.5
4.4
4.5
4.4
4.4
I OH = –4 mA
I OH = –8 mA
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
V IN = V IH or V IL
I OL = 50 µA
3.0
0.0
0.1
0.1
0.1
4.5
0.0
0.1
0.1
0.1
0.36
0.36
0.44
0.44
0.52
0.52
V IN = V IH or V IL
V IN = V IH or V IL
V OL
Maximum Low–Level
Output Voltage
V IN = V IH or V IL
V
V IN = V IH or V IL
I OL = 4 mA
I OL = 8 mA
3.0
4.5
I IN
Maximum Input
Leakage Current
V IN = 5.5 V or GND 0 to5.5
±0.1
±1.0
±1.0
µA
I CC
Maximum Quiescent
Supply Current
V IN = V CC or GND
5.5
2.0
20
40
µA
I CCT
Quiescent Supply
Current
Input: V IN = 3.4 V
5.5
1.35
1.50
1.65
mA
I OPD
Output Leakage
Current
V OUT = 5.5 V
0.0
0.5
5.0
10
µA
AC ELECTRICAL CHARACTERISTICS C load = 50 pF, Input t r = t f = 3.0 ns
Symbol
t PLH ,
t PHL
Parameter
Maximum
Propagation Delay,
Test Conditions
Min
T A < 85°C –55°C<TA<125°C
T A = 25°C
Typ
Max Min Max Min Max Unit
V CC = 3.3± 0.3 V C L = 15 pF
C L = 50 pF
5.0
6.2
V CC = 5.0± 0.5 V C L = 15 pF
3.1
C L = 50 pF
4.2
5.5
11.0
14.5
13.0
16.5
15.5
19.5
6.8
8.0
10.0
8.8
10
10.0
10
12.0
10
ns
Input A or B to Y
C IN
Maximum Input
pF
Capacitance
Typical @ 25°C, V CC = 5.0 V
C PD
Power Dissipation Capacitance (Note 6)
11
pF
7. C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without
load. Average operating current can be obtained by the equation: I CC(OPR) = C PD • V CC • f in + I CC . C PD is used to determine the no–
load dynamic power consumption; P D = C PD • V CC 2 • f in + I CC • V CC .
VHT86–3/4
MC74VHC1GT86
3.0V
*Includes all probe and jig capacitance
Figure 4. Switching Waveforms
Figure 5. Test Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature
Device
Order Number
Temp
Circuit
Range Technology Device
Indicator
Function
Identifier
Package
Suffix
Tape &
Reel
Suffix
MC74VHC1GT86DFT1 MC
74
VHC1G
T86
DF
T1
MC74VHC1GT86DFT2 MC
74
VHC1G
T86
DF
T2
MC74VHC1GT86DFT4 MC
74
VHC1G
T86
DF
T4
MC74VHC1GT86DTT1 MC
74
VHC1G
T86
DT
T1
MC74VHC1GT86DTT3 MC
74
VHC1G
T86
DT
T3
Package Type
SC–70/SC–88A/
SOT–353
SC–70/SC–88A/
SOT–353
SC–70/SC–88A/
SOT–353
SOT–23/TSOPS/
SC–59
SOT–23/TSOPS/
SC–59
Tape and
Reel Size
178 mm (7 in)
3000 Unit
178 mm (7 in)
3000 Unit
330 mm (13 in)
10,000 Unit
178 mm (7 in)
3000 Unit
330 mm (13 in)
10,000 Unit
VHT86–4/4
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