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by MRF175LU/D
SEMICONDUCTOR TECHNICAL DATA
The RF MOSFET Line
N–Channel Enhancement–Mode
Designed for broadband commercial and military applications using single
ended circuits at frequencies to 400 MHz. The high power, high gain and
broadband performance of each device makes possible solid state transmitters
for FM broadcast or TV channel frequency bands.
• Guaranteed Performance
MRF175LU @ 28 V, 400 MHz (“U” Suffix)
Output Power — 100 Watts
Power Gain — 10 dB Typ
Efficiency — 55% Typ
MRF175LV @ 28 V, 225 MHz (“V” Suffix)
Output Power — 100 Watts
Power Gain — 14 dB Typ
Efficiency — 65% Typ
100 W, 28 V, 400 MHz
N–CHANNEL
BROADBAND
RF POWER FETs
• 100% Ruggedness Tested At Rated Output Power
• Low Thermal Resistance
• Low Crss — 20 pF Typ @ VDS = 28 V
&
CASE 333–04, STYLE 2
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Drain–Source Voltage
VDSS
65
Vdc
Gate–Source Voltage
VGS
±40
Vdc
Drain Current — Continuous
ID
13
Adc
Total Device Dissipation @ TC = 25°C
Derate above 25°C
PD
270
1.54
Watts
W/°C
Storage Temperature Range
Tstg
–65 to +150
°C
Operating Junction Temperature
TJ
200
°C
Symbol
Max
Unit
RθJC
0.65
°C/W
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction to Case
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
V(BR)DSS
65
—
—
Vdc
Zero Gate Voltage Drain Current
(VDS = 28 V, VGS = 0)
IDSS
—
—
2.5
mAdc
Gate–Body Leakage Current
(VGS = 20 V, VDS = 0)
IGSS
—
—
1.0
µAdc
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0, ID = 50 mA)
(continued)
Handling and Packaging — MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
REV 8
RF DEVICE DATA
MOTOROLA
Motorola, Inc. 1997
MRF175LU MRF175LV
1
ELECTRICAL CHARACTERISTICS — continued (TC = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Gate Threshold Voltage (VDS = 10 V, ID = 100 mA)
VGS(th)
1.0
3.0
6.0
Vdc
Drain–Source On–Voltage (VGS = 10 V, ID = 5.0 A)
VDS(on)
0.1
0.9
1.5
Vdc
Forward Transconductance (VDS = 10 V, ID = 2.5 A)
gfs
2.0
3.0
—
mhos
Input Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz)
Ciss
—
180
—
pF
Output Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz)
Coss
—
200
—
pF
Reverse Transfer Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz)
Crss
—
20
—
pF
Common Source Power Gain
(VDD = 28 Vdc, Pout = 100 W, f = 225 MHz, IDQ = 100 mA)
Gps
12
14
—
dB
Drain Efficiency
(VDD = 28 Vdc, Pout = 100 W, f = 225 MHz, IDQ = 100 mA)
η
55
65
—
%
Electrical Ruggedness
(VDD = 28 Vdc, Pout = 100 W, f = 225 MHz, IDQ = 100 mA,
VSWR 30:1 at all Phase Angles)
ψ
ON CHARACTERISTICS
DYNAMIC CHARACTERISTICS
FUNCTIONAL CHARACTERISTICS — MRF175LV (Figure 1)
No Degradation in Output Power
FUNCTIONAL CHARACTERISTICS — MRF175LU (Figure 2)
Common Source Power Gain
(VDD = 28 Vdc, Pout = 100 W, f = 400 MHz, IDQ = 100 mA)
Gps
8.0
10
—
dB
Drain Efficiency
(VDD = 28 Vdc, Pout = 100 W, f = 400 MHz, IDQ = 100 mA)
η
50
55
—
%
Electrical Ruggedness
(VDD = 28 Vdc, Pout = 100 W, f = 400 MHz, IDQ = 100 mA,
VSWR 30:1 at all Phase Angles)
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No Degradation in Output Power
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C1, C2, C8 — Arco 463 or Equivalent
C3, C7 — 25 pF Unelco Cap
C4 — 1000 pF Chip Cap
C5 — 0.01 µF Chip Cap
C6 — 250 pF Unelco Cap
C9 — Arco 462 or Equivalent
C10 — 1000 pF ATC Chip Cap
C11 — 10 µF 100 V Electrolytic
L1 — Hairpin Inductor #18 Wire
L3 — Hairpin Inductor #16 Wire
″
″
″
L2 — Stripline Inductor 0.200″ x 0.500″
″
L4 — 2 Turns #16 Wire 5/16″ ID
RFC1 — VK200–4B
R1 — 1.0 k 1/4 W Resistor
R2 — 100 Ω Resistor
Figure 1. 225 MHz Test Circuit
MRF175LU MRF175LV
2
MOTOROLA RF DEVICE DATA
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R1 — 10 k 1/4 W Resistor
R2 — 1 k 1/4 W Resistor
R3 — 1.5 k 1/4 W Resistor
Z1 — Microstrip Line 0.950″ x 0.250″
Z2 — Microstrip Line 1″ x 0.250″
Z3 — Microstrip Line 0.550″ x 0.250″
L1 — Hairpin Inductor #18 Wire
C1, C8 — 270 pF ATC Chip Cap
C2, C4, C6, C7 — 1.0>–>20 pF Trimmer Cap
C3 — 15 pF Mini Unelco Cap
C5 — 33 pF Mini Unelco Cap
C9, C12 — 0.1 µF Ceramic Cap
C11, C14 — 680 pF Feed Thru Cap
C13 — 50 µF Tantalum Cap
″
″
L2 — 12 Turns #18 Wire 0.450″ ID
L3 — Ferroxcube VK200 20/4B
Board Material — 0.062″ Teflon —
fiberglass, εr = 2.56, 1 oz. copper
clad both sides
Figure 2. 400 MHz Test Circuit
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TYPICAL CHARACTERISTICS
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Figure 3. Common Source Unity Current Gain
Frequency versus Drain Current
Figure 4. DC Safe Operating Area
MOTOROLA RF DEVICE DATA
MRF175LU MRF175LV
3
TYPICAL CHARACTERISTICS
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Figure 5. Drain Current versus Gate Voltage
(Transfer Characteristics)
Figure 6. Gate–Source Voltage versus
Case Temperature
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Figure 7. Capacitance versus Drain–Source Voltage
MRF175LU MRF175LV
4
MOTOROLA RF DEVICE DATA
TYPICAL CHARACTERISTICS
MRF175LV
MRF175LU
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Figure 8. Output Power versus Supply Voltage
Figure 9. Output Power versus Supply Voltage
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Figure 10. Power Gain versus Frequency
MOTOROLA RF DEVICE DATA
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Figure 11. Output Power versus Input Power
MRF175LU MRF175LV
5
INPUT AND OUTPUT IMPEDANCE
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Figure 12.
RF POWER MOSFET CONSIDERATIONS
MOSFET CAPACITANCES
The physical structure of a MOSFET results in capacitors
between the terminals. The metal oxide gate structure determines the capacitors from gate–to–drain (Cgd), and gate–to–
source (Cgs). The PN junction formed during the fabrication
of the FET results in a junction capacitance from drain–to–
source (Cds).
These capacitances are characterized as input (Ciss), output (Coss) and reverse transfer (Crss) capacitances on data
sheets. The relationships between the inter–terminal capacitances and those given on data sheets are shown below. The
Ciss can be specified in two ways:
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and zero
volts at the gate. In the latter case the numbers are lower.
However, neither method represents the actual operating conditions in RF applications.
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LINEARITY AND GAIN CHARACTERISTICS
In addition to the typical IMD and power gain data presented, Figure 3 may give the designer additional information on
the capabilities of this device. The graph represents the
small signal unity current gain frequency at a given drain cur-
MRF175LU MRF175LV
6
rent level. This is equivalent to fT for bipolar transistors.
Since this test is performed at a fast sweep speed, heating of
the device does not occur. Thus, in normal use, the higher
temperatures may degrade these characteristics to some extent.
DRAIN CHARACTERISTICS
One figure of merit for a FET is its static resistance in the
full–on condition. This on–resistance, VDS(on), occurs in the
linear region of the output characteristic and is specified under specific test conditions for gate–source voltage and drain
current. For MOSFETs, VDS(on) has a positive temperature
coefficient and constitutes an important design consideration
at high temperatures, because it contributes to the power
dissipation within the device.
GATE CHARACTERISTICS
The gate of the FET is a polysilicon material, and is electrically isolated from the source by a layer of oxide. The input
resistance is very high — on the order of 109 ohms — resulting in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage
slightly in excess of the gate–to–source threshold voltage,
VGS(th).
Gate Voltage Rating — Never exceed the gate voltage
rating. Exceeding the rated VGS can result in permanent
damage to the oxide layer in the gate region.
Gate Termination — The gates of these devices are essentially capacitors. Circuits that leave the gate open–circuited or floating should be avoided. These conditions can
result in turn–on of the devices due to voltage build–up on
the input capacitor due to leakage currents or pickup.
MOTOROLA RF DEVICE DATA
Gate Protection — These devices do not have an internal
monolithic zener diode from gate–to–source. If gate protection is required, an external zener diode is recommended.
Using a resistor to keep the gate–to–source impedance
low also helps damp transients and serves another important
function. Voltage transients on the drain can be coupled to
the gate through the parasitic gate–drain capacitance. If the
gate–to–source impedance and the rate of voltage change
on the drain are both high, then the signal coupled to the gate
may be large enough to exceed the gate–threshold voltage
and turn the device on.
HANDLING CONSIDERATIONS
When shipping, the devices should be transported only in
antistatic bags or conductive foam. Upon removal from the
packaging, careful handling procedures should be adhered
to. Those handling the devices should wear grounding straps
and devices not in the antistatic packaging should be kept in
metal tote bins. MOSFETs should be handled by the case
and not by the leads, and when testing the device, all leads
should make good electrical contact before voltage is applied. As a final note, when placing the FET into the system it
is designed for, soldering should be done with a grounded
iron.
DESIGN CONSIDERATIONS
The MRF175L is a RF power N–channel enhancement
mode field–effect transistor (FETs) designed for HF, VHF and
UHF power amplifier applications. Motorola FETs feature a
vertical structure with a planar design.
MOTOROLA RF DEVICE DATA
Motorola Application Note AN211A, FETs in Theory and
Practice, is suggested reading for those not familiar with the
construction and characteristics of FETs.
The major advantages of RF power FETs include high
gain, low noise, simple bias systems, relative immunity from
thermal runaway, and the ability to withstand severely mismatched loads without suffering damage. Power output can
be varied over a wide range with a low power dc control signal.
DC BIAS
The MRF175L is an enhancement mode FET and, therefore, does not conduct when drain voltage is applied. Drain
current flows when a positive voltage is applied to the gate.
RF power FETs require forward bias for optimum performance. The value of quiescent drain current (IDQ) is not critical for many applications. The MRF175L was characterized
at IDQ = 100 mA, each side, which is the suggested minimum
value of IDQ. For special applications such as linear amplification, IDQ may have to be selected to optimize the critical
parameters.
The gate is a dc open circuit and draws no current. Therefore, the gate bias circuit may be just a simple resistive divider network. Some applications may require a more elaborate
bias sytem.
GAIN CONTROL
Power output of the MRF175L may be controlled from its
rated value down to zero (negative gain) by varying the dc
gate voltage. This feature facilitates the design of manual
gain control, AGC/ALC and modulation systems.
MRF175LU MRF175LV
7
PACKAGE DIMENSIONS
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CASE 333–04
ISSUE E
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
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against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
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MRF175LU MRF175LV
8
◊
MRF175LU/D
MOTOROLA RF DEVICE
DATA