TI CY54FCT480TSOIC Dual 8-bit parity generator/checker Datasheet

1CY54/74FCT480T
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY54/74FCT480T
Dual 8-Bit Parity Generator/Checker
SCCS025 - May 1993 - Revised March 2000
Features
• Function, pinout and drive compatible with FCT and F
logic
• FCT-A speed at 7.5 ns max. (Com’l)
FCT-B speed at 5.6 ns max. (Com’l)
• Reduced VOH (typically = 3.3V) versions of equivalent
FCT functions
• Edge-rate control circuitry for significantly improved
noise characteristics
• Power-off disable feature
• Matched rise and fall times
• ESD > 2000V
• Fully compatible with TTL input and output logic levels
• Sink Current
64 mA (Com’l),
32 mA (Mil)
Source Current 32 mA (Com’l),
12 mA (Mil)
• Two 8-bit parity generator/checkers
• Open drain Active LOW parity error output
• Expandable for larger word widths
Functional Description
The FCT480T is a high-speed dual 8-bit parity
generator/checker. Each parity generator/checker accepts
eight data bits and one parity bit as inputs, and generates a
sum and parity error output. The FCT480T can be used in
ODD parity systems. The parity error output is open-drain,
designed for easy expansion of the word width by a wired-OR
connection of several FCT480T type devices. Since additional
logic is not needed, the parity generation or checking times
remain the same as for an individual FCT480T device.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Logic Block Diagram
A1
B1
C1
D1
ODD1
E1
F1
G1
H1
PAR1
ERR
CHK/GEN
A2
B2
C2
D2
ODD2
E2
F2
G2
H2
PAR2
FCT480T–1
Pin Configurations
DIP/SOIC/QSOP
Top View
C1
B1
A1
NC
VCC
A2
B2
C2
NC
E2
D2
G2
F2
11 10 9 8 7 6 5
12
4
13
3
14
2
1
15
16
28
17
27
18
26
19 20 21 22 23 24 25
H2
CHK/GEN
ODD1
GND
NC
ODD2
ERROR
PAR2
E1
D1
PAR1
H1
G1
NC
F1
LCC
Top View
A1
1
24
VCC
B1
2
23
A2
C1
3
22
B2
D1
4
21
E1
5
20
F1
G1
6
19
C2
D2
E2
7
18
F2
H1
8
17
G2
PAR1
9
16
H2
CHK/GEN
10
PAR 2
ODD1
11
15
14
GND
12
13
ODD2
FCT480T–2
ERROR
FCT480T–3
Copyright
© 2000, Texas Instruments Incorporated
CY54/74FCT480T
Function Table
Inputs
Outputs
A1 to H1
A2 to H2
CHK/GEN
PAR1
PAR2
Number of A1 to H1 Inputs
HIGH is EVEN
Number of A2 to H2 Inputs
HIGH is EVEN
H
H
L
H
L
Number of Inputs HIGH A2
to H2 is ODD
Number of A1 to H1 Inputs
HIGH is ODD
Number of A2 to H2 Inputs
HIGH is EVEN
Number of A2 to H2 Inputs
HIGH is ODD
ODD2
ERROR
H
L
L
H
H
H
L
L
L
L
H
L
L
H
H
L
L
X
X
H
H
L
H
H
H
L
H
L
L
H
H
H
L
H
L
L
L
H
L
L
H
L
L
L
X
X
H
L
L
H
H
H
H
L
L
L
H
L
L
H
H
L
H
H
L
L
L
L
H
L
L
X
X
L
H
L
H
H
H
H
H
L
L
H
L
H
L
H
L
H
L
L
L
L
L
L
H
X
X
L
L
H
L
Maximum Ratings[1, 2]
ODD1
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
(Above which the useful life may be impaired. For user guidelines, not tested.)
Operating Range
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied .............................................–65°C to +135°C
Range
Supply Voltage to Ground Potential ............... –0.5V to +7.0V
DC Input Voltage............................................ –0.5V to +7.0V
Range
Ambient
Temperature
VCC
Commercial
All
–40°C to +85°C
5V ± 5%
Military[3]
All
–55°C to +125°C
5V ± 10%
Notes:
1. Unless otherwise noted, these limits are over the operating free-air temperature range.
2. Unused inputs must always be connected to an appropriate logic voltage
level, preferably either VCC or ground.
3. TA is the “instant on” case temperature.
DC Output Voltage ......................................... –0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin).......120 mA
Power Dissipation ..........................................................0.5W
2
CY54/74FCT480T
Electrical Characteristics Over the Operating Range
Parameter
VOH
Description
Output HIGH Voltage
VOL
Output LOW Voltage
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
[5]
Test Conditions
Min.
Typ.[4]
Max.
Unit
VCC = Min., IOH = –32 mA
Com’l
2.0
V
VCC = Min., IOH = –15 mA
Com’l
2.4
3.3
V
VCC = Min., IOH = –12 mA
Mil
2.4
3.3
V
VCC = Min., IOL = 64 mA
Com’l
0.3
0.55
V
VCC = Min., IOL = 32 mA
Mil
0.3
0.55
V
2.0
V
0.8
VH
Hysteresis
All inputs
0.2
VIK
Input Clamp Diode Voltage
VCC = Min., IIN = –18 mA
–0.7
II
Input HIGH Current
IIH
Input HIGH Current
IIL
V
V
–1.2
V
VCC = Max., VIN = VCC
5
µA
VCC = Max., VIN = 2.7V
±1
µA
Input LOW Current
VCC = Max., VIN = 0.5V
±1
µA
IOZH
Off State HIGH-Level Output
Current
VCC = Max., VOUT = 2.7V
10
µA
IOZL
Off State LOW-Level
Output Current
VCC = Max., VOUT = 0.5V
–10
µA
IOS
Output Short Circuit Current[6]
VCC = Max., VOUT = 0.0V
–225
mA
IOFF
Power-Off Disable
VCC = 0V, VOUT = 4.5V
±1
µA
–60
–120
Capacitance[5]
Parameter
Description
Typ.[4]
Max.
Unit
CIN
Input Capacitance
5
10
pF
COUT
Output Capacitance
9
12
pF
Notes:
4. Typical values are at VCC=5.0V, TA=+25˚C ambient.
5. This parameter is specified but not tested.
6. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
3
CY54/74FCT480T
Power Supply Characteristics
Parameter
Description
Test Conditions
Typ.[4]
Max.
Unit
ICC
Quiescent Power Supply Current
VCC=Max., VIN < 0.2V,
VIN > VCC–0.2V
0.1
0.2
mA
∆ICC
Quiescent Power Supply Current
(TTL inputs HIGH)
VCC=Max., VIN=3.4V,[7]
f1=0, Outputs Open
0.5
2.0
mA
ICCD
Dynamic Power Supply Current[8]
VCC=Max., One Bit Toggling,
50% Duty Cycle, Outputs Open,
VIN < 0.2V or VIN > VCC–0.2V
0.06
0.12
mA/
MHz
IC
Total Power Supply Current[9]
VCC=Max.,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=2.5 MHz,
VIN < 0.2V or VIN > VCC–0.2V
0.7
1.4
mA
VCC=Max.,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=2.5 MHz,
VIN=3.4V or VIN=GND
1.0
2.4
mA
VCC=Max.,
50% Duty Cycle, Outputs Open,
Sixteen Bits Toggling at f1=2.5 MHz,
VIN < 0.2V or VIN > VCC–0.2V
2.5
5.0[10]
mA
VCC=Max.,
50% Duty Cycle, Outputs Open,
Sixteen Bits Toggling at f1=2.5 MHz,
VIN=3.4V or VIN=GND
6.5
21.0[10]
mA
Switching Characteristics Over the Operating Range
FCT480AT
Description
FCT480BT
Com’l
Military
Com’l
Unit
tPLH
tPHL
Propagation Delay
A to EVEN/ODD
7.5
7.0
7.0
6.6
5.6
5.6
ns
tPLH[11]
tPHL
Propagation Delay
A to ERROR
7.0
8.5
7.0
8.1
5.6
6.5
ns
tPLH
tPHL
Propagation Delay
CHK/GEN to EVEN/ODD
6.5
7.5
6.3
7.4
5.9
5.9
ns
tPLH[11]
tPHL
Propagation Delay
CHK/GEN to ERROR
7.5
7.0
7.1
6.9
5.7
5.5
ns
Notes:
7. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
8. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
= IQUIESCENT + IINPUTS + IDYNAMIC
9. IC
IC
= ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
ICC = Quiescent Current with CMOS input levels
∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V)
DH = Duty Cycle for TTL inputs HIGH
NT = Number of TTL inputs at DH
ICCD = Dynamic Current caused by an input transition pair (HLH or LHL)
= Clock frequency for registered devices, otherwise zero
f0
= Input signal frequency
f1
N1 = Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
10. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
11. tPLH is measured up to VOUT=VOL+0.3V
4
CY54/74FCT480T
Ordering Information
Speed
(ns)
5.6
Ordering Code
CY74FCT480BTPC
Package
Name
P13/13A
Package Type
24-Lead (300-Mil) Molded DIP
Operating
Range
Commercial
CY74FCT480BTQCT
Q13
24-Lead (150-Mil) QSOP
CY74FCT480BTSOC/SOCT
S13
24-Lead (300-Mil) Molded SOIC
L64
28-Square Leadless Chip Carrier
Military
24-Lead (300-Mil) Molded DIP
Commercial
7.0
CY54FCT480BTLMB
7.5
CY74FCT480ATPC
CY74FCT480ATQCT
P13/13A
Q13
24-Lead (150-Mil) QSOP
Document #: 38-00281-B
5
CY54/74FCT480T
Package Diagrams
28-Square Leadless Chip Carrier L64
MIL-STD-1835 C-4
24-Lead (300-Mil) Molded DIP P13/P13A
6
CY54/74FCT480T
Package Diagrams (continued)
24-Lead Quarter Size Outline Q13
24-Lead (300-Mil) Molded SOIC S13
7
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