MC10EPT20, MC100EPT20 3.3VLVTTL/LVCMOS to Differential LVPECL Translator The MC10EPT20 is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL (Positive ECL) levels are used, only +3.3 V and ground are required. The small outline SOIC−8 package and the single gate of the EPT20 makes it ideal for those applications where space, performance, and low power are at a premium. The 100 Series contains temperature compensation. • 390 ps Typical Propagation Delay • Maximum Input Clock Frequency > 1 GHz Typical • Operating Range VCC = 3.0 V to 3.6 V • • • http://onsemi.com MARKING DIAGRAMS* 8 8 1 SO−8 D SUFFIX CASE 751 with GND = 0 V PNP TTL Input for Minimal Loading Q Output will Default HIGH with Input Open Pb−Free Packages are Available 8 HPT20 ALYW 1 1 8 8 1 TSSOP−8 DT SUFFIX CASE 948R KPT20 ALYW 8 HA20 ALYW KA20 ALYW 1 1 H = MC10 K = MC100 A = Assembly Location L = Wafer Lot Y = Year W = Work Week *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Semiconductor Components Industries, LLC, 2004 September, 2004 − Rev. 7 1 Publication Order Number: MC10EPT20/D MC10EPT20, MC100EPT20 Table 1. PIN DESCRIPTION NC Q Q 1 8 LVTTL 2 3 VCC 7 D 6 NC 5 GND PIN FUNCTION Q, Q Differential PECL Outputs D LVTTL Input VCC Positive Supply GND Ground NC No Connect LVPECL NC 4 Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor N/A Internal Input Pullup Resistor N/A ESD Protection Human Body Model Machine Model Charged Device Model > 1.5 kV > 200 V > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Level 1 Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Transistor Count 150 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit 6 V 6 V 50 100 mA mA VCC Power Supply GND = 0 V VI Input Voltage GND = 0 V Iout Output Current Continuous Surge TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C JA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm SOIC−8 SOIC−8 190 130 °C/W °C/W JC Thermal Resistance (Junction−to−Case) Standard Board SOIC−8 41 to 44 °C/W JA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm TSSOP−8 TSSOP−8 185 140 °C/W °C/W JC Thermal Resistance (Junction−to−Case) Standard Board TSSOP−8 41 to 44 °C/W Tsol Wave Solder <2 to 3 sec @ 248°C 265 °C VI VCC Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. http://onsemi.com 2 MC10EPT20, MC100EPT20 Table 4. LVTTL INPUT DC CHARACTERISTICS VCC = 3.3 V, GND = 0 V, TA = −40°C to +85°C Max Unit IIH Input HIGH Current (Vin = 2.7 V) Characteristic 20 A IIHH Input HIGH Current MAX (Vin = 6.0 V) 100 A IIL Input LOW Current (Vin = 0.5 V) −0.6 mA VIK Input Clamp Voltage (Iin = −18 mA) −1.2 V VIH Input HIGH Voltage VIL Input LOW Voltage Symbol Min Typ 2.0 V 0.8 V NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Table 5. 10EPT PECL OUTPUT DC CHARACTERISTICS VCC = 3.3 V, GND = 0 V (Note 2) −40°C 25°C 85°C Characteristic Min Typ Max Min Typ Max Min Typ Max Unit ICC Positive Power Supply Current “HIGH” 18 23 28 18 23 28 19 24 29 mA VOH Output HIGH Voltage (Note 3) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mV VOL Output LOW Voltage (Note 3) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mV Symbol NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Output parameters vary 1:1 with VCC. 3. All loading with 50 to VCC − 2.0 V. http://onsemi.com 3 MC10EPT20, MC100EPT20 Table 6. 100EPT PECL OUTPUT DC CHARACTERISTICS VCC = 3.3 V, GND = 0 V (Note 4) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 20 25 30 22 27 32 23 28 33 mA ICC Negative Power Supply Current VOH Output HIGH Voltage (Note 5) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV VOL Output LOW Voltage (Note 5) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Output parameters vary 1:1 with VCC. 5. All loading with 50 to VCC − 2.0 V. Table 7. AC CHARACTERISTICS VCC = 3.0 V to 3.6 V, GND = 0 V (Note 6) −40°C Symbol Min Characteristic fmax Maximum Input Clock Frequency tPLH, tPHL Propagation Delay to Output Differential tSKEW Device−to−Device Skew (Note 7) tJITTER RMS Random Clock Jitter tr tf Output Rise/Fall Times (20% − 80%) Typ 25°C Max Min >1 Typ 85°C Max Min >1 Typ Max >1 Unit GHz ps 280 350 430 300 370 150 Q, Q 70 <1 <2 100 170 450 320 400 150 80 <1 <2 120 180 90 490 170 ps <1 <2 ps 140 190 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 6. Measured using a LVTTL source, 50% duty cycle clock source. All loading with 50 to VCC − 2.0 V. 7. Skew is measured between outputs under identical transitions. http://onsemi.com 4 900 9 800 8 700 7 600 6 500 5 400 4 300 3 RMS RANDOM CLOCK JITTER (ps) OUTPUT VOLTAGE AMPLITUDE (mV) MC10EPT20, MC100EPT20 ÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 2 200 (JITTER) 100 1 0 0 200 400 600 800 1000 1200 INPUT CLOCK FREQUENCY (MHz) Figure 2. Output Voltage Amplitude (VOUTpp)/RMS Jitter vs. Input Clock Frequency at Ambient Temperature Q Zo = 50 D Receiver Device Driver Device Q Zo = 50 D 50 50 VTT VTT = VCC − 2.0 V Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) http://onsemi.com 5 MC10EPT20, MC100EPT20 ORDERING INFORMATION Package Shipping† MC10EPT20D SO−8 98 Units / Rail MC10EPT20DR2 SO−8 2500 / Tape & Reel MC10EPT20DT TSSOP−8 100 Units / Rail MC10EPT20DTR2 TSSOP−8 2500 / Tape & Reel Device MC100EPT20D SO−8 98 Units / Rail MC100EPT20DG SO−8 (Pb−Free) 98 Units / Rail MC100EPT20DR2 SO−8 2500 / Tape & Reel MC100EPT20DT TSSOP−8 100 Units / Rail MC100EPT20DTG TSSOP−8 (Pb−Free) 100 Units / Rail MC100EPT20DTR2 TSSOP−8 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPS I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1642/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 6 MC10EPT20, MC100EPT20 PACKAGE DIMENSIONS SOIC−8 NB D SUFFIX CASE 751−07 ISSUE AC NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. −X− A 8 5 0.25 (0.010) S B 1 M Y M 4 K −Y− G C N DIM A B C D G H J K M N S X 45 SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 8 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 8 0.010 0.020 0.228 0.244 MC10EPT20, MC100EPT20 PACKAGE DIMENSIONS TSSOP−8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R−02 ISSUE A 8x 0.15 (0.006) T U K REF 0.10 (0.004) S 2X L/2 8 1 PIN 1 IDENT S T U V S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. S 5 0.25 (0.010) B −U− L 0.15 (0.006) T U M M 4 A −V− F DETAIL E C 0.10 (0.004) −T− SEATING PLANE D −W− G DETAIL E DIM A B C D F G K L M MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0 6 INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0 6 ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 8 For additional information, please contact your local Sales Representative. MC10EPT20/D