Rohm BU2285FV Dvd-audio reference clock generator for audio/video appliance Datasheet

TECHNICAL NOTE
High-performance Clock Generator Series
DVD-Audio Reference
Clock Generator
for Audio/Video Appliance
BU2285FV,BU2363FV
●Description
These clock generators are an IC generating three types of clocks - VIDEO, AUIDIO and SYSTEM clocks – necessary for
DVD player systems, with a single chip through making use of the PLL technology. Particularly, the VIDEO clock is a
DVD-Audio reference and yet achieves high C/N characteristics necessary to provide high definition images.
●Features
1) Connecting a crystal oscillator generates multiple clock signals with a built-in PLL.
2) The AUDIO clock provides switching selection outputs
3) The VIDEO clock achieves high C/N characteristics.
4) Single power supply of 3.3 V
●Aplications
DVD players
●Lineup
Part name
Supply voltage [V]
Reference frequency [MHz]
DVD VIDEO
Output
frequency
[MHz]
DVD / CD AUDIO
(Switching outputs)
SYSTEM
Jitter 1σ [psec]
C/N [dB] (VIDEO)
Package
2
1
1/2
768fs
512fs
384fs
256fs
768fs
384fs
BU2285FV
3.0 ～ 3.6
36.8640
54.0000
27.0000
13.5000
36.8640 / 33.8688
－
18.4320 / 16.9344
－
33.8688
16.9344
50
-60
SSOP-B24
BU2363FV
3.0 ～ 3.6
36.8640
54.0000
27.0000
－
36.8640 / 33.8688
－
18.4320 / 16.9344
－
33.8688
16.9344
50
-80
SSOP-B16
Sep. 2008
●Absolute Maximum Ratings (Ta=25℃)
Parameter
Supply voltage
Input voltage
Symbol
BU2285FV
BU2363FV
VDD
-0.5 ～ ＋7.0
-0.5 ～ ＋7.0
VIN
-0.5 ～ VDD＋0.5
-0.5 ～ VDD＋0.5
Storage temperature range
Tstg
-30 ～ ＋125
-30 ～ ＋125
Power dissipation
PD
630 *1
450 *2
*1 In the case of exceeding at Ta = 25℃, 6.3mW should be reduced per 1℃
*2 In the case of exceeding at Ta = 25℃, 4.5mW should be reduced per 1℃
＊Operating is not guaranteed.
＊The radiation-resistance design is not carried out.
＊Power dissipation is measured when the IC is mounted to the printed circuit board.
Unit
V
V
℃
mW
●Recommended Operating Range
Parameter
Supply voltage
Input H voltage
Input L voltage
Operating temperature
Maximum output load
Symbol
VDD
VIH
VIL
Topr
CL
BU2285FV
3.0 ～ 3.6
0.8VDD ～ VDD
0.0 ～ 0.2VDD
-5 ～ ＋70
15
BU2363FV
3.0 ～ 3.6
0.8VDD ～ VDD
0.0 ～ 0.2VDD
-10 ～ ＋70
15
Unit
V
V
V
℃
pF
●Electrical characteristics
◎BU2285FV（VDD=3.3V, Ta=25℃, Crystal frequency 36.8640MHz, unless otherwise specified.）
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Output L voltage
VOL
－
－
0.4
V
IOL=4.0mA
Output H voltage
VOH
2.4
－
－
V
IOH=-4.0mA
Consumption current
IDD
－
30
50
mA
At no load
CLK54M
CLK54M
－
54.0000
－
MHz
XTAL×375 / 128 / 2
CLK27M
CLK27M
－
27.0000
－
MHz
XTAL×375 / 128 / 4
At CTRLB=OPEN,
XTAL×375 / 128 / 4
At CTRLB=L,
XTAL×375 / 128 / 8
XTAL×147 / 40 / 4
XTAL×147 / 40 / 8
CLKDAC_H
－
27.0000
－
MHz
CLKDAC_L
－
13.5000
－
MHz
CLK33M
CLK16M
－
－
33.8688
16.9344
－
－
MHz
MHz
CLKA_H
－
36.8640
－
MHz
CLKA_L
－
33.8688
－
MHz
CLKB_H
－
18.4320
－
MHz
CLKB_L
－
16.9344
－
MHz
Duty
Period-Jitter 1σ
Period-Jitter
MIN-MAX
Duty
P-J 1σ
P-J
MIN-MAX
45
－
50
50
55
－
%
psec
Measured at a voltage of 1/2VDD
－
300
－
psec
*2
Rise Time
Tr
－
2.5
－
nsec
Fall Time
Tf
－
2.5
－
nsec
Output Lock-Time
Tlock
－
－
1
msec
CLKDAC
CLK33M
CLK16M
CLKA
CLKB
At CTRLA=OPEN,
XTAL output
At CTRLA=L,
XTAL×147 / 40 / 4
At CTRLA=OPEN,
XTAL / 2 output
At CTRLA=L,
XTAL×147 / 40 / 8
*1
Period of transition time required for the
clock output to reach 80% from 20% of VDD
Period of transition time required for the
clock output to reach 20% from 80% of VDD
*3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to XTALIN.
If the input frequency is set to 36.8640MHz, the output frequency will be as listed above.
2/16
◎BU2363FV（VDD=3.3V, Ta=25℃, Crystal frequency 36.8640MHz, unless otherwise specified.）
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Output L voltage
VOL
－
－
0.4
V
IOL=4.0mA
Output H voltage
VOH
2.4
－
－
V
IOH=－4.0mA
Consumption current
IDD
－
30
50
mA
At no load
CLK54M
CLK54M
－
54.0000
－
MHz
XTAL×375 / 64 / 4
CLK27M
CLK27M
－
27.0000
－
MHz
XTAL×375 / 64 / 8
CLK33M
CLK33M
－
33.8688
－
MHz
XTAL×147 / 40 / 4
CLK16M
CLK16M
－
16.9344
－
MHz
XTAL×147 / 40 / 8
At FSEL=OPEN,
XTAL output
At FSEL=L,
XTAL×147 / 40 / 4
CLK768_H
－
36.8640
－
MHz
CLK768_L
－
33.8688
－
MHz
CLK384_H
－
18.4320
－
MHz
CLK384_L
－
16.9344
－
MHz
Duty
Period-Jitter 1σ
Period-Jitter
MIN-MAX
Duty
P-J 1σ
P-J
MIN-MAX
45
－
50
50
55
－
%
psec
*1
－
300
－
psec
*2
Rise Time
Tr
－
2.5
－
nsec
Fall Time
Tf
－
2.5
－
nsec
Output Lock-Time
Tlock
C/N 54M
C/N 33M
－
-65
-50
－
-80
-60
1
－
－
msec
dB
dB
CLK768FS1
CLK384FS2
C/N 54M
C/N 33M
At FSEL=OPEN,
XTAL / 2 output
At FSEL=L,
XTAL×147 / 40 / 8
Measured at a voltage of 1/2VDD
Period of transition time required for the clock
output to reach 80% from 20% of VDD
Period of transition time required for the clock
output to reach 20% from 80% of VDD
*3
*4 (At a maximum load)
*4 (At a maximum load)
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to XTALIN.
If the input frequency is set to 36.8640MHz, the output frequency will be as listed above.
Common to BU2285FV and BU2363FV:
*1
Period-Jitter 1σ
This parameter represents standard deviation (1 ) on cycle distribution data at the time when the output clock cycles are
sampled 1000 times consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
*2
Period-Jitter MIN-MAX
This parameter represents a maximum distribution width on cycle distribution data at the time when the output clock cycles
are sampled 1000 times consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
*3
Output Lock-Time
The Lock-Time represents elapsed time after power supply turns ON to reach a 3.0V voltage, after the system is switched
from Power-Down state to normal operation state, or after the output frequency is switched, until it is stabilized at a specified
frequency, respectively.
BU2363FV
*4
Make measurements with settings of SPAN to 100kHz, RBW to 1kHz, and VBW to 100Hz taking the middle point between
(54.0000MHz20kHz) and (33.8688MHz20kHz) as a measurement point.
3/16
●Reference data (BU2285FV basic data)
5.0nsec／div
Fig.1 54MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
10KHz／div
Fig.2 54MHz Period-Jitter
VDD=3.3V, at CL=15pF
Fig.3 54MHz Spectrum
VDD=3.3V, at CL=15pF
5.0nsec／div
Fig.4 27MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.5 27MHz Period-Jitter
VDD=3.3V, at CL=15pF
10KHz／div
Fig.6 27MHz Spectrum
VDD=3.3V at CL=15pF
10.0nsec／div
Fig.7 13.5MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.8 13.5MHz Period-Jitter
VDD=3.3V, at CL=15pF
10KHz／div
Fig.9 13.5MHz Spectrum
VDD=3.3V, at CL=15pF
5.0nsec／div
Fig.10 33.9MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.11 33.9MHz Period-Jitter
VDD=3.3V, at CL=15pF
4/16
10KHz／div
Fig.12 33.9MHz Spectrum
VDD=3.3V, at CL=15pF
●Reference data (BU2285FV basic data)
1.0V／div
10.0nsec／div
Fig.13 16.9MHz output waveform
VDD=3.3V, at CL=15pF
500psec／div
Fig.14 16.9MHz Period-Jitter
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
RBW=1KHz
VBW=100Hz
10KHz／div
Fig.15 16.9MHz Spectrum
VDD=3.3V, at CL=15pF
5.0nsec／div
Fig.16 36.9MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.17 36.9MHz Period-Jitter
VDD=3.3V, at CL=15pF
10KHz／div
Fig.18 36.9MHz Spectrum
VDD=3.3V, at CL=15pF
10.0nsec／div
Fig.19 18.4MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.20 18.4MHz Period-Jitter
VDD=3.3V, at CL=15pF
5/16
10KHz／div
Fig.21 18.4MHz Spectrum
VDD=3.3V, at CL=15pF
●Reference data (BU2285FV Temperature and Supply voltage variations data)
90
VDD=3.7V
VDD=3.3V
VDD=2.9V
52
51
50
49
48
47
46
80
VDD=3.7V
VDD=3.3V
VDD=2.9V
70
60
50
40
30
20
0
25
50
75
100
0
Fig.22 54MHz
100
54
90
Period-jitter1σ：PJ-1σ[psec]
55
53
VDD=3.7V
VDD=3.3V
VDD=2.9V
52
51
25
50
75
100
-25
100
50
49
48
47
46
25
50
75
80
70
60
VDD=3.7V
VDD=3.3V
VDD=2.9V
50
40
30
20
10
0
100
54
90
Period-jitter1σ：PJ-1σ[psec]
55
VDD=3.3V
VDD=3.7V
VDD=2.9V
53
52
25
50
75
51
50
49
48
47
46
45
0
25
50
75
60
VDD=3.7V
VDD=3.3V
VDD=2.9V
50
40
30
20
10
90
Period-jitter1σ：PJ-1σ[psec]
100
53
52
51
50
VDD=2.9V
VDD=3.3V
VDD=3.7V
46
45
25
50
75
25
50
75
Temperature：T[℃]
Fig.31 33.9MHz
Temperature－Duty
400
100
75
100
VDD=3.7V
VDD=3.3V
VDD=2.9V
300
200
100
-25
100
0
25
50
75
100
Temperature：T[℃]
Fig.30 13.5MHz
Temperature－Period-Jitter MIN-MAX
600
80
70
60
50
40
VDD=2.9V
VDD=3.7V
VDD=3.3V
30
20
500
400
300
VDD=2.9V
VDD=3.7V
VDD=3.3V
200
100
10
0
0
0
50
0
0
Fig.29 13.5MHz
Temperature－Period-Jitter 1σ
54
25
500
Temperature：T[℃]
55
-25
0
Fig.27 27MHz
Temperature－Period-Jitter MIN-MAX
70
-25
Fig.28 13.5MHz
47
100
Temperature：T[℃]
80
100
Temperature－Duty
48
200
600
Temperature：T[℃]
49
VDD=2.9V
VDD=3.3V
VDD=3.7V
300
-25
0
-25
400
100
Fig.26 27MHz
Temperature－Period-Jitter 1σ
Fig.25 27MHz
100
500
Temperature：T[℃]
Temperature：T[℃]
Temperature－Duty
75
0
-25
100
50
600
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
0
25
Fig.24 54MHz
Temperature－Period-Jitter MIN-MAX
0
45
-25
0
Temperature：T[℃]
Fig.23 54MHz
Temperature－Period-Jitter 1σ
Temperature－Duty
Duty：Duty[％]
200
Temperature：T[℃]
Temperature：T[℃]
Duty：Duty[％]
300
0
-25
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
-25
VDD=2.9V
VDD=3.3V
VDD=3.7V
400
0
45
Duty：Duty[％]
500
10
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
Duty：Duty[％]
53
600
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
100
54
Period-jitter1σ：PJ-1σ[psec]
55
-25
0
25
50
75
Temperature：T[℃]
Fig.32 33.9MHz
Temperature－Period-Jitter 1σ
6/16
100
-25
0
25
50
75
Temperature：T[℃]
Fig.33 33.9MHz
Temperature－Period-Jitter MIN-MAX
100
● Reference data (BU2285FV Temperature and Supply voltage variations data)
55
100
27.000000
MHz
52
51
50
49
48
VDD=2.9V
VDD=3.3V
VDD=3.7V
47
46
45
80
70
60
50
40
30
VDD=2.9V
VDD=3.3V
VDD=3.7V
20
10
0
25
50
75
100
-25
0
Temperature：T[℃]
200
VDD=2.9V
VDD=2.9V
VDD=3.3V
VDD=3.3V
VDD=3.7V
VDD=3.7V
100
25
50
75
-25
100
0
25
50
75
100
Temperature：T[℃]
55
100
600
54
90
52
51
50
VDD=3.7V
VDD=3.3V
VDD=2.9V
49
48
47
46
80
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
Fig.36 16.9MHz
Temperature－Period-Jitter MIN-MAX
Period-jitter1σ：PJ-1σ[psec]
Duty：Duty[％]
300
Fig.35 16.9MHz
Temperature－Period-Jitter 1σ
53
VDD=2.9V
VDD=3.3V
VDD=3.7V
70
60
50
40
30
20
-25
0
25
50
75
0
25
50
75
90
Period-jitter1σ：PJ-1σ[psec]
100
54
53
52
51
50
VDD=2.9V
VDD=3.3V
VDD=3.7V
46
45
0
25
50
75
100
70
VDD=3.3V
VDD=2.9V
VDD=3.7V
60
50
40
30
20
10
0
25
30
20
VDD=3.7V
VDD=3.3V
VDD=2.9V
0
25
50
50
75
Fig.41 18.4MHz
Temperature－Period-Jitter 1σ
40
0
75
50
75
100
500
VDD=2.9V
VDD=3.3V
VDD=3.7V
400
300
200
100
0
-25
50
-25
25
Fig.39 36.9MHz
Temperature－Period-Jitter MIN-MAX
80
Temperature：T[℃]
Fig.40 18.4MHz
Temperature－Duty
0
600
Temperature：T[℃]
10
100
Temperature：T[℃]
0
-25
200
-25
100
Fig.38 36.9MHz
Temperature－Period-Jitter 1σ
55
47
300
Temperature：T[℃]
Fig.37 36.9MHz
Temperature－Duty
48
VDD=2.9V
VDD=3.3V
VDD=3.7V
400
0
-25
100
Temperature：T[℃]
49
500
10
0
45
Duty：Duty[％]
400
Temperature：T[℃]
Fig.34 16.9MHz
Temperature－Duty
Circuit Current：IDD[mA]
500
0
0
-25
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
Duty：Duty[％]
53
600
90
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
Period-jitter1σ：PJ-1σ[psec]
54
100
Temperature：T[℃]
Fig.43 Consumption current (with maximum output load)
Temperature－Consumption current
7/16
100
-25
0
25
50
75
Temperature：T[℃]
Fig.42 18.4MHz
Temperature－Period-Jitter MIN-MAX
100
●Reference data (BU2363FV basic data)
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
3.0nsec／div
Fig.44 54MHz output waveform
VDD=3.3V, at CL=15pF
500psec／div
10KHz／div
Fig.45 54MHz Period-Jitter
VDD=3.3V, at CL=15pF
Fig.46 54MHz Spectrum
VDD=3.3V, at CL=15pF
5.0nsec／div
Fig.47 27MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
10KHz／div
500psec／div
Fig.49 27MHz Spectrum
VDD=3.3V, at CL=15pF
Fig.48 27MHz Period-Jitter
VDD=3.3V, at CL=15pF
5.0nsec／div
Fig.50 33.9MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
10KHz／div
Fig.51 33.9MHz Period-Jitter
VDD=3.3V, at CL=15pF
Fig.52 33.9MHz Spectrum
VDD=3.3V, at CL=15pF
10.0nsec／div
Fig.53 16.9MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.54 16.9MHz Period-Jitter
VDD=3.3V, at CL=15pF
8/16
10KHz／div
Fig.55 16.9MHz Spectrum
VDD=3.3V, at CL=15pF
●Reference data (BU2363FV basic data)
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
5.0nsec／div
10KHz／div
Fig.57 36.9MHz Period-Jitter
VDD=3.3V, at CL=15pF
Fig.56 36.9MHz output waveform
VDD=3.3V, at CL=15pF
Fig.58 36.9MHz Spectrum
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
10.0nsec／div
Fig.59 18.4MHz output waveform
VDD=3.3V, at CL=15pF
10KHz／div
Fig.60 18.4MHz Period-Jitter
VDD=3.3V, at CL=15pF
Fig.61 18.4MHz Spectrum
VDD=3.3V, at CL=15pF
●Reference data (BU2363FV Temperature and Supply voltage variations data)
90
VDD=3.7V
VDD=3.3V
VDD=2.9V
52
51
50
49
48
47
46
80
VDD=3.7V
VDD=3.3V
VDD=2.9V
70
60
50
40
30
20
10
0
45
-25
0
25
50
75
100
0
Temperature：T[℃]
90
Duty：Duty[%]
VDD=3.7V
VDD=3.3V
VDD=2.9V
50
49
48
47
46
Period-jitter1σ ： PJ-1σ[psec]
100
54
51
25
50
75
0
25
50
75
Temperature：T[℃]
Fig.65 27MHz
Temperature－Duty
200
100
-25
0
100
25
50
75
100
Temperature： T[ ℃]
Fig.64 54MHz
Temperature－Period-Jitter MIN-MAX
600
80
VDD=3.3V
VDD=2.9V
VDD=3.7V
70
60
50
40
30
20
10
0
45
-25
300
100
Fig.63 54MHz
Temperature－Period-Jitter 1σ
55
52
VDD=2.9V
VDD=3.3V
VDD=3.7V
400
Temperature：T[℃]
Fig.62 54MHz
Temperature－Duty
53
500
0
-25
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
Duty：Duty[%]
53
600
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
100
54
Period-jitter1σ ： PJ-1σ[psec]
55
500
VDD=2.9V
VDD=3.3V
VDD=3.7V
400
300
200
100
0
-25
0
25
50
75
Temperature：T[℃]
Fig.66 27MHz
Temperature－Period-Jitter 1σ
9/16
100
-25
0
25
50
75
Temperature： T[ ℃]
Fig.67 27MHz
Temperature－Period-Jitter MIN-MAX
100
●Reference data (BU2363FV Temperature and Supply voltage variations data)
90
VDD=3.7V
VDD=3.3V
VDD=2.9V
52
51
50
49
48
47
46
80
VDD=3.3V
VDD=3.7V
VDD=2.9V
70
60
50
40
30
20
10
0
45
0
25
50
75
-25
100
0
Fig.68 33.9MHz
Temperature－Duty
90
VDD=3.7V
VDD=3.3V
VDD=2.9V
51
50
49
48
46
400
300
200
100
-25
0
25
50
75
100
Temperature：T[℃]
Fig.70 33.9MHz
Temperature－Period-Jitter MIN-MAX
600
80
VDD=3.7V
VDD=3.3V
VDD=2.9V
70
60
50
40
30
20
10
VDD=3.7V
VDD=3.3V
VDD=2.9V
500
400
300
200
100
0
45
-25
0
25
50
75
-25
100
0
Fig.71 16.9MHz
Temperature－Duty
90
Period-jitter1σ ： PJ-1σ[psec]
100
54
VDD=3.7V
VDD=3.3V
VDD=2.9V
52
50
75
0
100
-25
51
50
49
48
47
46
-25
0
25
50
75
VDD=2.9V
VDD=3.3V
VDD=3.7V
70
60
50
40
30
20
10
0
90
Period-jitter1σ ： PJ-1σ[psec]
100
VDD=3.7V
VDD=3.3V
VDD=2.9V
53
52
25
50
75
51
50
49
48
47
46
0
25
50
75
Temperature：T[℃]
Fig.77 18.4MHz
Temperature－Duty
300
200
100
-25
0
100
25
50
75
100
Temperature： T[ ℃]
Fig.76 36.9MHz
Temperature－Period-Jitter MIN-MAX
600
VDD=2.9V
VDD=3.3V
VDD=3.7V
80
70
60
50
40
30
20
10
0
45
-25
400
100
Fig.75 36.9MHz
Temperature－Period-Jitter 1σ
54
100
VDD=3.3V
VDD=2.9V
VDD=3.7V
500
Temperature：T[℃]
Temperature：T[℃]
55
75
0
-25
Fig.74 36.9MHz
Temperature－Duty
50
600
80
100
25
Fig.73 16.9MHz
Temperature－Period-Jitter MIN-MAX
0
45
0
Temperature：T[℃]
Fig.72 16.9MHz
Temperature－Period-Jitter 1σ
55
53
25
Temperature：T[℃]
Temperature：T[℃]
Duty：Duty[%]
VDD=3.7V
VDD=3.3V
VDD=2.9V
0
100
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
Duty：Duty[%]
Period-jitter1σ ： PJ-1σ[psec]
100
54
47
Duty：Duty[%]
75
Fig.69 33.9MHz
Temperature－Period-Jitter 1σ
55
52
50
500
Temperature：T[℃]
Temperature：T[℃]
53
25
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
-25
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
Duty：Duty[%]
53
600
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
100
54
Period-jitter1σ ： PJ-1σ[psec]
55
500
VDD=3.3V
VDD=2.9V
VDD=3.7V
400
300
200
100
0
-25
0
25
50
75
Temperature：T[℃]
Fig.78 18.4MHz
Temperature－Period-Jitter 1σ
10/16
100
-25
0
25
50
75
Temperature： T[ ℃]
Fig.79 18.4MHz
Temperature－Period-Jitter MIN-MAX
100
●Reference data (BU2363FV Temperature and Supply voltage variations data)
Circuit Current ： IDD[mA]
50
40
30
20
VDD=3.7V
VDD=3.3V
VDD=2.9V
10
0
-25
0
25
50
75
100
Temperature：T[℃]
Fig.80 Consumption current
(with maximum output load)
Temperature－Consumption current
●
Block diagram, Pin assignment
◎BU2285FV
23:CTRLB
(CTRLB=OPEN:27.0000MHz
CTRL=L
:13.5000MHz)
8:XTALIN
XTAL
OSC
9:XTALOUT
PLL1
1/2
22:CLK54M
(54.0000MHz)
1/4
16:CLK27M
(27.0000MHz)
1/8
PLL2
20:CLKDAC
(CTRLB=OPEN:27.0000MHz
CTRLB=L
:13.5000MHz
1/4
24:CLK33M
(33.8688MHz)
1/8
3:CLK16M
(16.9344MHz)
12:CLKA
(CTRLA=OPEN:36.8640MHz
CTRLA=L
:33.8688MH
1/2
13:CLKB
(CTRLA=OPEN:18.4320MHz
CTRLA=L
:16.9344MH
21:OE
11:CTRA
(CTRLA=OPEN:48.0kHz type
CTRLA=L
:44.1kHz type)
Fig.81
1:VDD1
24:CLK33M
2:VSS1
23:CTRLB
3:CLK16M
22:CLK54M
4:AVSS
21:OE
6:AVDD
7:AVSS
8:XTALIN
BU2285FV
5:AVDD
19:DVDD
18:DVSS
CLKA
33.8688MHz
36.8640MHz
17:DVSS
9:XTALOUT
16:CLK27M
10:NC
15:VDD2
11:CTRLA
14:VSS2
12:CLKA
13:CLKB
Fig.82
CTRLA
L
OPEN
20:CLKDAC
CTRLB
L
OPEN
11/16
CLKDAC
13.5000MHz
27.0000MHz
CLKB
16.9344MHz
18.4320MHz
●Block diagram, Pin assignment
◎BU2363FV
1/4
3:CLK54M
(54.0000MHz)
MULTI-PLL
Technology
1/8
4:CLK27M
(27.0000MHz)
PLL2
1/4
15:CLK33M
(33.8688MHz)
1/8
13:CLK16M
(16.9344MHz)
XTALIN=36.8640MHz
7:XTALIN
XTAL
OSC
8:XTALOUT
10:768FS1
(FSEL=OPEN:36.8640MHz
FSEL=L
:33.8688MHz)
1/2
9:384FS2
(FSEL=OPEN:18.4320MHz
FSEL=L
:16.9344MHz)
16:OE
14:FSEL
(FSEL=OPEN:48.0kHz type
FSEL=L
:44.1kHz type)
Fig.83
1:VDD2
16:OE
2:VSS2
15:CLK33M
BU2363FV
3:CLK254M
4:CLK27M
5:AVDD
6:AVSS
14:FSEL
13:CLK16M
12:DVDD
11:DVSS
7:XTALIN
10:768FS1
8:XTALOUT
9:384FS2
Fig.84
FSEL
L
OPEN
CLK768FS
33.8688MHz
36.8640MHz
CLK384FS
16.9344MHz
18.4320MHz
12/16
●Example of application circuit
◎BU2285FV
1:VDD1
24:CLK33M
33.8688MHz
2:VSS1
23:CTRLB
3:CLK16M
22:CLK54M
OPEN:27.0000MHz
L
:13.5000MHz
54.0000MHz
4:AVSS
21:OE
0.1uF
16.9344MHz
5:AVDD
6:AVDD
0.1uF
7:AVSS
8:XTALIN
BU2285FV
0.1uF
20:CLKDAC
19:DVDD
0.1uF
18:DVSS
17:DVSS
9:XTALOUT
16:CLK27M
10:NC
15:VDD2
11:CTRLA
14:VSS2
:44.1kHz type
36.8640MHz
or 33.8688MHz
12:CLKA
13:CLKB
27.0000MHz
0.1uF
OPEN:48.0kHz type
L
OPEN:Enable
L
:Disable
27.0000MHz
or 13.5000MHz
18.4320MHz
or 16.9344MHz
Fig.85
Pin function
PIN No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PIN name
VDD1
VSS1
CLK16M
AVSS
AVDD
AVDD
AVSS
XTALIN
XTALOUT
NC
CTRLA
CLKA
CLKB
VSS2
VDD2
CLK27M
DVSS
DVSS
DVDD
CLKDAC
OE
CLK54M
CTRLB
CLK33M
PIN function
33MHz system power supply
33MHz system GND
16.9344MHz output
Analog GND
Analog power supply
Analog power supply
Analog GND
Crystal input terminal
Crystal output terminal
NC
CLKA or B output selection (with pull-up)
CTRLA=OPEN:36.8640MHz, CTRLA=L:33.8688MHz
CTRLA=OPEN:18.4320MHz, CTRLA=L:16.9344MHz
CLKA, B GND
CLKA, B power supply
27.0000MHz output
Digital GND
Digital GND
Digital power supply
CTRLB=OPEN:27.0000MHz, CTRLB=L:13.5000MHz
Output enable (with pull-up), OPEN:enable, L:disable
54.0000MHz output
CLKDAC output selection(with pull-up)
33.8688MHz output
Note) Basically, mount ICs to the printed circuit board for use. (If the ICs are not mounted to the printed circuit board, the characteristics of ICs
may not be fully demonstrated.)
Mount 0.1F capacitors in the vicinity of the IC PINs between 1PIN (VDD1) and 2PIN (VSS1), 4PIN (AVSS) and 5PIN (AVDD), 6PIN (AVDD) and
7PIN (AVSS), 14PIN (VSS2) and 15PIN (VDD2), and 17PIN/18PIN (DVSS) and 19PIN (DVDD), respectively.
Depending on the conditions of the printed circuit board, mount an additional electrolytic capacitor between the power supply and GND terminal.
For EMI protection, it is effective to put ferrite beads in the origin of power supply to be fed to BU2285FV from the printed circuit board or to insert
a capacitor (of 1 or less), which bypasses high frequency desired, between the power supply and the GND terminal.
13/16
●Example of application circuit
◎BU2363FV
1:VDD2
16:OE
OPEN:Enable
L
:Disable
2:VSS2
15:CLK33M
33.8688MHz
14:FSEL
OPEN:48.0kHz type
L
:44.1kHz type
16.9344MHz
0.1uF
3:CLK254M
27.0000MHz
4:CLK27M
5:AVDD
0.1uF
6:AVSS
BU2363FV
54.0000MHz
13:CLK16M
12:DVDD
0.1uF
11:DVSS
7:XTALIN
10:768FS1
8:XTALOUT
9:384FS2
36.8640MHz
or 33.8688MHz
18.4320MHz
or 16.9344MHz
Fig.86
Pin function
PIN No.
1
2
3
4
5
6
7
8
9
10
11
12
13
PIN name
VDD2
VSS2
CLK54M
CLK27M
AVDD
AVSS
XTALIN
XTALOUT
384FS2
768FS1
DVSS
DVDD
CLK16M
14
FSEL
15
16
CLK33M
OE
PIN function
27MHz, 54MHz power supply
27MHz, 54MHzGND
54.0000MHz output
27.0000MHz output
Analog power supply
Analog GND
Crystal input terminal
Crystal output terminal
FSEL=OPEN:18.4320MHz, FSEL=L:16.9344MHz
FSEL=OPEN:36.8640MHz, FSEL=L:33.8688MHz
Digital GND
Digital power supply
16.9344MHz output
9, 10PIN output selection(with pull-up)
OPEN:18.4320MHz(9PIN), 36.8640MHz(10PIN)
L:16.9344MHz(9PIN), 33.8688MHz(10PIN)
33.8688MHz output
Output enable (with pull-up), OPEN:enable, L:disable
Note) Basically, mount ICs to the printed circuit board for use. (If the ICs are not mounted to the printed circuit board, the characteristics of ICs
may not be fully demonstrated.)
Mount 0.1F capacitors in the vicinity of the IC PINs between 1PIN (VDD2) and 2PIN (VSS2), 5PIN (AVDD) and 6PIN (AVSS), 11PIN (DVSS) and
12PIN (DVDD), respectively.
Depending on the conditions of the printed circuit board, mount an additional electrolytic capacitor between the power supply and GND terminal.
For EMI protection, it is effective to put ferrite beads in the origin of power supply to be fed to BU2363FV from the printed circuit board or to insert
a capacitor (of 1 or less), which bypasses high frequency desired, between the power supply and the GND terminal.
Even though we believe that the example of recommended circuit is worth of a recommendation, please be sure to
thoroughly recheck the characteristics before use.
14/16
●Cautions on use
(1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as applied voltage (VDD or VIN), operating temperature range (Topr),
etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit.
If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take
physical safety measures including the use of fuses, etc.
(2) Recommended operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected. The
electrical characteristics are guaranteed under the conditions of each parameter.
(3) Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the
breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC’s
power supply terminal.
(4) Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines.
In this regard, for the digital block power supply and the analog block power supply, even though these power supplies
has the same level of potential, separate the power supply pattern for the digital block from that for the analog block,
thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to
the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal.
At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the
capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus
determining the constant.
(5) GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric
transient.
(6) Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting
can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or
between the terminal and the power supply or the GND terminal, the ICs can break down.
(7) Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8) Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress.
Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set
PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the
jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In
addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention
to the transportation and the storage of the set PCB.
(9) Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the
parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of
the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input
terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not
apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power
supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the
guaranteed value of electrical characteristics.
(10) Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND
pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that
resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of
the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.
(11) External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a
degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc.
15/16
●Product Designation
B
U
2
2
8
Type
BU2285FV
BU2363FV
Part No.
5
F
-
V
E
Package Type
FV : SSOP-B24(BU2285FV)
FV : SSOP-B16(BU2363FV)
2
Package and forming specification
E2: Reel-like emboss taping
SSOP-B16
<Dimension>
<Tape and Reel information>
9
1
8
0.3Min.
16
Direction
of feed
E2
2500pcs
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
0.15 ± 0.1
1234
1234
1234
1234
Direction of feed
1pin
Reel
(Unit:mm)
1234
1234
0.1
0.22 ± 0.1
1234
0.65
Embossed carrier tape
1234
1.15 ± 0.1 6.4 ± 0.3
0.1
4.4 ± 0.2
5.0 ± 0.2
Tape
Quantity
※When you order , please order in times the amount of package quantity.
SSOP-B24
<Dimension>
<Tape and Reel information>
7.8 ± 0.2
13
E2
2000pcs
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
0.15 ± 0.1
1234
1234
1234
(Unit:mm)
1pin
1234
Reel
1234
0.22 ± 0.1
1234
0.1
1234
0.65
12
Direction
1234
1.15 ± 0.1
0.1
1
Embossed carrier tape
of feed
0.3Min.
7.6 ± 0.3
5.6 ± 0.2
24
Tape
Quantity
Direction of feed
※When you order , please order in times the amount of package quantity.
Catalog No.08T806A '08.9 ROHM ©
Appendix
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM
CO.,LTD.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you
wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM
upon request.
Examples of application circuits, circuit constants and any other information contained herein illustrate the
standard usage and operations of the Products. The peripheral conditions must be taken into account
when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document. However, should
you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and examples
of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to
use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information.
The Products specified in this document are intended to be used with general-use electronic equipment
or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or
malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard against the
possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as
derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your
use of any Product outside of the prescribed scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or system
which requires an extremely high level of reliability the failure or malfunction of which may result in a direct
threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment,
aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear
no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may be controlled under
the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact your nearest sales office.
ROHM Customer Support System
www.rohm.com
Copyright © 2009 ROHM CO.,LTD.
THE AMERICAS / EUROPE / ASIA / JAPAN
Contact us : webmaster @ rohm.co. jp
21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan
TEL : +81-75-311-2121
FAX : +81-75-315-0172
Appendix-Rev4.0