MC10H172 Dual Binary to 1−4−Decoder (High) Description The MC10H172 is a binary coded 2 line to dual 4 line decoder with selected outputs high. With either E0 or E1 low, the corresponding selected 4 outputs are low. The common enable E, when high, forces all outputs low. http://onsemi.com MARKING DIAGRAMS* Features • Propagation Delay, 2 ns Typical • Power Dissipation 325 mW Typical (same as MECL 10K™) • Improved Noise Margin 150 mV (over operating voltage and • • • 16 MC10H172L AWLYYWW temperature range) Voltage Compensated MECL 10K Compatible Pb−Free Packages are Available* 1 CDIP−16 L SUFFIX CASE 620A LOGIC DIAGRAM E0 14 10 Q0 3 16 11 Q0 2 12 Q0 1 A9 13 Q0 0 VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 3 Q1 3 B7 MC10H172P AWLYYWWG 16 1 PDIP−16 P SUFFIX CASE 648 1 4 Q1 2 5 Q1 1 E 15 1 20 6 Q1 0 E1 2 DIP PIN ASSIGNMENT VCC1 1 16 VCC2 E1 2 15 E Q13 3 14 E0 Q12 4 13 Q00 Q11 5 12 Q01 Q10 6 11 Q02 B 7 10 Q03 VEE 8 9 PLLC−20 FN SUFFIX CASE 775 A WL, L YY, Y WW, W G A *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. February, 2006 − Rev. 7 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *For additional marking information, refer to Application Note AND8002/D. Pin assignment is for Dual−in−Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). © Semiconductor Components Industries, LLC, 2006 10H172G AWLYYWW 20 1 1 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. Publication Order Number: MC10H172/D MC10H172 Table 1. MAXIMUM RATINGS Symbol Rating Unit VEE Power Supply (VCC = 0) Characteristic −8 to 0 Vdc VI Input Voltage (VCC = 0) 0 to VEE Vdc Iout Output Current 50 100 mA TA Operating Temperature Range 0 to +75 °C Tstg Storage Temperature Range − Plastic − Ceramic −55 to +150 −55 to +165 °C − Continuous − Surge Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. Table 2. ELECTRICAL CHARACTERISTICS (VEE = −5.2 V ±5%) (Note 1) 0° Symbol 75° Min Max Min Max Min Max Unit Power Supply Current − 85 − 77 − 85 mA IinH Input Current High − 425 − 265 − 265 mA IinL Input Current Low 0.5 − 0.5 − 0.3 − mA VOH High Output Voltage −1.02 −0.84 −0.98 −0.81 −0.92 −0.735 Vdc VOL Low Output Voltage −1.95 −1.63 −1.95 −1.63 −1.95 −1.60 Vdc VIH High Input Voltage −1.17 −0.84 −1.13 −0.81 −1.07 −0.735 Vdc VIL Low Input Voltage −1.95 −1.48 −1.95 −1.48 −1.95 −1.45 Vdc IE Characteristic 25° 1. Each MECL 10H™ series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50 W resistor to −2.0 V. Table 3. AC PARAMETERS 0° Symbol 75° Min Max Min Max Min Max Propagation Delay Data Select 0.5 0.5 2.0 2.6 0.5 0.5 2.1 2.7 0.5 0.5 2.2 2.8 tr Rise Time 0.5 1.7 0.5 1.8 0.5 1.9 ns tf Fall Time 0.5 1.7 0.5 1.8 0.5 1.9 ns tpd Characteristic 25° Unit ns NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. http://onsemi.com 2 MC10H172 Table 4. TRUTH TABLE Enable Inputs Inputs E E1 E0 A L H H L H H L H L Outputs B Q1 0 Q1 1 Q1 2 Q1 3 Q0 0 Q0 1 Q0 2 Q0 3 L L L H H L L L L H L L H L L L L H L L H H L L L H L L L H L H H H H L L L H L L L H L L H L L L L L L H L L L L H L L L H L L L L L L L H X X X X L L L L L L L L X = Don’t Care ORDERING INFORMATION Package Shipping † MC10H172FN PLLC−20 46 Units / Rail MC10H172FNG PLLC−20 (Pb−Free) 46 Units / Rail MC10H172FNR2 PLLC−20 500 / Tape & Reel MC10H172FNR2G PLLC−20 (Pb−Free) 500 / Tape & Reel MC10H172L CDIP−16 25 Unit / Rail MC10H172P PDIP−16 25 Unit / Rail MC10H172PG PDIP−16 (Pb−Free) 25 Unit / Rail Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 3 MC10H172 PACKAGE DIMENSIONS 20 LEAD PLLC CASE 775−02 ISSUE E 0.007 (0.180) M T L−M B Y BRK −N− U N S 0.007 (0.180) M T L−M S S N S D −L− −M− Z W 20 D 1 V 0.007 (0.180) M T L−M S N S R 0.007 (0.180) M T L−M S N S Z T L−M S N H J 0.007 (0.180) M T L−M S −T− VIEW S SEATING PLANE F 0.007 (0.180) M T L−M S VIEW S N S N S K 0.004 (0.100) G S S K1 E G1 0.010 (0.250) S T L−M S VIEW D−D A C 0.010 (0.250) G1 X NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. DIMENSIONS IN INCHES. 3. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 4. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM −T−, SEATING PLANE. 5. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 6. DIMENSIONS IN THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). http://onsemi.com 4 DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.385 0.395 0.385 0.395 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 −−− 0.025 −−− 0.350 0.356 0.350 0.356 0.042 0.048 0.042 0.048 0.042 0.056 −−− 0.020 2_ 10 _ 0.310 0.330 0.040 −−− MILLIMETERS MIN MAX 9.78 10.03 9.78 10.03 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 −−− 0.64 −−− 8.89 9.04 8.89 9.04 1.07 1.21 1.07 1.21 1.07 1.42 −−− 0.50 2_ 10 _ 7.88 8.38 1.02 −−− N S MC10H172 PACKAGE DIMENSIONS B CDIP−16 L SUFFIX CERAMIC DIP PACKAGE CASE 620A−01 ISSUE O A A 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. 5 THIS DRAWING REPLACES OBSOLETE CASE OUTLINE 620−10. M 9 B L 1 8 16X 0.25 (0.010) E M DIM A B C D E F G H K L M N J T B F C K MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 −−− 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01 SEATING PLANE T N INCHES MIN MAX 0.750 0.785 0.240 0.295 −−− 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 G 16X 0.25 (0.010) M D T A PDIP−16 P SUFFIX PLASTIC DIP PACKAGE CASE 648−08 ISSUE R −A− 16 9 1 8 B F C NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. L S −T− H SEATING PLANE K G D M J 16 PL 0.25 (0.010) M T A M DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 MECL 10H and MECL 10K are trademarks of Motorola, Inc. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: [email protected] http://onsemi.com 5 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MC10H172/D