Vicor BCM6123T60E15A3T01 Isolated fixed-ratio dc-dc converter Datasheet

BCM® Bus Converter
BCM6123x60E15A3yzz
®
C
S
US
C
NRTL
US
Isolated Fixed-Ratio DC-DC Converter
Features & Benefits
Product Ratings
• Up to 130A continuous secondary current
• Up to 2867W/in3 power density
• 97.4% peak efficiency
• 2,250VDC isolation
• Parallel operation for multi-kW arrays
• OV, OC, UV, short circuit and thermal protection
• 6123 through-hole ChiP package
■■2.402” x 0.990” x 0.284”
(61.00mm x 25.14mm x 7.21mm)
•
PMBus™
management interface*
Typical Applications
• High End Computing Systems
• Automated Test Equipment
• Industrial Systems
• High Density Power Supplies
• Communications Systems
• Transportation
ISEC = up to 130A
VSEC = 13.5V (9 – 15V)
(no load)
K = 1/4
Product Description
The BCM6123x60E15A3yzz Bus Converter (BCM) is a high
efficiency Sine Amplitude Converter™ (SAC™), operating from
a 36 to 60VDC primary bus to deliver an isolated, ratiometric
secondary voltage from 9 to 15VDC.
The BCM6123x60E15A3yzz offers low noise, fast transient
response, and industry leading efficiency and power density. In
addition, it provides an AC impedance beyond the bandwidth of
most downstream regulators, allowing input capacitance normally
located at the input of a PoL regulator to be located at the primary
side of the BCM module. With a primary to secondary K factor
of 1/4, that capacitance value can be reduced by a factor of 16x,
resulting in savings of board area, material and total system cost.
Leveraging the thermal and density benefits of Vicor’s ChiP
packaging technology, the BCM module offers flexible thermal
management options with very low top and bottom side thermal
impedances. Thermally-adept ChiP-based power components,
enable customers to achieve low cost power system solutions
with previously unattainable system size, weight and efficiency
attributes, quickly and predictably.
* When used with D44TL1A0 and I13TL1A0 chipset
BCM® Bus Converter
Page 1 of 29
VPRI = 54V (36 – 60V)
Rev 1.3
07/2017
BCM6123x60E15A3yzz
Typical Application
BCM
TM
EN
enable/disable
switch
SW1
VAUX
F1
VPRI
+VPRI
+VSEC
–VPRI
–VSEC
CPRI
POL
GND
PRIMARY
SECONDARY
ISOLATION BOUNDRY
BCM6123x60E15A3y00 at Point of load
BCM
SER-OUT
SER-OUT
EN
SER-IN
enable/disable
switch
SER-IN
FUSE
VPRI
C
+VPRI
+VSEC
–VPRI
–VSEC
POL
I_BCM_ELEC
PRIMARY
SOURCE_RTN
SECONDARY
Digital
Supervisor
ISOLATION BOUNDRY
Digital Isolator
D44TL1A0
I13TL1A0
NC
PRI_OUT_A
SEC_IN_A
PRI_OUT_B
SEC_IN_B
TXD
PRI_IN_C
SEC_OUT_C
RXD
PRI_COM
SEC_COM
Host µC
VDDB
SER-IN
t
+
VDD
–
V
EXT
SER-OUT
SGND
SGND
PMBus
PMBus
SGND
SGND
SGND
BCM6123x60E15A3y01 at Point of load
BCM® Bus Converter
Page 2 of 29
Rev 1.3
07/2017
BCM6123x60E15A3yzz
Pin Configuration
TOP VIEW
1
2
+VSEC
A
A’ +VSEC
-VSEC1
B
B’ -VSEC2
-VSEC1
C
C’ -VSEC2
+VSEC
D
D’ +VSEC
+VSEC
E
E’
+VSEC
-VSEC1
F
F’
-VSEC2
-VSEC1
G
G’ -VSEC2
+VSEC
H
H’ +VSEC
+VPRI
I
I’
TM/SER-OUT
+VPRI
J
J’
EN
+VPRI
K
K’ VAUX/SER-IN
+VPRI
L
L’
-VPRI
6123 ChiP Package
Pin Descriptions
Power Pins
Pin Number
Signal Name
Type
Function
I1, J1, K1, L1
+VPRI
PRIMARY POWER
Positive primary transformer power terminal
L’2
-VPRI
PRIMARY POWER
RETURN
Negative primary transformer power terminal
A1, D1, E1, H1, A’2,
D’2, E’2, H’2
+VSEC
SECONDARY
POWER
Positive secondary transformer power terminal
B1, C1, F1, G1
B’2, C’2, F’2, G’2
-VSEC*
SECONDARY
POWER RETURN
Negative secondary transformer power terminal
Analog Control Signal Pins
Pin Number
Signal Name
Type
Function
I’2
TM
OUTPUT
J’2
EN
INPUT
K’2
VAUX
OUTPUT
Temperature Monitor; primary side referenced signals
Enables and disables power supply; primary side referenced signals
Auxilary Voltage Source; primary side referenced signals
PMBus Control Signal Pins
Pin Number
Signal Name
Type
Function
I’2
SER-OUT
OUTPUT
J’2
EN
INPUT
Enables and disables power supply; Primary side referenced signals
K’2
SER-IN
INPUT
UART receive pin; Primary side referenced signals
UART transmit pin; Primary side referenced signals
* For proper operation an external low impedance connection must be made between listed -VSEC1 and -VSEC2 terminals.
BCM® Bus Converter
Page 3 of 29
Rev 1.3
07/2017
BCM6123x60E15A3yzz
Part Ordering Information
Product
Function
Package
Size
Package
Mounting
Max Primary
Input Voltage
Range
Identifier
Max
Secondary
Voltage
Secondary
Output
Current
Temperature
Grade
Option
BCM
6123
x
60
E
15
A3
y
zz
61 = L
23 = W
T = TH
00 = Analog Ctrl
Bus Converter
Module
S = SMT
60V
15V
No Load
36 – 60V
130A
T = -40°C – 125°C
01 = PMBus Ctrl
M = -55°C – ­125°C
0R = Reversible Analog Ctrl
0P = Reversible PMBus Ctrl
All products shipped in JEDEC standard high profile (0.400” thick) trays (JEDEC Publication 95, Design Guide 4.10).
Standard Models
Product
Function
Package
Size
Package
Mounting
Max Primary
Input Voltage
Range
Identifier
Max
Secondary
Voltage
Secondary
Output
Current
Temperature
Grade
Option
BCM
6123
T
60
E
15
A3
T
00
BCM
6123
T
60
E
15
A3
T
01
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Parameter
Comments
+VPRI_DC to –VPRI_DC
Min
Max
Unit
-1
80
V
1
V/µs
VPRI_DC or VSEC_DC slew rate
(operational)
+VSEC_DC to –VSEC_DC
-1
TM / SER-OUT to –VPRI_DC
EN to –VPRI_DC
-0.3
VAUX / SER-IN to –VPRI_DC
BCM® Bus Converter
Page 4 of 29
Rev 1.3
07/2017
20
V
4.6
V
5.5
V
4.6
V
BCM6123x60E15A3yzz
Electrical Specifications
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
60
V
14
V
General Powertrain PRIMARY to SECONDARY Specification (Forward Direction)
Primary Input Voltage range,
(Continuous)
VPRI µController
PRI to SEC Input Quiescent Current
36
VPRI_DC
VµC_ACTIVE
IPRI_Q
VPRI_DC voltage where µC is initialized,
(ie VAUX = Low, powertrain inactive)
Disabled, EN Low, VPRI_DC = 54V
5
TINTERNAL ≤ 100ºC
10
VPRI_DC = 54V, TINTERNAL = 25ºC
PRI to SEC No Load
Power Dissipation
PRI to SEC Inrush Current Peak
PPRI_NL
IPRI_INR_PK
14.7
7
VPRI_DC = 54V
35.2
25
VPRI_DC = 36V to 60V
38
40
TINTERNAL ≤ 100ºC
DC Primary Input Current
Transformation Ratio
Secondary Output Current
(Continuous)
Secondary Output Current (Pulsed)
PRI to SEC Efficiency (Ambient)
IPRI_IN_DC
K
ηAMB
A
At ISEC_OUT_DC = 130A, TINTERNAL ≤ 100ºC
33
Primary to secondary, K = VSEC_DC / VPRI_DC, at no load
1/4
10ms pulse, 25% Duty cycle,
ISEC_OUT_AVG ≤ 50% rated ISEC_OUT_DC
VPRI_DC = 54V, ISEC_OUT_DC = 130A
96.2
VPRI_DC = 36V to 60V, ISEC_OUT_DC = 130A
95.2
VPRI_DC = 54V, ISEC_OUT_DC = 65A
96.5
97.4
95.8
96.5
130
A
145
A
97
%
ηHOT
VPRI_DC = 54V, ISEC_OUT_DC = 130A
PRI to SEC Efficiency
(Over Load Range)
η20%
26A < ISEC_OUT_DC < 130A
90
RSEC_COLD
VPRI_DC = 54V, ISEC_OUT_DC = 130A, TINTERNAL = -40°C
1.2
1.5
1.8
RSEC_AMB
VPRI_DC = 54V, ISEC_OUT_DC = 130A
1.6
1.95
2.3
RSEC_HOT
VPRI_DC = 54V, ISEC_OUT_DC = 130A, TINTERNAL = 100°C
2.2
2.5
2.8
FSW
Frequency of the Output Voltage Ripple = 2x FSW
0.9
0.95
1.0
VSEC_OUT_PP
CSEC_EXT = 0μF, ISEC_OUT_DC = 130A, VPRI_DC = 54V,
20MHz BW
Switching Frequency
Secondary Output Voltage Ripple
Secondary Output Leads Inductance
(Parasitic)
BCM® Bus Converter
Page 5 of 29
%
%
120
TINTERNAL ≤ 100ºC
Primary Input Leads Inductance
(Parasitic)
A
V/V
PRI to SEC Efficiency (Hot)
PRI to SEC Output Resistance
W
45
ISEC_OUT_DC
ISEC_OUT_PULSE
21.6
VPRI_DC = 36V to 60V, TINTERNAL = 25 ºC
VPRI_DC = 60V, CSEC_EXT = 3000μF,
RLOAD_SEC = 20% of full load current
mA
mΩ
MHz
mV
250
LPRI_IN_LEADS
Frequency 2.5MHz (double switching frequency),
Simulated lead model
6.7
nH
LSEC_OUT_LEADS
Frequency 2.5MHz (double switching frequency),
Simulated lead model
0.64
nH
Rev 1.3
07/2017
BCM6123x60E15A3yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
General Powertrain PRIMARY to SECONDARY Specification (Forward Direction) Cont.
Effective Primary Capacitance
(Internal)
CPRI_INT
Effective Value at 54VPRI_DC
11.2
µF
Effective Secondary Capacitance
(Internal)
CSEC_INT
Effective Value at 13.5VSEC_DC
140
µF
Effective Secondary Output
Capacitance (External)
CSEC_OUT_EXT
Excessive capacitance may drive module into SC
protection
Effective Secondary Output
Capacitance (External)
CSEC_OUT_AEXT
CSEC_OUT_AEXT Max = N * 0.5 * CSEC_OUT_EXT MAX, where
N = the number of units in parallel
3000
µF
560
ms
Powertrain Protection PRIMARY to SECONDARY (Forward Direction)
Auto Restart Time
tAUTO_RESTART
Startup into a persistent fault condition. Non-Latching
fault detection given VPRI_DC > VPRI_UVLO+
490
Primary Overvoltage
Lockout Threshold
VPRI_OVLO+
63
67
71
V
Primary Overvoltage
Recovery Threshold
VPRI_OVLO-
61
65
69
V
Primary Overvoltage
Lockout Hysteresis
VPRI_OVLO_HYST
2
V
Primary Overvoltage
Lockout Response Time
tPRI_OVLO
100
µs
Primary Soft-Start Time
tPRI_SOFT-START
1
ms
Secondary Output Overcurrent
Trip Threshold
ISEC_OUT_OCP
Secondary Output Overcurrent
Response Time Constant
tSEC_OUT_OCP
Secondary Output Short Circuit
Protection Trip Threshold
ISEC_OUT_SCP
Secondary Output Short Circuit
Protection Response Time
tSEC_OUT_SCP
Overtemperature
Shutdown Threshold
BCM® Bus Converter
Page 6 of 29
tOTP+
From powertrain active. Fast Current limit protection
disabled during Soft-Start
145
Effective internal RC filter
180
3
195
Rev 1.3
07/2017
125
A
ms
A
1
Temperature sensor located inside controller IC
225
µs
°C
BCM6123x60E15A3yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Powertrain Supervisory Limits PRIMARY to SECONDARY (Forward Direction)
Primary Overvoltage
Lockout Threshold
VPRI_OVLO+
64
66
68
V
Primary Overvoltage
Recovery Threshold
VPRI_OVLO-
60
64
66
V
Primary Overvoltage
Lockout Hysteresis
VPRI_OVLO_HYST
2
V
Primary Overvoltage
Lockout Response Time
tPRI_OVLO
100
µs
Primary Undervoltage
Lockout Threshold
VPRI_UVLO-
26
28
30
V
Primary Undervoltage
Recovery Threshold
VPRI_UVLO+
28
30
32
V
Primary Undervoltage
Lockout Hysteresis
VPRI_UVLO_HYST
2
V
tPRI_UVLO
100
µs
20
ms
Primary Undervoltage
Lockout Response Time
Primary Undervoltage Startup Delay
From VPRI_DC = VPRI_UVLO+ to powertrain active, EN
tPRI_UVLO+_DELAY floating, (i.e One time Startup delay form application
of VPRI_DC to VSEC_DC)
Secondary Output Overcurrent
Trip Threshold
ISEC_OUT_OCP
Secondary Output Overcurrent
Response Time Constant
tSEC_OUT_OCP
Overtemperature
Shutdown Threshold
tOTP+
Overtemperature
Recovery Threshold
tOTP–
Undertemperature
Shutdown Threshold
tUTP
Undertemperature Restart Time
BCM® Bus Converter
Page 7 of 29
tUTP_RESTART
164
Effective internal RC filter
Temperature sensor located inside controller IC
176
3
°C
110
Temperature sensor located inside controller IC;
Protection not available for M-Grade units.
Rev 1.3
07/2017
A
ms
125
105
Startup into a persistent fault condition. Non-Latching
fault detection given VPRI_DC > VPRI_UVLO+
188
3
115
°C
-45
°C
s
BCM6123x60E15A3yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
15
V
General Powertrain SECONDARY to PRIMARY Specification (Reverse Direction)
Secondary Input Voltage Range,
(Continuous)
9
VSEC_DC
VSEC_DC = 13.5V, TINTERNAL = 25ºC
SEC to PRI No Load
Power Dissipation
PSEC_NL
DC Secondary Input Current
ISEC_IN_DC
Primary Output Current (Continuous)
IPRI_OUT_DC
Primary Output Current (Pulsed)
IPRI_OUT_PULSE
14.7
7
VSEC_DC = 13.5V
21.6
35.2
VSEC_DC = 9V to 15V, TINTERNAL = 25ºC
25
VSEC_DC = 9V to 15V
38
At IPRI_DC = 32.5A, TINTERNAL ≤ 100ºC
10ms pulse, 25% Duty cycle,
IPRI_OUT_AVG ≤ 50% rated IPRI_OUT_DC
VSEC_DC = 13.5V, IPRI_OUT_DC = 32.5A
96.2
VSEC_DC = 9V to 15V, IPRI_OUT_DC= 32.5A
95.2
132.5
A
32.5
A
39
A
97.0
SEC to PRI Efficiency (Ambient)
ηAMB
VSEC_DC = 13.5V, IPRI_OUT_DC = 16.25A
96.5
97.4
SEC to PRI Efficiency (Hot)
ηHOT
VSEC_DC = 13.5V, IPRI_OUT_DC = 32.5A
95.8
96.5
SEC to PRI Efficiency
(Over Load Range)
η20%
6.5A < IPRI_OUT_DC < 32.5A
92
RPRI_COLD
VSEC_DC = 13.5V, IPRI_OUT_DC = 32.5A,
TINTERNAL = -40°C
25
30
35
RPRI_AMB
VSEC_DC = 13.5V, IPRI_OUT_DC = 32.5A
31
38
45
RPRI_HOT
VSEC_DC = 13.5V, IPRI_OUT_DC = 32.5A, TINTERNAL = 100°C
41
47
53
SEC to PRI Output Resistance
Primary Output Voltage Ripple
VPRI_OUT_PP
CPRI_OUT_EXT = 0μF, IPRI_OUT_DC = 32.5A,
VSEC_DC = 13.5V, 20MHz BW
TINTERNAL ≤ 100ºC
BCM® Bus Converter
Page 8 of 29
%
%
%
500
mΩ
mV
1000
Rev 1.3
07/2017
W
BCM6123x60E15A3yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
100
µF
17.3
V
Protection SECONDARY to PRIMARY (Reverse Direction)
Effective Primary Output
Capacitance (External)
CPRI_OUT_EXT
Excessive capacitance may drive module
into SC protection
Secondary Overvoltage
Lockout Threshold
VSEC_OVLO+
Module latched shutdown with VPRI_DC < VPRI_UVLO-_R
Secondary Overvoltage
Lockout Response Time
tPRI_OVLO
Secondary Undervoltage
Lockout Threshold
VSEC_UVLO-
Secondary Undervoltage
Lockout Response Time
tSEC_UVLO
16
16.5
100
Module latched shutdown with VPRI_DC < VPRI_UVLO-_R
6.5
7
µs
7.5
100
V
µs
Primary Undervoltage Lockout
Threshold
VPRI_UVLO-_R
Applies only to reversilbe products in forward and in
reverse direction; IPRI_DC ≤ 20 while
VPRI_UVLO-_R < VPRI_DC < VPRI_MIN
26
28
30
V
Primary Undervoltage
Recovery Threshold
VPRI_UVLO+_R
Applies only to reversilbe products in forward and in
reverse direction;
28
30
32
V
Primary Undervoltage
Lockout Hysteresis
VPRI_UVLO_HYST_R
Applies only to reversilbe products in forward and in
reverse direction;
Primary Output Overcurrent
Trip Threshold (Analog)
IPRI_OUT_OCP
Module latched shutdown with VPRI_DC < VPRI_UVLO-_R
Primary Output Overcurrent
Response Time Constant (Analog)
tPRI_OUT_OCP
Effective internal RC filter
Primary Short Circuit Protection
Trip Threshold
IPRI_SCP
Primary Short Circuit Protection
Response Time
tPRI_SCP
Module latched shutdown with VPRI_DC < VPRI_UVLO-_R
36.25
45
V
56.25
3
IPRI_OUT_OCP
Module latched shutdown with VPRI_DC < VPRI_UVLO-_R
48.75
Primary Output Overcurrent
Response Time Constant (PM Bus)
tPRI_OUT_OCP
Effective internal RC filter
Rev 1.3
07/2017
41
A
ms
A
1
Primary Output Overcurrent
Trip Threshold (PM Bus)
BCM® Bus Converter
Page 9 of 29
2
44
3
µs
47
A
ms
Secondary Output Current (A)
BCM6123x60E15A3yzz
140
120
100
80
60
40
20
0
20
30
40
50
60
70
80
90
100
110
120
Case Temperature (°C)
Top only at temperature
Top and leads at temperature
Leads at temperature
Top, leads and belly at temperature
2300
2200
2100
2000
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
800
Secondary Output Current (A)
Secondary Output Power (W)
Figure 1 — Specified thermal operating area
36
38
41
43
46
48
50
53
55
58
60
200
150
100
50
0
36
38
41
Primary Input Voltage (V)
PSEC_OUT_DC
43
46
ISEC_OUT_DC
PSEC_OUT_PULSE
Secondary Output Capacitance
(% Rated CSEC_EXT_MAX)
Figure 2 — Specified electrical operating area using rated RSEC_HOT
110
100
90
80
70
60
50
40
30
20
10
0
0
20
40
60
80
Secondary Output Current (% ISEC_DC)
Figure 3 — Specified Primary start-up into load current and external capacitance
BCM® Bus Converter
Page 10 of 29
48
50
53
Primary Input Voltage (V)
Rev 1.3
07/2017
100
ISEC_OUT_PULSE
55
58
60
BCM6123x60E15A3yzz
Analog Control Signal Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Temperature Monitor
• The TM pin is a standard analog I/O configured as an output from an internal µC.
• The TM pin monitors the internal temperature of the controller IC within an accuracy of ±5°C.
• µC 250kHz PWM output internally pulled high to 3.3V.
SIGNAL TYPE
STATE
Startup
ATTRIBUTE
Powertrain active to TM
time
TM duty cycle
TM current
SYMBOL
CONDITIONS / NOTES
MIN
TYP
MAX
100
tTM
18.18
TMPWM
ITM
UNIT
µs
68.18
%
4
mA
Recommended External filtering
DIGITAL
OUTPUT
Regular
Operation
TM capacitance (external)
CTM_EXT
Recommended External filtering
0.01
µF
TM resistance (external)
RTM_EXT
Recommended External filtering
1
kΩ
ATM
10
mV / °C
VTM_AMB
1.27
V
Specifications using recommended filter
TM gain
TM voltage reference
TM voltage ripple
VTM_PP
RTM_EXT = 1kΩ, CTM_EXT = 0.01uF,
VPRI_DC = 54V, ISEC_DC = 130A
28
TINTERNAL ≤ 100ºC
mV
40
Enable / Disable Control
•
•
•
•
The EN pin is a standard analog I/O configured as an input to an internal µC.
It is internally pulled high to 3.3V.
When held low the BCM internal bias will be disabled and the powertrain will be inactive.
In an array of BCMs, EN pins should be interconnected to synchronize startup.
SIGNAL TYPE
STATE
Startup
ANALOG
INPUT
Regular
Operation
ATTRIBUTE
EN to powertrain
active time
tEN_START
CONDITIONS / NOTES
MIN
VPRI_DC > VPRI_UVLO+, EN held low both
conditions satisfied for T > tPRI_UVLO+_DELAY
TYP
MAX
250
VEN_TH
EN resistance (internal)
REN_INT
Internal pull up resistor
VEN_DISABLE_TH
Rev 1.3
07/2017
UNIT
µs
2.3
EN voltage threshold
EN disable threshold
BCM® Bus Converter
Page 11 of 29
SYMBOL
V
1.5
kΩ
1
V
BCM6123x60E15A3yzz
Analog Control Signal Characteristics (Cont.)
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Auxiliary Voltage Source
• The VAUX pin is a standard analog I/O configured as an output from an internal µC.
• VAUX is internally connected to µC output as internally pulled high to a 3.3V regulator with 2% tolerance, a 1% resistor of 1.5kΩ.
• VAUX can be used as a “Ready to process full power” flag. This pin transitions VAUX voltage after a 2ms delay from the start of powertrain activating,
signaling the end of softstart.
• VAUX can be used as “Fault flag”. This pin is pulled low internally when a fault protection is detected.
SIGNAL TYPE
STATE
Startup
ANALOG
OUTPUT
Regular
Operation
Fault
BCM® Bus Converter
Page 12 of 29
ATTRIBUTE
SYMBOL
Powertrain active
to VAUX time
tVAUX
VAUX voltage
VVAUX
VAUX available current
IVAUX
CONDITIONS / NOTES
MIN
TYP
2
Powertrain active to VAUX High
2.8
VAUX voltage ripple
VVAUX_PP
VAUX capacitance
(External)
CVAUX_EXT
VAUX resistance (external)
RVAUX_EXT
VAUX fault response time
tVAUX_FR
MAX
ms
3.3
V
4
mA
50
TINTERNAL ≤ 100ºC
100
0.01
VPRI_DC < VµC_ACTIVE
From fault to VVAUX = 2.8V, CVAUX = 0pF
Rev 1.3
07/2017
1.5
UNIT
mV
µF
kΩ
10
µs
BCM6123x60E15A3yzz
PMBus™ Control Signal Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
UART SER-IN / SER-OUT Pins
• Universal Asynchronous Receiver/Transmitter (UART) pins.
• The BCM communication version is not intended to be used without a Digital Supervisor.
• Isolated I2C communication and telemetry is available when using Vicor Digital Isolator and Vicor Digital Supervisor. Please see specific product data sheet
for more details.
• UART SER-IN pin is internally pulled high using a 1.5kΩ to 3.3V.
SIGNAL TYPE
STATE
GENERAL I/O
ATTRIBUTE
SYMBOL
Baud rate
BRUART
CONDITIONS / NOTES
MIN
TYP
MAX
750
Rate
UNIT
Kbit/s
SER-IN Pin
SER-IN input voltage range
VSER-IN_IH
2.3
V
VSER-IN_IL
DIGITAL
INPUT
Regular
Operation
V
SER-IN rise time
tSER-IN_RISE
10% to 90%
400
ns
SER-IN fall time
tSER-IN_FALL
10% to 90%
25
ns
SER-IN RPULLUP
RSER-IN_PLP
Pull up to 3.3V
1.5
kΩ
SER-IN external capacitance
CSER-IN_EXT
400
pF
SER-OUT Pin
VSER-OUT_OH
0mA ≥ IOH ≥ -4mA
VSER-OUT_OL
0mA ≤ IOL ≤ 4mA
SER-OUT rise time
tSER-OUT_RISE
10% to 90%
55
ns
SER-OUT fall time
tSER-OUT_FALL
10% to 90%
45
ns
SER-OUT output
voltage range
DIGITAL
OUTPUT
1
SER-OUT source current
ISER-OUT
SER-OUT output impedance
ZSER-OUT
2.8
V
0.5
VSER-OUT = 2.8V
6
V
mA
Ω
120
Enable / Disable Control
•
•
•
•
•
The EN pin is a standard analog I/O configured as an input to an internal µC.
It is internally pulled high to 3.3V.
When held low the BCM internal bias will be disabled and the powertrain will be inactive.
In an array of BCMs, EN pins should be interconnected to synchronize startup.
Enable / disable command will have no effect if the EN pin is disabled.
SIGNAL TYPE
ANALOG
INPUT
STATE
ATTRIBUTE
SYMBOL
CONDITIONS / NOTES
Startup
EN to powertrain active time
tEN_START
VPRI_DC > VPRI_UVLO+,
EN held low both conditions satisfied
for t > tPRI_UVLO+_DELAY­­
EN voltage threshold
VENABLE
EN resistance (Internal)
REN_INT
Regular
Operation
EN disable threshold
BCM® Bus Converter
Page 13 of 29
VEN_DISABLE_TH
Rev 1.3
07/2017
MIN
TYP
MAX
250
µs
2.3
Internal pull up resistor
UNIT
V
1.5
kΩ
1
V
BCM6123x60E15A3yzz
PMBus™ Reported Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Monitored Telemetry
• The BCM communication version is not intended to be used without a Digital Supervisor.
DIGITAL SUPERVISOR
PMBusTM READ COMMAND
ACCURACY
(RATED RANGE)
FUNCTIONAL
REPORTING RANGE
UPDATE
RATE
REPORTED UNITS
Input voltage
(88h) READ_VIN
±5% (LL - HL)
28V to 66V
100µs
VACTUAL = VREPORTED x 10-1
Input current
(89h) READ_IIN
±20% (10 - 20% of FL)
±5% (20 - 133% of FL)
-44A to 44A
100µs
IACTUAL = IREPORTED x 10-2
Output voltage [1]
(8Bh) READ_VOUT
±5%(LL - HL)
7.0V to 16.5V
100µs
VACTUAL = VREPORTED x 10-1
Output current
(8Ch) READ_IOUT
±20% (10 - 20% of FL)
±5% (20 - 133% of FL)
-176A to 176A
100µs
IACTUAL = IREPORTED x 10-2
Output resistance
(D4h) READ_ROUT
±5% (50 - 100% of FL) at NL
±10% (50 - 100% of FL)(LL - HL)
1000u to 3000u
100ms
RACTUAL = RREPORTED x 10-5
(8Dh) READ_TEMPERATURE_1
±7°C (Full Range)
- 55ºC to 130ºC
100ms
TACTUAL = TREPORTED
ATTRIBUTE
Temperature [2]
[1]
[2]
Default READ Output Voltage returned when unit is disabled = -300V.
Default READ Temperature returned when unit is disabled = -273°C.
Variable Parameter
• Factory setting of all below Thresholds and Warning limits are 100% of listed protection values.
• Variables can be written only when module is disabled either EN pulled low or VIN < VIN_UVLO-.
• Module must remain in a disabled mode for 3ms after any changes to the below variables allowing ample time to commit changes to EEPROM.
ATTRIBUTE
DIGITAL SUPERVISOR
PMBus™ COMMAND [3]
Input / Output Overvoltage
Protection Limit
(55h) VIN_OV_FAULT_LIMIT
Input / Output Overvoltage
Warning Limit
(57h) VIN_OV_WARN_LIMIT
Input / Output Undervoltage
Protection Limit
(D7h) DISABLE_FAULTS
CONDITIONS / NOTES
VIN_OVLO- is automatically 3%
lower than this set point
Can only be disabled to a preset
default value
ACCURACY
(RATED RANGE)
FUNCTIONAL
REPORTING
RANGE
DEFAULT
VALUE
±5% (LL - HL)
28V to 66V
100%
±5% (LL - HL)
28V to 66V
100%
±5% (LL - HL)
28V or 66V
100%
Input Overcurrent
Protection Limit
(5Bh) IIN_OC_FAULT_LIMIT
±20% (10 - 20% of FL)
±5% (20 - 133% of FL)
0 to 44A
100%
Input Overcurrent
Warning Limit
(5Dh) IIN_OC_WARN_LIMIT
±20% (10 - 20% of FL)
±5% (20 - 133% of FL)
0 to 44A
100%
Overtemperature
Protection Limit
(4Fh) OT_FAULT_LIMIT
±7°C (Full Range)
0 to 125°C
100%
Overtemperature
Warning Limit
(51h) OT_WARN_LIMIT
±7°C (Full Range)
0 to 125°C
100%
±50µs
0 to 100ms
0ms
Turn on Delay
[3]
(60h) TON_DELAY
Additional time delay to the
Undervoltage Startup Delay
Refer to Digital Supervisor datasheet for complete list of supported commands.
BCM® Bus Converter
Page 14 of 29
Rev 1.3
07/2017
BCM® Bus Converter
Page 15 of 29
VAUX
TM
OUTPUT
OUTPUT
OUTPUT
EN
+VPRI
+VSEC
BIDIR
INPUT
VµC_ACTIVE
Rev 1.3
07/2017
STARTUP
tVAUX
tPRI_UVLO+_DELAY
VPRI_UVLO+
VPRI_OVLO+
VNOM
OVER VOLTAGE
VPRI_UVLO-
VPRI_OVLO-
up
ll u
N
ER
T
-O L P
PU
OV
RN NA
T
T
U
T TER
OU
PU E
U T IN
ZE RY ON
I N AG
I
P
L
RY LT
IN U X
IA D A N
IT ON UR MA VO
DC V A
N
I_
I
T
I
R
C
PR
VP N &
µc SE
E
tAUTO-RESTART
ENABLE CONTROL
OVER CURRENT
>
tPRI_UVLO+_DELAY
tSEC_OUT_SCP
SHUTDOWN
GE
NT
TA
H
L
E
W G
EV
VO
LO HI
S
T F
IT
D ED
RE
U
U
F
E
P
L
L
C
UT
IN N-O
IR
UL PUL
P
C
Y
P
R
T
IN
E
E
A R TU
BL ABL
OR
DC
M
I
I_
A
H
R
S
PR
VP
EN EN
RT
TA
BCM6123x60E15A3yzz
BCM Module Timing diagram
BCM6123x60E15A3yzz
High Level Functional State Diagram
Conditions that cause state transitions are shown along arrows. Sub-sequence activities listed inside the state bubbles.
Application
of input voltage to VPRI_DC
VµC_ACTIVE < VPRI_DC < VPRI_UVLO+
STANDBY SEQUENCE
VPRI_DC > VPRI_UVLO+
STARTUP SEQUENCE
TM Low
TM Low
EN High
EN High
VAUX Low
VAUX Low
Powertrain Stopped
Powertrain Stopped
ENABLE falling edge,
or OTP detected
Fault
Autorecovery
FAULT
SEQUENCE
TM Low
EN High
VAUX Low
Input OVLO or UVLO,
Output OCP,
or UTP detected
ENABLE falling edge,
or OTP detected
Input OVLO or UVLO,
Output OCP,
or UTP detected
Powertrain Stopped
Short Circuit detected
BCM® Bus Converter
Page 16 of 29
tPRI_UVLO+_DELAY
expired
ONE TIME DELAY
INITIAL STARTUP
Rev 1.3
07/2017
SUSTAINED
OPERATION
TM PWM
EN High
VAUX High
Powertrain Active
BCM6123x60E15A3yzz
Application Characteristics
PRI to SEC, Full Load Efficiency (%)
PRI to SEC, Power Dissipation (W)
Product is mounted and temperature controlled via top side cold plate, unless otherwise noted. All data presented in this section are collected data from
primary sourced units processing power in forward direction. See associated figures for general trend data.
24
22
20
18
16
14
12
10
8
6
36
39
41
44
47
49
52
55
57
60
98.0
97.5
97.0
96.5
96.0
-40
-20
0
Primary Input Voltage (V)
TTOP SURFACE CASE:
- 40°C
25°C
90°C
VPRI:
Figure 4 — No load power dissipation vs. VPRI_DC
60
80
100
36V
54V
60V
80
98
PRI to SEC,
Power Dissipation (W)
PRI to SEC, Efficiency (%)
40
Figure 5 — Full load efficiency vs. temperature; VPRI_DC
100
96
94
92
90
88
86
70
60
50
40
30
20
10
0
84
0
13
26
39
52
65
78
91
104
117
0
130
13
VPRI:
36V
54V
26
39
VPRI:
60V
Figure 6 — Efficiency at TCASE = -40°C
52
65
78
91
104
117
130
117
130
Secondary Output Current (A)
Secondary Output Current (A)
36V
54V
60V
Figure 7 — Power dissipation at TCASE = -40°C
100
80
98
PRI to SEC,
Power Dissipation (W)
PRI to SEC, Efficiency (%)
20
Case Temperature (ºC)
96
94
92
90
88
86
70
60
50
40
30
20
10
0
84
0
13
26
39
52
65
78
91
104
117
0
130
36V
Figure 8 — Efficiency at TCASE = 25°C
BCM® Bus Converter
Page 17 of 29
54V
26
39
52
65
78
91
104
Load Current (A)
Load Current (A)
VPRI:
13
VPRI:
60V
36V
54V
Figure 9 — Power dissipation at TCASE = 25°C
Rev 1.3
07/2017
60V
BCM6123x60E15A3yzz
80
98
PRI to SEC,
Power Dissipation (W)
PRI to SEC, Efficiency (%)
100
96
94
92
90
88
86
70
60
50
40
30
20
10
0
84
0
13
25
38
50
63
75
88
100
113
0
125
13
36V
54V
VPRI:
60V
50
63
75
88
100
113
125
36V
54V
117
130
60V
Figure 11 — Power dissipation at TCASE = 80°C
3
200
Voltage Ripple (mVPK-PK)
PRI to SEC, Output Resistance (mΩ)
Figure 10 — Efficiency at TCASE = 80°C
2
1
0
38
Secondary Output Current (A)
Secondary Output Current (A)
VPRI:
25
175
150
125
100
75
50
25
0
-40
-20
0
20
40
60
80
100
26
39
52
65
78
91
104
VPRI:
54V
130A
Figure 12 — RSEC vs. temperature; Nominal VPRI_DC
ISEC_DC = 125A at TCASE = 80°C
BCM® Bus Converter
Page 18 of 29
13
Load Current (A)
Case Temperature (°C)
ISEC:
0
Figure 13 — VSEC_OUT_PP vs. ISEC_DC ; No external CSEC_OUT_EXT. Board
mounted module, scope setting: 20MHz analog BW
Rev 1.3
07/2017
BCM6123x60E15A3yzz
Figure 14 — Full load ripple, 2700µF CPRI_IN_EXT; No external
CSEC_OUT_EXT. Board mounted module, scope setting:
20MHz analog BW
Figure 15 — 0A – 130A transient response:
CPRI_IN_EXT = 2700µF, no external CSEC_OUT_EXT
Figure 16 — 130A – 0A transient response:
CPRI_IN_EXT = 2700µF, no external CSEC_OUT_EXT
Figure 17 — Start up from application of VPRI_DC= 54V, 20% IOUT,
100% CSEC_OUT_EXT
Figure 18 — Start up from application of EN with pre-applied
VPRI_DC = 54V, 20% ISEC_DC, 100% CSEC_OUT_EXT
BCM® Bus Converter
Page 19 of 29
Rev 1.3
07/2017
BCM6123x60E15A3yzz
General Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Mechanical
Length
L
60.87 / [2.396] 61.00 / [2.402] 61.13 / [2.407]
mm/[in]
Width
W
24.76 / [0.975] 25.14 / [0.990] 25.52 / [1.005]
mm/[in]
Height
H
7.11 / [0.280]
mm/[in]
Volume
Vol
Weight
W
Lead Finish
Without Heatsink
7.21 / [0.284]
7.31 / [0.288]
cm3/[in3]
11.06 / [0.675]
41 / [1.45]
g/[oz]
Nickel
0.51
2.03
Palladium
0.02
0.15
Gold
0.003
0.051
-40
125
µm
Thermal
Operating Temperature
TINTERNAL
BCM6123x60E15A3yzz (T-Grade)
Thermal Resistance Top Side
θINT-TOP
Estimated thermal resistance to maximum
temperature internal component from
isothermal top
1.26
°C/W
Estimated thermal resistance to
maximum temperature internal
component from isothermal leads
1.21
°C/W
Estimated thermal resistance to
maximum temperature internal
component from isothermal bottom
1.03
°C/W
34
Ws/°C
Thermal Resistance Leads
Thermal Resistance Bottom Side
θINT-LEADS
θINT-BOTTOM
Thermal Capacity
°C
Assembly
Storage Temperature
ESD Withstand
BCM® Bus Converter
Page 20 of 29
BCM6123x60E15A3yzz (T-Grade)
-55
ESDHBM
Human Body Model, “ESDA / JEDEC JDS-001-2012” Class I-C (1kV to < 2kV)
ESDCDM
Charge Device Model, “JESD 22-C101-E” Class II (200V to < 500V)
Rev 1.3
07/2017
125
°C
BCM6123x60E15A3yzz
General Characteristics (Cont.)
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
135
°C
Soldering [1]
Peak Temperature Top Case
Safety
Isolation voltage / Dielectric Test
VHIPOT
PRIMARY to SECONDARY
2,250
PRIMARY to CASE
2,250
SECONDARY to CASE
707
Isolation Capacitance
CPRI_SEC
Unpowered Unit
620
Insulation Resistance
RPRI_SEC
At 500VDC
10
MTBF
VDC
780
MIL-HDBK-217Plus Parts Count - 25°C
Ground Benign, Stationary, Indoors /
Computer
4.45
MHrs
Telcordia Issue 2 - Method I Case III; 25°C
Ground Benign, Controlled
7.01
MHrs
cURus UL 60950-1
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
[1]
Product is not intended for reflow solder attach.
BCM® Bus Converter
Page 21 of 29
pF
MΩ
cTÜVus EN 60950-1
Agency Approvals / Standards
940
Rev 1.3
07/2017
BCM6123x60E15A3yzz
PMBus™ System Diagram
-OUT
BCM
PRI-COM
VDDB
RXD3
VDD
RXD1
TXD4
VDD
TXD3
10 kΩ
Digital
Supervisor
D44TL1A0
FDG6318P
R2
10 kΩ
NC
NC
NC
SSTOP
3 kΩ
SDA
NC
RXD4
RXD2
SEC-COM
SDA
NC
SCL
RXD1
5V EXT
3 kΩ
EN Control
3.3V, at least 20mA
when using 4xDISO
Ref to Digital Isolator
datasheet for more details
VDD
CP
D
Q
SGND
D
Flip-flop
74LVC1G74DC
NC
SEC-OUT-C
SADDR
PRI-IN-C
NC
-IN BCM
SEC-IN-B
PRI-OUT-B
TX D 1 ’
NC
SER-OUT
SEC-IN-A
PRI-OUT-A
TXD1
SER-IN
TXD2
BCM EN
NC
Digital Isolator
I13TL1A0
SGND
SCL
VCC
SD
RD
Q
SDA
SCL
Host
µc
PMBus
R1
SGND
The PMBus communication enabled bus converter provides accurate telemetry monitoring and reporting, threshold and warning
limits adjustment, in addition to corresponding status flags.
The BCM internal µC is referenced to primary ground. The Digital Isolator allows UART communication interface with the host Digital
Supervisor at typical speed of 750kHz across the isolation barrier. One of the advantages of the Digital Isolator is its low power
consumption. Each transmission channel is able to draw its internal bias circuitry directly from the input signal being transmitted to
the output with minimal to no signal distortion.
The Digital Supervisor provides the host system µC with access to an array of up to 4 BCMs. This array is constantly polled for status
by the Digital Supervisor. Direct communication to individual BCM is enabled by a page command. For example, the page (0x00)
prior to a telemetry inquiry points to the Digital Supervisor data and pages (0x01 – 0x04) prior to a telemetry inquiry points to the
array of BCMs connected data. The Digital Supervisor constantly polls the BCM data through the UART interface.
The Digital Supervisor enables the PMBus compatible host interface with an operating bus speed of up to 400kHz. The Digital
Supervisor follows the PMBus command structure and specification.
Please refer to the Digital Supervisor data sheet for more details.
BCM® Bus Converter
Page 22 of 29
Rev 1.3
07/2017
BCM6123x60E15A3yzz
Sine Amplitude Converter™ Point of Load Conversion
RSEC
0.53nH
LPRI_IN_LEADS = 6.7nH
+
CPRI_INT_ESR
0.75mΩ
CPRI_INT C
IN
11.2µF
VVPRIIN
1.96mΩ
I ISEC
RCIN
IPRI_Q
IQ
270mA
+
+
–
K
RCCSEC_INT_ESR
OUT
10mΩ
V•I
1/4 • ISEC
LSEC_OUT_LEADS = 0.64nH
ROUT
OUT
+
60.4µΩ
1/4 • VPRI
CSEC_INT
COUT
140µF
–
VSEC
VOUT
–
–
Figure 19 — BCM module AC model
The Sine Amplitude Converter (SAC™) uses a high frequency
resonant tank to move energy from Primary to secondary and
vice versa. The resonant LC tank, operated at high frequency,
is amplitude modulated as a function of primary voltage and
secondary current. A small amount of capacitance embedded in
the primary and secondary stages of the module is sufficient for full
functionality and is key to achieving high power density.
The use of DC voltage transformation provides additional
interesting attributes. Assuming that RSEC = 0Ω and IPRI_Q = 0A,
Eq. (3) now becomes Eq. (1) and is essentially load independent,
resistor R is now placed in series with PRI.
The BCM6123x60E15A3yzz SAC can be simplified into the
preceeding model.
R
R
Vin
V
PRI
At no load:
VSEC = VPRI • K
VSEC
The relationship between VPRI and VSEC becomes:
VSEC = (VPRI – IPRI • R) • K
In the presence of load, VSEC is represented by:
VSEC = VPRI • K – ISEC • RSEC
(3)
IPRI – IPRI_Q
K
VSEC = VPRI • K – ISEC • R • K2
(4)
RSEC represents the impedance of the SAC, and is a function
of the RDSON of the primary and secondary MOSFETs and the
winding resistance of the power transformer. PRI_Q represents the
quiescent current of the SAC control, gate drive circuitry,
and core losses.
BCM® Bus Converter
Page 23 of 29
(5)
Substituting the simplified version of Eq. (4)
(IPRI_Q is assumed = 0A) into Eq. (5) yields:
and IOUT is represented by:
ISEC =
V
Vout
SEC
Figure 20 — K = 1/4 Sine Amplitude Converter
with series primary resistor
(2)
VPRI
SAC™
SAC
1/4
KK==1/32
(1)
K represents the “turns ratio” of the SAC.
Rearranging Eq (1):
K=
+
–
(6)
This is similar in form to Eq. (3), where RSEC is used to represent the
characteristic impedance of the SAC™. However, in this case a real
R on the primary side of the SAC is effectively scaled by K 2 with
respect to the secondary.
Assuming that R = 1Ω, the effective R as seen from the secondary
side is 62.5mΩ, with K = 1/4 .
Rev 1.3
07/2017
BCM6123x60E15A3yzz
A similar exercise should be performed with the additon of a
capacitor or shunt impedance at the primary of the SAC. A switch
in series with VPRI is added to the circuit. This is depicted in
Figure 21.
SS
VVin
PRI
+
–
SAC™
SAC
K = 1/4
K = 1/32
C
VVout
SEC
Low impedance is a key requirement for powering a high‑current,
low-voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a SAC
between the regulation stage and the point of load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, the benefits are
not useful if the series impedance of the SAC is too high. The
impedance of the SAC must be low, i.e., well beyond the crossover
frequency of the system.
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables small magnetic
components because magnetizing currents remain low. Small
magnetics mean small path lengths for turns. Use of low loss core
material at high frequencies also reduces core losses.
Figure 21 — Sine Amplitude Converter with primary capacitor
The two main terms of power loss in the BCM module are:
A change in VPRI with the switch closed would result in a change in
capacitor current according to the following equation:
IC (t) = C
dVPRI
nn
Resistive loss (RSEC): refers to the power loss across the BCM
module modeled as pure resistive impedance.
(7)
dt
Therefore,
PSEC_OUT = PPRI_IN – PDISSIPATED = PPRI_IN – PPRI_NL – PRSEC (11)
(8)
IC = ISEC • K
The above relations can be combined to calculate the overall
module efficiency:
substituting Eq. (1) and (8) into Eq. (7) reveals:
C
K
2
•
dVSEC
dt
(9)
η=
The equation in terms of the secondary has yielded a K 2 scaling
factor for C, specified in the denominator of the equation.
A K factor less than unity results in an effectively larger capacitance
on the secondary when expressed in terms of the primary. With a
K = 1/4 as shown in Figure 21, C = 1µF would appear as
C = 16µF when viewed from the secondary.
=
PSEC_OUT
PPRI_IN
Rev 1.3
07/2017
=
PPRI_IN – PPRI_NL – PRSEC
PPRI_IN
VPRI • IPRI – PPRI_NL – (ISEC)2 • RSEC
= 1–
BCM® Bus Converter
Page 24 of 29
(10)
PDISSIPATED = PPRI_NL + PRSEC
Assume that with the capacitor charged to VPRI, the switch is
opened and the capacitor is discharged through the idealized
SAC. In this case,
ISEC =
nn
No load power dissipation (PPRI_NL): defined as the power used to
power up the module with an enabled powertrain at no load.
VPRI • IPRI
(
)
PPRI_NL + (ISEC)2 • RSEC
VPRI • IPRI
(12)
BCM6123x60E15A3yzz
Input and Output Filter Design
Thermal Considerations
A major advantage of SAC™ systems versus conventional PWM
converters is that the transformer based SAC does not require
external filtering to function properly. The resonant LC tank,
operated at extreme high frequency, is amplitude modulated as a
function of primary voltage and secondary current and efficiently
transfers charge through the isolation transformer. A small amount
of capacitance embedded in the primary and secondary stages
of the module is sufficient for full functionality and is key to
achieving power density.
The ChiP package provides a high degree of flexibility in that it
presents three pathways to remove heat from internal power
dissipating components. Heat may be removed from the top
surface, the bottom surface and the leads. The extent to which
these three surfaces are cooled is a key component for determining
the maximum power that is available from a ChiP, as can be
seen from Figure 1.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
nn
Guarantee low source impedance:
To take full advantage of the BCM module’s dynamic response,
the impedance presented to its primary terminals must be low
from DC to approximately 5MHz. The connection of the bus
converter module to its power source should be implemented
with minimal distribution inductance. If the interconnect
inductance exceeds 100nH, the primary should be bypassed
with a RC damper to retain low source impedance and stable
operation. With an interconnect inductance of 200nH, the RC
damper may be as high as 1µF in series with 0.3Ω. A single
electrolytic or equivalent low-Q capacitor may be used in place
of the series RC bypass.
Since the ChiP has a maximum internal temperature rating, it is
necessary to estimate this internal temperature based on a real
thermal solution. Given that there are three pathways to remove
heat from the ChiP, it is helpful to simplify the thermal solution into
a roughly equivalent circuit where power dissipation is modeled as
a current source, isothermal surface temperatures are represented
as voltage sources and the thermal resistances are represented as
resistors. Figure 22 shows the “thermal circuit” for a 6123 BCM
module in an application where the top, bottom, and leads are
cooled. In this case, the BCM power dissipation is PDTOTAL and the
three surface temperatures are represented as TCASE_TOP,
TCASE_BOTTOM, and TLEADS. This thermal system can now be very
easily analyzed using a SPICE simulator with simple resistors,
voltage sources, and a current source. The results of the simulation
would provide an estimate of heat flow through the various
pathways as well as internal temperature.
nn
Further reduce primary and/or secondary voltage ripple
without sacrificing dynamic response:
Thermal Resistance Top
Given the wide bandwidth of the module, the source response
is generally the limiting factor in the overall system response.
Anomalies in the response of the primary source will appear at
the secondary of the module multiplied by its K factor.
nn
Protect the module from overvoltage transients imposed
by the system that would exceed maximum ratings and
induce stresses:
The module primary/secondary voltage ranges shall not be
exceeded. An internal overvoltage lockout function prevents
operation outside of the normal operating primary range. Even
when disabled, the powertrain is exposed to the applied voltage
and power MOSFETs must withstand it.
Total load capacitance at the secondary of the BCM module shall
not exceed the specified maximum. Owing to the wide bandwidth
and low secondary impedance of the module, low-frequency
bypass capacitance and significant energy storage may be more
densely and efficiently provided by adding capacitance at the
primary of the module. At frequencies <500kHz the module
appears as an impedance of RSEC between the source and load.
Within this frequency range, capacitance at the primary appears as
effective capacitance on the secondary per the relationship
defined in Eq. (13).
CSEC_EXT =
CPRI_EXT
K2
MAX INTERNAL TEMP
θINT-TOP
Thermal Resistance Bottom
Thermal Resistance Leads
θINT-BOTTOM
Power Dissipation (W)
TCASE_BOTTOM(°C)
θINT-LEADS
+
–
TLEADS(°C)
+
–
+
–
Figure 22 — Top case, Bottom case and leads thermal model
Alternatively, equations can be written around this circuit and
analyzed algebraically:
TINT – PD1 • θINT-TOP = TCASE_TOP
TINT – PD2 • θINT-BOTTOM = TCASE_BOTTOM
TINT – PD3 • θINT-LEADS = TLEADS
PDTOTAL = PD1+ PD2+ PD3
Where TINT represents the internal temperature and PD1, PD2, and
PD3 represent the heat flow through the top side, bottom side, and
leads respectively.
Thermal Resistance Top
MAX INTERNAL TEMP
θINT-TOP
(13)
Thermal Resistance Bottom
θINT-BOTTOM
This enables a reduction in the size and number of capacitors used
in a typical system.
Power Dissipation (W)
TCASE_BOTTOM(°C)
Thermal Resistance Leads
θINT-LEADS
TLEADS(°C)
+
–
Figure 23 — Top case and leads thermal model
BCM® Bus Converter
Page 25 of 29
TCASE_TOP(°C)
Rev 1.3
07/2017
TCASE_TOP(°C)
+
–
BCM6123x60E15A3yzz
Figure 23 shows a scenario where there is no bottom side cooling.
In this case, the heat flow path to the bottom is left open and the
equations now simplify to:
VPRI
TINT – PD1 • θINT-TOP = TCASE_TOP
ZPRI_EQ1
BCM®1
TINT – PD3 • θINT-LEADS = TLEADS
PDTOTAL = PD1+ PD3
ZSEC_EQ1
R0_1
ZPRI_EQ2
BCM®2
VSEC
ZSEC_EQ2
R0_2
+ DC
Thermal Resistance Top
MAX INTERNAL TEMP
θINT-TOP
Thermal Resistance Bottom
θINT-BOTTOM
Power Dissipation (W)
Thermal Resistance Leads
TCASE_BOTTOM(°C)
θINT-LEADS
TLEADS(°C)
TCASE_TOP(°C)
ZPRI_EQn
+
–
TINT – PD1 • θINT-TOP = TCASE_TOP
PDTOTAL = PD1
Please note that Vicor has a suite of online tools, including a
simulator and thermal estimator which greatly simplify the task of
determining whether or not a BCM thermal configuration is valid
for a given condition. These tools can be found at:
http://www.vicorpower.com/powerbench.
The performance of the SAC™ topology is based on efficient
transfer of energy through a transformer without the need of
closed loop control. For this reason, the transfer characteristic
can be approximated by an ideal transformer with a positive
temperature coefficient series resistance.
This type of characteristic is close to the impedance characteristic
of a DC power distribution system both in dynamic (AC) behavior
and for steady state (DC) operation.
When multiple BCM modules of a given part number are
connected in an array they will inherently share the load current
according to the equivalent impedance divider that the system
implements from the power source to the point of load.
ZSEC_EQn
Figure 25 — BCM module array
Figure 24 shows a scenario where there is no bottom side and
leads cooling. In this case, the heat flow path to the bottom is left
open and the equations now simplify to:
Current Sharing
BCM®n
R0_n
Figure 24 — Top case thermal model
Fuse Selection
In order to provide flexibility in configuring power systems
BCM modules are not internally fused. Input line fusing
of BCM products is recommended at system level to provide
thermal protection in case of catastrophic failure.
The fuse shall be selected by closely matching system
requirements with the following characteristics:
nn
Current rating
(usually greater than maximum current of BCM module)
nn
Maximum voltage rating
(usually greater than the maximum possible input voltage)
nn
Ambient temperature
nn
Nominal melting I2t
nn
Recommend fuse: ≤ 40A Littelfuse 456 Series (primary side)
Reverse Operation
BCM modules are capable of reverse power operation. Once the
unit is started, energy will be transferred from secondary back
to the primary whenever the secondary voltage exceeds VPRI • K.
The module will continue operation in this fashion for as long as
no faults occur.
Transient operation in reverse is expected in cases where there is
significant energy storage on the secondary and transient voltages
appear on the primary.
Some general recommendations to achieve matched array
impedances include:
nn
Dedicate common copper planes within the PCB to deliver and
return the current to the modules.
nn
Provide as symmetric a PCB layout as possible among modules
nn
An input filter is required for an array of BCMs in order to
prevent circulating currents.
For further details see:
AN:016 Using BCM Bus Converters in High Power Arrays.
BCM® Bus Converter
Page 26 of 29
Load
Rev 1.3
07/2017
BCM6123x60E15A3yzz
BCM Module Through Hole Package Mechanical Drawing and Recommended Land Pattern
12.57
.495
11.81
.465
0
2.03
.080
(9) PL.
0
2.03
.080
(9) PL.
11.43
.450
11.81
.465
25.14±.38
.990±.015
27.21
1.071
(2) PL.
21.94
.864
(2) PL.
17.09
.673
(2) PL.
30.50
1.201
12.52
.493
(2) PL.
7.94
.312
(2) PL.
0
1.49
.058
(2) PL.
0
61.00±.13
2.402±.005
1.02
.040
(3) PL.
1.02
.040
(3) PL.
0
0
3.37
.132
(2) PL.
6.76
.266
(2) PL.
18.05
.710
(2) PL.
20.84
.820
(2) PL.
27.55
1.085
(2) PL.
0
0
23.64
.931
(2) PL.
TOP VIEW (COMPONENT SIDE)
BOTTOM VIEW
.05 [.002]
NOTES:
.41
.016
(24) PL.
0
11.81±.08
.465±.003
4.17
.164
(24) PL.
1- RoHS COMPLIANT PER CST-0001 LATEST REVISION.
2- UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE : MM / [INCH]
+VSEC
21.94±.08
.864±.003
(2) PL.
12.52±.08
.493±.003
(2) PL.
6.76±.08
.266±.003
(2) PL.
2.54±.08
.100±.003
PLATED THRU
.38 [.015]
ANNULAR RING
(18) PL.
20.84±.08
.820±.003
(2) PL.
27.55±.08
1.085±.003
(2) PL.
0
-VSEC1
-VSEC2
-VSEC1
-VSEC2
+VSEC
+VSEC
+VSEC
+VSEC
-VSEC1
-VSEC2
-VSEC1
-VSEC2
+VSEC
17.09±.08
.673±.003
(2) PL.
7.94±.08
.312±.003
(2) PL.
0
+VSEC
+VPRI
TM/SER-OUT
+VPRI
+VPRI
EN
VAUX/SER-IN
+VPRI
-VPRI
RECOMMENDED HOLE PATTERN
(COMPONENT SIDE)
BCM® Bus Converter
Page 27 of 29
27.21±.08
1.071±.003
(2) PL.
+VSEC
0
3.37±.08
.132±.003
(2) PL.
11.81±.08
.465±.003
SEATING
PLANE
7.21±.10
.284±.004
Rev 1.3
07/2017
1.49±.08
.058±.003
(2) PL.
1.52±.08
.060±.003
PLATED THRU
.25 [.010]
ANNULAR RING
(6) PL.
18.05±.08
.710±.003
(2) PL.
23.64±.08
.931±.003
(2) PL.
BCM6123x60E15A3yzz
Revision History
Revision
Date
1.0
08/26/15
Initial Release
1.1
09/28/15
Changed PRI to SEC Input Quiescent Current
1.2
07/26/16
Added PMBus enabled product and associated related specifications
Updated electrical specifications table for forward direction
Added electrical specifications table for reverse direction
Updated figure 2
Updated figures 14 & 15
all
5, 6 & 7
8&9
10
18
1.3
07/28/17
Fomat updated
Updated height specification
All
1, 19, 26
BCM® Bus Converter
Page 28 of 29
Description
Page Number(s)
n/a
Rev 1.3
07/2017
5
BCM6123x60E15A3yzz
Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and
accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom
power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor
makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves
the right to make changes to any products, specifications, and product descriptions at any time without notice. Information published by
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Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
Visit http://www.vicorpower.com/dc-dc/isolated-fixed-ratio/lv-bus-converter-module for the latest product information.
Vicor’s Standard Terms and Conditions and Product Warranty
All sales are subject to Vicor’s Standard Terms and Conditions of Sale, and Product Warranty which are available on Vicor’s webpage
(http://www.vicorpower.com/termsconditionswarranty) or upon request.
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and Conditions of Sale, the user of Vicor products and components in life support applications assumes all risks of such use and indemnifies
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products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property
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The products described on this data sheet are protected by the following U.S. Patents Numbers:
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email
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BCM® Bus Converter
Page 29 of 29
Rev 1.3
07/2017