TI1 INA381A1IDSGT 26-v, low-cost, zero-drift, voltage-output, current-shunt monitor with integrated comparator Datasheet

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INA381
SBOS848 – DECEMBER 2017
1 Features
3 Description
•
•
The INA381 device includes both a 26-V commonmode, current-sensing amplifier and a high-speed
comparator configured to detect overcurrent
conditions through measuring the voltage developed
across a current-shunt resistor and comparing that
voltage to a defined threshold limit set by the
comparator reference pin. The current-shunt monitor
can measure differential voltage signals on commonmode voltages that can vary from –0.2 V up to 26 V,
independent of the supply voltage.
1
•
•
•
•
Common-Mode Input Range: –0.2 V to 26 V
High Accuracy Amplifier:
– Offset Voltage, VCM = 12 V: 500 µV
(Maximum)
– Offset Voltage, VCM = 0 V: 150 µV (Maximum)
– Offset Voltage Drift: 1 µV/°C (Maximum)
– Gain Error: 1% (Maximum)
– Gain Error Drift: 20 ppm/°C (Maximum)
Available Amplifier Gains:
– INA381A1: 20 V/V
– INA381A2: 50 V/V
– INA381A3: 100 V/V
– INA381A4: 200 V/V
Comparator Specifications:
– Hysteresis: 50 mV
– Response Time: 500 ns
– Alert Threshold Set Through External
Reference Voltage
Open-Drain Comparator Output With Latching
Mode
Package: WSON-8 (2 mm × 2 mm)
The open-drain alert output can be configured to
operate in either a transparent mode where the
output status follows the input state or in a latched
mode where the alert output is cleared when the latch
is reset. The standalone comparator alert response
time is under 5 µs, allowing for quick detection of
overcurrent events. The total system overcurrent
protection provided by the INA381 is under 10 µs.
This device operates from a single 2.7-V to 5.5-V
supply, drawing a maximum supply current of 400 µA.
The device is specified over the extended operating
temperature range (–40°C to +125°C), and is
available in an 8-pin WSON package.
Device Information(1)
PART NUMBER
PACKAGE
2 Applications
•
•
•
•
•
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Overcurrent Protection
Power-Supply Protection
Low-Side Phase Motor Control
Computers and Servers
Telecom Equipment
WSON (8)
BODY SIZE (NOM)
INA381
2.00 mm × 2.00 mm
Typical Application
VS+
2.7 V to 5.5 V
0 V to 26 V
INA381
IN+
10 k:
RPULLUP
+
VOUT
G = 20, 50,
100, 200
RSENSE
IN-
Microcontroller
ADC
CMPIN
+
GPIO
-
ALERT
Load
GND
RESET
GPIO
CMPREF
5V
R1
R2
Copyright © 2017, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to
change without notice.
ADVANCE INFORMATION
INA381 26-V, Low-Cost, Zero-Drift, Voltage-Output,
Current-Shunt Monitor With Integrated Comparator
INA381
SBOS848 – DECEMBER 2017
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
4
4
4
4
5
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
8
8.1 Application Information............................................ 19
8.2 Typical Application .................................................. 19
9 Power Supply Recommendations...................... 22
10 Layout................................................................... 22
10.1 Layout Guidelines ................................................. 22
10.2 Layout Example .................................................... 22
11 Device and Documentation Support ................. 23
11.1
11.2
11.3
11.4
11.5
11.6
Detailed Description .............................................. 7
7.1
7.2
7.3
7.4
Applications and Implementation ...................... 19
Overview ................................................................... 7
Functional Block Diagram ......................................... 7
Feature Description................................................... 8
Device Functional Modes........................................ 14
Documentation Support ........................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
23
23
23
23
23
23
12 Mechanical, Packaging, and Orderable
Information ........................................................... 23
ADVANCE INFORMATION
4 Revision History
2
DATE
REVISION
NOTES
December 2017
*
Initial release.
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5 Pin Configuration and Functions
DSG Package
8-Pin WSON
Top View
IN+
1
8
IN-
VS+
2
7
VOUT
ALERT
3
6
CMPIN
RESET
4
5
CMPREF
GND
Not to scale
Pin Functions
I/O
DESCRIPTION
NAME
NO.
ALERT
3
Digital output
Overlimit alert, active low, open-drain output
CMPIN
6
Analog input
Signal input to the comparator
CMPREF
5
Analog input
Input reference to the comparator
IN–
8
Analog input
Connect to the load side of the shunt resistor
IN+
1
Analog input
Connect to the supply side of the shunt resistor
RESET
4
Digital input
Transparent or latch mode selection input. See the Alert Mode section for a
detailed description on pin connections.
VOUT
7
Analog output
VS+
2
Supply
ADVANCE INFORMATION
PIN
Current-sense amplifier output voltage
Power supply, 2.7 V to 5.5 V
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
6
V
Supply voltage, VS
Differential (VIN+) – (VIN–)
Analog inputs (IN+, IN–)
Analog input
–26
26
V
Common-mode
GND – 0.3
26
V
CMPIN
GND – 0.3
(VS) + 0.3
V
CMPREF
GND – 0.3
(VS) + 0.3
V
Analog output
OUT
GND – 0.3
(VS) + 0.3
V
Digital input
RESET
GND – 0.3
(VS) + 0.3
V
Digital output
ALERT
GND – 0.3
Junction temperature, TJ
Storage temperature, Tstg
(1)
–65
6
V
150
°C
150
°C
ADVANCE INFORMATION
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
-0.2
12
26
Operating supply voltage
2.7
5
Operating free-air temperature
–40
VCM
Common-mode input voltage
VS
TA
UNIT
V
V
+125
°C
6.4 Thermal Information
INA381
THERMAL METRIC (1)
DSG (WSON)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
77
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
96.5
°C/W
RθJB
Junction-to-board thermal resistance
43.4
°C/W
ΨJT
Junction-to-top characterization parameter
5.4
°C/W
YJB
Junction-to-board characterization parameter
43.6
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
18.8
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
at TA = 25°C, VSENSE = VIN+ – VIN– = 10 mV, VS = 5 V, VIN+ = 12 V, and CMPREF = 2 V, (unless otherwise noted.)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
VCM
Common-mode input voltage
range
CMRR
Common-mode rejection ratio,
RTI
VOS
Offset voltage, RTI (1)
dVOS/dT
–0.2
VIN+ = 0 V to 26 V, TA= –40ºC to +125ºC
84
VIN+ = 12 V, VIN– = 12 V
26
V
100
dB
±100
±500
VIN+ = 0 V, VIN– = 0 V
±25
±150
Offset voltage drift, RTI (1)
TA= –40ºC to +125ºC
0.1
1
μV/°C
PSRR
Power-supply rejection ratio
VS = 2.7 V to 5.5 V,
TA= –40ºC to +125ºC
±8
±40
μV/V
IB
Input bias current
VSENSE = 0 mV, IB+, IB–
IOS
Input offset current
VSENSE = 0 mV
μV
μV
80
μA
±0.05
μA
INA381A1
20
V/V
INA381A2
50
V/V
INA381A3
100
V/V
INA381A4
200
G
Gain
EG
Gain error
VOUT = 0.5 V to VS – 0.5 V
Gain error vs temperature
TA= –40ºC to +125ºC
Nonlinearity error
VOUT = 0.5 V to VS – 0.5 V
Maximum capacitive load
No sustained oscillation
ADVANCE INFORMATION
OUTPUT
V/V
±0.1%
±1%
1.5
20
ppm/°C
±0.01%
1
nF
VS – 0.02
V
VGND +
0.001
V
VOLTAGE OUTPUT
Swing to VS power-supply rail
RL = 10 kΩ to GND, TA= –40ºC to 125ºC
Swing to GND
VSENSE = 0 V, VIN+ = 0 V, VIN– = 0 V, RL = 10 kΩ
to GND, TA= –40ºC to +125ºC
FREQUENCY RESPONSE
BW
Bandwidth
SR
Slew rate
INA381A1
350
kHz
INA381A2
210
kHz
INA381A3
150
kHz
INA381A4
105
kHz
2
V/µs
30
nV/√Hz
µs
NOISE
Voltage noise density
COMPARATOR
tp
Propagation delay time,
comparator only
CMPIN Input overdrive = 20 mV
0.2
Large-signal propagation
delay, comparator only
CMPIN step = 0.5 V to 4.5 VCMPREF = 4 V
0.3
Small signal total alert
propogation delay, comparator
and amplifier
Input overdrive = 1 mV
3
Slew rate limited total alert
propagation delay, comparator
and amplifier
VOUT step = 0.5 V to 4.5, VCMPREF = 4 V
5
10
µs
1
5
mV
1
µs
µs
VOS
Comparator offset voltage
HYS
Hysteresis
VIH
High-level input voltage
1.4
6
VIL
Low-level input voltage
0
0.4
V
VOL
Alert low-level output voltage
IOL = 3 mA
70
300
mV
ALERT pin leakage input
current
VOH = 3.3 V
0.1
μA
Digital leakage input current
0 ≤ VIN ≤ VS
1
μA
(1)
50
mV
V
RTI = referred-to-input.
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Electrical Characteristics (continued)
at TA = 25°C, VSENSE = VIN+ – VIN– = 10 mV, VS = 5 V, VIN+ = 12 V, and CMPREF = 2 V, (unless otherwise noted.)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
5.5
V
300
400
μA
500
μA
125
°C
POWER SUPPLY
VS
IQ
Operating supply range
Quiescent current
TA = –40ºC to +125ºC
2.7
VSENSE = 10 mV, TA = +25ºC
TA = –40ºC to +125ºC
TEMPERATURE RANGE
Specified range
–40
ADVANCE INFORMATION
6
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7 Detailed Description
7.1 Overview
The INA381 is a zero-drift topology, current-sensing amplifier with an integrated comparator that can be used in
both low-side and high-side current-sensing and protection applications. These specially-designed, currentsensing amplifiers are able to accurately measure voltages developed across current-sensing resistors (also
known as current-shunt resistors) on common-mode voltages that far exceed the supply voltage powering the
device. Current can be measured on input voltage rails as high as 26 V, and the device can be powered from
supply voltages as low as 2.7 V. The device can also withstand the full 26-V common-mode voltage at the input
pins when the supply voltage is removed without causing damage.
The INA381 uses a reference input that allows for a simple method of setting the corresponding current threshold
level for the device to use for out-of-range comparison. Combining the precision measurement of the currentsense amplifier and the on-board comparator enables an all-in-one overcurrent detection device. This
combination creates a highly-accurate solution that is capable of fast detection of out-of-range conditions and
allows the system to take corrective actions to prevent potential component or system-wide damage.
7.2 Functional Block Diagram
VS+
2.7 V to 5.5 V
0 V to 26 V
INA381
IN+
10 k:
RPULLUP
+
VOUT
G = 20, 50,
100, 200
RSENSE
IN-
Microcontroller
ADC
CMPIN
+
GPIO
-
ALERT
Load
GND
RESET
GPIO
CMPREF
5V
R1
R2
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ADVANCE INFORMATION
The zero-drift topology enables high-precision measurements with maximum input offset voltages as low as
150 µV with a temperature contribution of only 1 µV/°C over the full temperature range of –40°C to +125°C. The
low total offset voltage of the INA381 enables smaller current-sense resistor values to be used, and allows for a
more efficient system operation without sacrificing measurement accuracy resulting from the smaller input signal.
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7.3 Feature Description
7.3.1 Wide Input Common-Mode Voltage Range
The INA381 supports input common-mode voltages from –0.2 V to 26 V. Because of the internal topology, the
common-mode range is not restricted by the power-supply voltage (VS) as long as VS stays within the operational
range of 2.7 V to 5.5 V. As Figure 1 shows, the ability to operate with common-mode voltages greater or less
than VS allows the INA381 to be used in high-side (and low-side) current-sensing applications.
-0.2 V to 26 V
Power Supply
IN+
RSENSE
ADVANCE INFORMATION
IN-
High-Side Sensing
Common-mode voltage (VCM)
is bus-voltage dependent.
Load
IN+
RSENSE
IN-
Low-Side Sensing
Common-mode voltage (VCM)
is always near ground and is
isolated from bus-voltage spikes.
GND
Figure 1. High-Side and Low-Side Current Sensing
7.3.2 Precise Low-Side Current Sensing
When used in low-side current-sensing applications, the offset voltage of the INA381 is less than 150 µV. The
low offset performance of the INA381 has several benefits. First, the low offset allows the device to be used in
applications that must measure current over a wide dynamic range. In this case, the low offset improves the
accuracy when the sense currents are on the low end of the measurement range. Another advantage of low
offset is the ability to sense lower voltage drop across the sense resistor accurately, thus allowing for a lowervalue shunt resistor. Lower-value shunt resistors reduce power loss in the current-sense circuit, and help
improve the power efficiency of the end application.
The gain error of the INA381 is specified to be within 1% of the actual value. As the sensed voltage becomes
much larger than the offset voltage, this gain error becomes the dominant source of error in the current-sense
measurement.
8
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Feature Description (continued)
7.3.3 High Bandwidth and Slew Rate
The INA381 supports small-signal bandwidths as high as 350 kHz, and large-signal slew rates of 2 V/µs. The
ability to detect rapid changes in the sensed current, as well as the ability to quickly slew the output, makes the
INA381 a good choice for applications that require a quick response to input current changes. One application
that requires high bandwidth and slew rate is low-side motor control, where the ability to follow rapid changing
current in the motor allows for more accurate control over a wider operating range. Another application that
requires higher bandwidth and slew rates is system fault detection. The integrated comparator within the INA381
is designed to quickly detect when the sense current is out of range and provides a digital output on the ALERT
pin for quicker and faster responses.
7.3.4 Alert Output
Figure 2 shows the alert output response of the internal comparator. When the output voltage of the amplifier is
lower than the set reference voltage on CMPREF, the comparator output is in the default high state. When the
amplifier output voltage exceeds the reference voltage set at the CMPREF pin, the comparator output becomes
active and pulls low. This active low output indicates that the measured signal at the amplifier input has
exceeded the programmed threshold level, indicating an overcurrent or out-of-range condition has occurred.
6
ALERT
VOUT
CMPREF
5
Voltage (V)
4
3
2
1
0
-1
Time (2ms/div)
Figure 2. Overcurrent Alert Response
7.3.5 Alert Mode
The device has two output operating modes, transparent and latched, that are selected based on the RESET pin
setting. These modes change how the ALERT pin responds following an alert when the overcurrent condition is
removed.
7.3.5.1 Transparent Output Mode
The device is set to transparent mode when the RESET pin is pulled low, allowing the output alert state to
change and follow the input signal with respect to the programmed alert threshold. For example, when the
differential input signal rises above the alert threshold, the alert output pin is pulled low. When the differential
input signal drops below the alert threshold, the output returns to the default high output state. A common
implementation using the device in transparent mode is connecting the ALERT pin to a hardware interrupt input
on a microcontroller. When an overcurrent condition is detected and the ALERT pin is pulled low, the controller
interrupt pin detects the output state change and begins making changes to the system operation required to
address the overcurrent condition. Under this configuration, the ALERT pin high-to-low transition is captured by
the microcontroller so the output returns to the default high state when the overcurrent event is removed.
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ADVANCE INFORMATION
The device ALERT pin is an active-low, open-drain output that is designed to be pulled low when the input
conditions are detected to be out-of-range. This open-drain output pin is recommended to include a 10-kΩ pullup
resistor to the supply voltage. This open-drain pin can be pulled up to a voltage beyond the supply voltage, VS,
but must not exceed 5.5 V.
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Feature Description (continued)
7.3.5.2 Latch Output Mode
Some applications do not have the functionality available to continuously monitor the state of the output ALERT
pin to detect an overcurrent condition, as described in the Transparent Output Mode section. A typical example
of this application is a system that is only able to poll the ALERT pin state periodically to determine if the system
is functioning correctly. If the device is set to transparent mode in this type of application, the state change of the
ALERT pin can be missed when ALERT is pulled low to indicate an out-of-range event if the out-of-range
condition does not appear during one of these periodic polling events. Latch mode is specifically intended to
accommodate these applications.
As shown in Table 1, the device is placed into the corresponding output mode based on the signal connected to
RESET. The difference between latch mode and transparent mode is how the alert output responds when an
overcurrent event ends. In transparent mode (RESET = low), when the differential input signal drops below the
limit threshold level after the ALERT pin asserts because of an overcurrent event, the state of the ALERT pin
returns to the default high setting to indicate that the overcurrent event is complete.
Table 1. Output Mode Settings
ADVANCE INFORMATION
OUTPUT MODE
RESET PIN SETTING
Transparent mode
RESET = low
Latch mode
RESET = high
In latch mode (RESET = high), when an overlimit condition is detected and the ALERT pin is pulled low, the
ALERT pin does not return to the default high state when the differential input signal drops below the alert
threshold level. To clear the alert, the RESET pin must be pulled low for at least 100 ns. Pulling the RESET pin
low returns the ALERT to the default high level, if the differential input signal is below the alert threshold. If the
input signal is above the threshold limit when the RESET pin is pulled low, the ALERT pin remains low. When
the alert condition is detected by the system controller, the RESET pin can be set back to high to place the
device back in latch mode.
Figure 3 shows the latch and transparent modes. In Figure 3, when VIN drops back below the VLIMIT threshold for
the first time, the RESET pin is pulled high. With the RESET pin is pulled high, the device is set to latch mode so
that the alert output state does not return high when the input signal drops below the VLIMIT threshold. Only when
the RESET pin is pulled low does the ALERT pin return to the default high level, thus indicating that the input
signal is below the limit threshold. When the input signal drops below the limit threshold for the second time, the
RESET pin is already pulled low. The device is set to transparent mode at this point and the ALERT pin is pulled
back high when the input signal drops below the alert threshold.
VCPMPREF
VOUT
(VIN+ - VIN-) x GAIN
0V
LATCH1
Latch Mode
Transparent Mode
Alert Clears
ALERT1
Alert Does Not Clear
Figure 3. Transparent versus Latch Mode
10
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7.3.6 Setting The Current-Limit Threshold
The VOUT voltage is the amplified voltage developed across the current-sensing resistor. The signal at the
VOUT pin developed is the input voltage across IN+ and IN– multiplied by the gain of the amplifier. The INA381
has four gain options, as shown in Figure 4: 20 V/V, 50 V/V, 100 V/V, and 200 V/V. The VOUT pin can be
externally shorted to the CMPIN pin.
The INA381 determines if an overcurrent event is present by comparing the voltage on the CMPIN pin to the
corresponding signal developed at the CMPREF pin. The threshold voltage for the CMPREF pin can be set with
a resistive divider or by connecting an external voltage source (such as a reference generator device). Figure 5
depicts the REF3140 used as an external reference source.
VS+
2.7 V to 5.5 V
INA381
VOUT
G = 20, 50,
100, 200
Microcontroller
ADVANCE INFORMATION
10 k:
RPULLUP
+
ADC
CMPIN
+
-
ALERT
RESET
GPIO
GPIO
CMPREF
GND
5V
R1
R2
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Figure 4. Resistor Divider Voltage
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VS+
2.7 V to 5.5 V
INA381
10 k:
RPULLUP
+
CMPIN, VOUT
4V
VOUT
G = 20, 50,
100, 200
Vs
-
ALERT
CMPIN
+
-
ALERT
4V
CMPREF
RESET
CMPREF
GND
ADVANCE INFORMATION
4V
5V
REF3140
0.2% , 15ppm/° C
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Figure 5. External Reference Voltage
7.3.7 Selecting a Current-Sensing Resistor
The device measures the differential voltage developed across a resistor when current flows through the
component to determine if the current being monitored exceeds a defined limit. This resistor is commonly
referred to as a current-sensing resistor or a current-shunt resistor, with each term commonly used
interchangeably. The flexible design of the device allows for measuring a wide differential input signal range
across this current-sensing resistor.
Selecting the value of this current-sensing resistor is based primarily on two factors: the required accuracy of the
current measurement and the allowable power dissipation across the current-sensing resistor. Larger voltages
developed across this resistor allow for more accurate measurements to be made. Amplifiers have fixed internal
errors that are largely dominated by the inherent input offset voltage. When the input signal decreases, these
fixed internal amplifier errors become a larger portion of the measurement and increase the uncertainty in the
measurement accuracy. When the input signal increases, the measurement uncertainty is reduced because the
fixed errors are a smaller percentage of the signal being measured. Therefore, the use of larger-value, currentsensing resistors inherently improves the measurement accuracy.
However, a system design trade-off must be evaluated through use of larger input signals for improving the
measurement accuracy. Increasing the current-sense resistor value results in increased power dissipation across
the current-sensing resistor. Increasing the value of the current-shunt resistor increases the differential voltage
developed across the resistor when current passes through the component. This increase in voltage across the
resistor increases the power that the resistor must be able to dissipate. Decreasing the value of the current-shunt
resistor value reduces the power dissipation requirements of the resistor, but increases the measurement errors
resulting from the decreased input signal. Selecting the optimal value for the shunt resistor requires factoring
both the accuracy requirement for the specific application and the allowable power dissipation of this component.
An increasing number of very low ohmic-value resistors are becoming more widely available with values reaching
down as low as 1 mΩ or lower with power dissipations of up to 5 W that enable large currents to be accurately
monitored with sensing resistors.
12
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7.3.7.1 Selecting a Current-Sensing Resistor: Example
In this example, the trade-offs involved in selecting a current-sensing resistor are discussed. This example
requires 5% accuracy for detecting a 10-A overcurrent event under 20 µs where only 250 mW is allowable for the
dissipation across the current-sensing resistor at the full-scale current level. Although the maximum power
dissipation is defined as 250 mW, a lower dissipation is preferred to improve system efficiency. Given the total
error budget of 5%, the INA381 total error is less than 1%. The INA381 is well suited for this application as up to
1% of error is available to be attributed to the measurement error of the device under these conditions.
As shown in Table 2, the maximum value calculated for the current-sensing resistor with these requirements is
2.5 mΩ. Although this value satisfies the maximum power dissipation requirement of 250 mW, headroom is
available from the 2.5% maximum total overcurrent detection error to reduce the value of the current-sensing
resistor and reduce the power dissipation further. Selecting a 1.5-mΩ, current-sensing resistor value offers a
good tradeoff for reducing the power dissipation in this scenario by approximately 40% and still remaining within
the accuracy region.
Table 2. Calculating the Current-Sensing Resistor (RSENSE)
EQUATION
VALUE
UNIT
IMAX
Maximum current
10
A
PD_MAX
Maximum allowable power dissipation
250
mW
RSENSE_MAX
Maximum allowable RSENSE
2.5
mΩ
VOS
Offset voltage, VCM = 12 V
500
µV
VOS_ERROR
Initial offset voltage error
EG
Gain error
ERRORTOTAL
Total measurement error
tp
PD_MAX / IMAX2
(VOS / (RSENSE_MAX × IMAX ) × 100
2%
1%
√(VOS_ERROR2 + EG2)
2.23%
Allowable current threshold accuracy
5%
Total system overcurrent response time
10
µs
Allowable overcurrent response
20
µs
7.3.8 Hysteresis
The on-board comparator in the INA381 is designed to reduce the possibility of oscillations in the alert output
when the measured signal level is near the overlimit threshold level as a result of noise. When the voltage
(VCMPIN) exceeds the voltage developed at the CMPREF pin, the ALERT pin asserts and pulls low. The output
voltage must drop below the CMPREF pin threshold voltage, as shown in Figure 6, by the hysteresis level of 50
mV for the ALERT pin to de-assert and return to the nominal high state. The INA381 is designed with a
hysteresis of 50 mV.
ALERT
Alert
Output
VCMPIN
VCMPREF ± 50 mV
VCMPREF
Figure 6. Typical Comparator Hysteresis
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PARAMETER
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7.4 Device Functional Modes
7.4.1 Input Filtering
Provided that the INA381 output is connected to a high-impedance input, the best location to filter is at the device
output using a simple RC network from VOUT to GND. Filtering at the output attenuates high-frequency
disturbances in the common-mode voltage, differential input signal, and INA381 power-supply voltage. If filtering
at the output is not possible, or if only the differential input signal needs filtering, a filter can be applied at the
input pins of the device.
External filtering can help reduce the amount of noise that reaches the comparator, and thereby reduce the
likelihood of a false alert from occurring. The tradeoff to adding this noise filter is that the alert response time is
increased because both the input signal and noise are filtered. Figure 7 shows the implementation of an input
filter for the device.
VS+
2.7 V ± 5.5 V
0 V to 26 V
INA381
ADVANCE INFORMATION
< 10
IN+
VOUT
G = 20, 50,
100, 200
CFILTER
RSENSE
10 k
RPULLUP
+
IN-
CMPIN
< 10
+
-
ALERT
Load
GND
RESET
CMPREF
5V
R1
R2
Copyright © 2017, Texas Instruments Incorporated
Figure 7. Input Filter
The addition of external series resistance creates an additional error in the measurement; therefore, the value of
these series resistors must be kept to 10 Ω (or less, if possible) to reduce impact to accuracy. The internal bias
network shown in Figure 7 present at the input pins creates a mismatch in input bias currents when a differential
voltage is applied between the input pins. If additional external series filter resistors are added to the circuit, the
mismatch in bias currents results in a mismatch of voltage drops across the filter resistors. This mismatch
creates a differential error voltage that subtracts from the voltage developed across the shunt resistor. This error
results in a voltage at the device input pins that is different than the voltage developed across the shunt resistor.
Without the additional series resistance, the mismatch in input bias currents has little effect on device operation.
The amount of error these external filter resistors add to the measurement can be calculated using Equation 2.
Equation 1 calculates the gain error factor.
Equation 1 shows that the amount of variance in the differential voltage present at the device input relative to the
voltage developed at the shunt resistor is based both on the external series resistance (RF) value as well as
internal input resistor RINT. The reduction of the shunt voltage reaching the device input pins appears as a gain
error when comparing the output voltage relative to the voltage across the shunt resistor. A factor can be
calculated to determine the amount of gain error that is introduced by the addition of external series resistance.
Use Equation 1 to calculate the expected deviation from the shunt voltage to what is measured at the device
input pins:
1250 u RINT
Gain Error Factor
(1250 u RF ) (1250 u RINT ) (RF u RINT )
where:
•
•
14
RINT is the internal input resistor
RF is the external series resistance
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Device Functional Modes (continued)
With the adjustment factor from Equation 1, including the device internal input resistance shown in Table 3, this
factor varies with each gain version. Table 4 lists each individual device gain error factor.
Table 3. Input Resistance
PRODUCT
GAIN
RINT (kΩ)
INA381A1
20
25
INA381A2
50
10
INA381A3
100
5
INA381A4
200
2.5
PRODUCT
SIMPLIFIED GAIN ERROR FACTOR
INA381A1
25000
(21u RF ) 25000
INA381A2
10000
(9 u RF ) 10000
INA381A3
1000
RF 1000
INA381A4
2500
(3 u RF ) 2500
Equation 2 can then calculate the gain error that can be expected from the addition of the external series
resistors:
Gain Error (%) = 100 - (100 ´ Gain Error Factor)
(2)
For example, using an INA381A2 and the corresponding gain error equation from Table 4, a series resistance of
10 Ω results in a gain error factor of 0.991. The corresponding gain error is then calculated using Equation 2,
resulting in an additional gain error of approximately 0.89% solely because of the external 10-Ω series resistors.
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Table 4. Device Gain Error Factor
INA381
SBOS848 – DECEMBER 2017
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7.4.2 Adjustable Hysteresis
The device onboard comparator is designed with a hysteresis of 50 mV. The INA381 is designed for the user to
change the hysteresis from a preset value of 50 mV by connecting an external resistor between VOUT and
CMPIN. Figure 8 shows a detailed block diagram of adding additional hysteresis.
VS+
2.7 V to 5.5 V
0 V to 26 V
INA381
IN+
10 k:
RPULLUP
+
VOUT
G = 20, 50,
100, 200
RSENSE
IN-
VS+
4 µA
-
RHYS
12.5 k
ADVANCE INFORMATION
Internal
Hysteresis
Control
Load
CMPIN
+
-
ALERT
RESET
CMPREF
GND
5V
R1
R2
Copyright © 2017, Texas Instruments Incorporated
Figure 8. Adding Additional Hysteresis to the Comparator
Hysteresis is internally designed to preset to 50 mV in the INA381. Internal to the comparator, the INA381 has a
current source of 4 µA in series with 12.5 kΩ. The internal current source and hysteresis of the comparator is set
by the internal hysteresis control circuit that is enabled only after ALERT is asserted low. ALERT is asserted
during an overcurrent condition when the voltage on VOUT exceeds the threshold set on the CMPREF pin. The
internal 4-µA hysteresis circuits are triggered only after ALERT is asserted.
To set additional hysteresis higher than 50 mV, the RHYS resistor must be connected between the VOUT and
CMPIN pin. Equation 3 and Equation 4 describe the internal configuration to set the external hysteresis resistor.
VHYS
R HYS
4 PA u 12500 :
V HYS
R HYS
(3)
4 PA u 12500 :
4 PA
where
•
•
16
VHYS is the desired hysteresis voltage
RHYS is the external resistor on the input of the CMPIN pin
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Table 5 lists the external resistors required at the input of the CMPIN pin to set the hysteresis.
Table 5. Hysteresis Resistor Selection
HYSTERESIS VOLTAGE
EXTERNAL RESISTOR AT THE CMPIN PIN
50 mV
0Ω
75 mV
6.25 kΩ
100 mV
12.5 kΩ
125 mV
18.75 kΩ
150 mV
25 kΩ
200 mV
37.5 kΩ
250 mV
50 kΩ
300 mV
62.5 kΩ
With a small amount of additional circuitry, the INA381 can be used in circuits subject to transients higher than
26 V. Use only Zener diodes or Zener-type transient absorbers (sometimes referred to as transzorbs)—any other
type of transient absorber has an unacceptable time delay. Start by adding a pair of resistors as shown in
Figure 9 as a working impedance for the Zener diode. Keep these resistors as small as possible; most often
approximately 10 Ω. Larger values can be used with an effect on gain that is discussed in the Input Filtering
section. This circuit limits only short-term transients and, therefore, many applications are satisfied with a 10-Ω
resistor along with conventional Zener diodes of the lowest acceptable power rating. This combination uses the
least amount of board space. These diodes can be found in packages as small as SOT-523 or SOD-523.
2.7 V to 5.5 V
0 V to 26 V
INA381
< 10
IN+
VOUT
G = 20, 50,
100, 200
RSENSE
< 10
10 k:
RPULLUP
+
IN-
-
CMPIN
+
Load
GND
ALERT
RESET
CMPREF
5V
R1
R2
Copyright © 2017, Texas Instruments Incorporated
Figure 9. Transient Protection
In the event that low-power Zener diodes do not have sufficient transient absorption capability, a higher-power
transzorb must be used. Figure 9 shows that the most package-efficient solution involves using a single
transzorb and back-to-back diodes between the device inputs. The most space-efficient solutions are dual,
series-connected diodes in a single SOT-523 or SOD-523 package. In either of the examples provided in
Figure 9 and Figure 10, the total board area required by the INA381 with all protective components is less than
that of an SOIC-8 package, and only slightly greater than that of a VSSOP-8 package.
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7.4.3 Using the INA381 With Common-Mode Transients Above 26 V
INA381
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2.7 V to 5.5 V
±0.2 V to 26 V
INA381
< 10
IN+
VOUT
G = 20, 50,
100, 200
RSENSE
< 10
10 k:
RPULLUP
+
IN-
CMPIN
+
Load
-
ALERT
GND
RESET
ADVANCE INFORMATION
CMPREF
5 V R1
R2
Copyright © 2017, Texas Instruments Incorporated
Figure 10. Transient Protection Using a Single Transzorb and Input Clamps
18
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8 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The INA381 is designed to enable easy configuration for detecting overcurrent conditions in an application. This
device is individually targeted towards unidirectional overcurrent detection of a single threshold. However, this
device can also be paired with additional devices and circuitry to create more complex monitoring functional
blocks.
8.2 Typical Application
VS+
INA381
VS
IN+
IN-
ADVANCE INFORMATION
2.7 V to 5.5 V
10 k:
RPULLUP
+
VOUT
G = 20, 50,
100, 200
-
CMPIN
+
-0.2 V to 26 V
ALERT
-
RESET
R1
RSENSE
R2
CMPREF
5V
VS+
2.7 V to 5.5 V
Load
IN+
IN-
INA381
+
VOUT
G = 20, 50,
100, 200
10 k:
RPULLUP
-
+
CMPIN
-
ALERT
RESET
R3
R4
CMPREF
5V
Copyright © 2017, Texas Instruments Incorporated
Figure 11. Bidirectional Application
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INA381
SBOS848 – DECEMBER 2017
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Typical Application (continued)
8.2.1 Design Requirements
Although the INA381 is only able to measure current through a current-sensing resistor flowing in one direction, a
second INA381 can be used to create a bidirectional monitor. Table 6 lists a system design example of a highside INA381 measuring in the forward direction and one low-side INA381 measuring in the reverse direction. This
example designs for maximum accuracy. The following example also uses the alert function of both devices.
Table 6. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Rsense
12 mΩ
Power-supply voltage
5V
Common-mode voltage
20 V
Maximum sense current
20 A
Small-signal bandwidth
> 120 kHz
Alert current threshold
19 A
ADVANCE INFORMATION
8.2.2 Detailed Design Procedure
Although the device is only able to measure current through a current-sensing resistor flowing in one direction, a
second INA381 can be used to create a bidirectional monitor. With the input pins of a second device reversed
across the same current-sensing resistor, the second device is now able to detect current flowing in the other
direction relative to the first device; see Figure 11. The outputs of each device connect to an AND gate to detect
if either of the limit threshold levels are exceeded. As shown in Table 7, the output of the AND gate is high if
neither overcurrent limit thresholds are exceeded. A low output state of the AND gate indicates that either the
positive overcurrent limit or the negative overcurrent limit is surpassed.
In this scenario, the maximum current expected through the shunt resistor is 20 A in either the forward or reverse
direction. Because maximum accuracy is desired, the shunt resistor is maximized by taking the maximum output
swing divided by the smallest gain and divided by the maximum current. The design example in Table 6 yields a
shunt value of 12.3 mΩ. The closest standard 1% and 0.1% device is 12 mΩ and this value is used by both
INA381 devices.
Because corrective action must be taken when the current exceeds ±19 A, the comparators require a value of
4.56 V (19 A × 0.012 Ω × 20 V/V). In this instance, a voltage divider consisting of two 4.53-kΩ resistors (R1 and
R3) and two 5-kΩ resistors (R2 and R4) off the 5-V rail supply a voltage close to this value. To ensure that both
device alert functions can trigger a single GPIO pin on a microcontroller, both comparator outputs feed into an
AND gate. As shown in Table 7, the output of the AND gate is high if neither overcurrent limit thresholds are
exceeded. A low output state of the AND gate indicates that either the positive overcurrent limit or the negative
overcurrent limit is surpassed.
Table 7. Bidirectional Overcurrent Output Status
OCP STATUS
OUTPUT
OCP+
0
OCP–
0
No OCP
1
8.2.3 Application Curve
Figure 12 shows two INA381 devices being used in a bidirectional configuration and an output control circuit to
detect if one of the two alerts is exceeded.
20
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Input
(5 mV/div)
Alert Output
(1 V/div)
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Positive Limit
0V
Negtive Limit
Time (5 ms/div)
ADVANCE INFORMATION
Figure 12. Bidirectional Application Curve
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9 Power Supply Recommendations
The device input circuitry can accurately measure signals on common-mode voltages beyond the power-supply
voltage, VS. For example, the voltage applied to the VS power-supply pin can be 5 V, whereas the load powersupply voltage being monitored (VCM) can be as high as 26 V. The device can withstand the full –0.2 V to 26 V
range at the input pins, regardless of whether the device has power applied or not.
Power-supply bypass capacitors are required for stability and must be placed as closely as possible to the supply
and ground pins of the device. A typical value for this supply bypass capacitor is 0.1 µF. Applications with noisy
or high-impedance power supplies can require additional decoupling capacitors to reject power-supply noise.
10 Layout
10.1 Layout Guidelines
•
ADVANCE INFORMATION
•
•
Place the power-supply bypass capacitor as closely as possible to the supply and ground pins. The
recommended value of this bypass capacitor is 0.1 µF. Additional decoupling capacitance can be added to
compensate for noisy or high-impedance power supplies.
Make sure the thermal pad/GND are connected to a solid ground plane of the PCB.
The open-drain output pin is recommended to be pulled up to the supply voltage rail through a 10-kΩ pullup
resistor.
10.2 Layout Example
RSHUNT
Power
Supply
Load
VIA to Ground
Plane
IN+
IN1
CBYPASS
8
VS+
VOUT
2
VIA to Power
Supply
7
GND
ALERT
CMPIN
3
6
4
5
CMPREF
RESET
INA381
Copyright © 2017, Texas Instruments Incorporated
NOTE: Connect the limit resistor directly to the GND pin.
Figure 13. Recommended Layout
22
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation see the following:
REF31xx 15ppm/°C Maximum, 100-μA, SOT-23 Series Voltage Reference
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.3 Community Resources
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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ADVANCE INFORMATION
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
INA381
SBOS848 – DECEMBER 2017
www.ti.com
PACKAGE OUTLINE
DSG0008A
WSON - 0.8 mm max height
SCALE 5.500
PLASTIC SMALL OUTLINE - NO LEAD
2.1
1.9
A
B
PIN 1 INDEX AREA
2.1
1.9
ADVANCE INFORMATION
0.3
0.2
0.4
0.2
OPTIONAL TERMINAL
TYPICAL
C
0.8 MAX
SEATING PLANE
0.05
0.00
0.08 C
EXPOSED
THERMAL PAD
(0.2) TYP
0.9 0.1
5
4
6X 0.5
2X
1.5
SEE OPTIONAL
TERMINAL
9
1.6 0.1
8
1
PIN 1 ID
8X
0.4
0.2
8X
0.3
0.2
0.1
0.05
C A B
C
4218900/B 09/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
24
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SBOS848 – DECEMBER 2017
EXAMPLE BOARD LAYOUT
DSG0008A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(0.9)
8X (0.5)
( 0.2) VIA
TYP
1
8
8X (0.25)
(0.55)
SYMM
ADVANCE INFORMATION
9
(1.6)
6X (0.5)
5
4
SYMM
(R0.05) TYP
(1.9)
LAND PATTERN EXAMPLE
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4218900/B 09/2017
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
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INA381
SBOS848 – DECEMBER 2017
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EXAMPLE STENCIL DESIGN
DSG0008A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
8X (0.5)
SYMM
METAL
1
ADVANCE INFORMATION
8
8X (0.25)
(0.45)
SYMM
9
(0.7)
6X (0.5)
5
4
(R0.05) TYP
(0.9)
(1.9)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 9:
87% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:25X
4218900/B 09/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
26
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PACKAGE OPTION ADDENDUM
www.ti.com
31-Jan-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
INA381A1IDSGR
PREVIEW
WSON
DSG
8
3000
TBD
Call TI
Call TI
-40 to 125
INA381A1IDSGT
PREVIEW
WSON
DSG
8
250
TBD
Call TI
Call TI
-40 to 125
INA381A2IDSGR
PREVIEW
WSON
DSG
8
3000
TBD
Call TI
Call TI
-40 to 125
INA381A2IDSGT
PREVIEW
WSON
DSG
8
250
TBD
Call TI
Call TI
-40 to 125
INA381A3IDSGR
PREVIEW
WSON
DSG
8
3000
TBD
Call TI
Call TI
-40 to 125
INA381A3IDSGT
PREVIEW
WSON
DSG
8
250
TBD
Call TI
Call TI
-40 to 125
INA381A4IDSGR
PREVIEW
WSON
DSG
8
3000
TBD
Call TI
Call TI
-40 to 125
INA381A4IDSGT
PREVIEW
WSON
DSG
8
250
TBD
Call TI
Call TI
-40 to 125
PINA381A1IDSGR
ACTIVE
WSON
DSG
8
3000
TBD
Call TI
Call TI
-40 to 125
PINA381A2IDSGR
ACTIVE
WSON
DSG
8
3000
TBD
Call TI
Call TI
-40 to 125
PINA381A3IDSGR
ACTIVE
WSON
DSG
8
3000
TBD
Call TI
Call TI
-40 to 125
PINA381A4IDSGR
ACTIVE
WSON
DSG
8
3000
TBD
Call TI
Call TI
-40 to 125
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
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31-Jan-2018
(5)
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(6)
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Addendum-Page 2
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