Freescale MPC17559EP/R2 Micromotor driver with dual 3-phase and dual h-bridge output Datasheet

Freescale Semiconductor
Advance Information
Document Number: MPC17559
Rev. 1.0, 8/2006
Micromotor Driver with Dual
3-Phase and Dual H-Bridge
Outputs
17559
The 17559 is a monolithic quad H-Bridge power IC ideal for
portable electronic applications containing multiple brushless and
brush DC-motors.
The 17559 is designed to drive motors with supplies operating
from 0.9 V to 3.5 V, with independent control of each output bridge
via parallel 1.8 V to 3.6 V logic-compatible I/O. Each output bridge
has its own gate-drive and logic circuitry with built-in shoot-through
current protection.
The 17559 has a low total RDS(ON) of 1.7 Ω max @ 25°C for each
of the two 3-phase output bridges, and a low total RDS(ON) of 1.3 Ω
max @ 25°C for each of the two H-Bridge outputs.
The 17559 can efficiently drive many types of micromotors owing
to its low output resistance and high output slew rates.
MICROMOTOR
DRIVER WITH DUAL 3-PHASE
AND DUAL H-BRIDGE OUTPUTS
EP SUFFIX (Pb-FREE)
98ARH99036A
56-LEAD QFN
Features
• Two Separate Three-Phase Motor Drivers
• Two Separate H-Bridge Motor Drivers
• Low-Voltage Detection and Shutdown Circuitry
• Pb-Free Packaging Designated by Suffix Code EP
MCU
ORDERING INFORMATION
Device
Temperature
Range (TA)
Package
MPC17559EP/R2
- 20°C to 65°C
56 QFN
VM
VDD
VM
VDD
3-Phase Motor
17559
DC Motor
GND
Note Diagram represents one half of the dual application.
Figure 1. 17559 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2006. All rights reserved.
3-Phase Motor
DC Motor
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VG
VDD
VDD Low-Voltage
Detector
BIAS
VDD
VG
VG
CPUO1
VDD
OE
ROE
VG VDD
CPUI1
U
CPVO1
OE
OE
V
CPWO1
CPVO2
CPVI2
V
VG VDD
CPWI1
CPUI2
U
VG VDD
VG VDD
CPVI1
CPUO2
VG VDD
CPWO2
VG VDD
W
CPWI2
W
COM2
COM1
VM
VG VDD
VG VDD
VM
VMU1
VMU2
VMVW2
VMVW1
3-Phase
Predriver
Channel 1
UO1
VO1
WO1
PGNDW1
PGNDUV1
UI1
VI1
WI1
PWM1
VMR1
3-Phase
Predriver
Channel 2
VDD
3-Phase
Control
OE
Channel 1
UO2
VO2
WO2
VDD
OE
3-Phase
Control
Channel 2
VM
VM
VG VDD
VG VDD
VMR2
VMF1
VMF2
RO1
H-Bridge
Predriver
H-Bridge
Predriver
FO1
Channel 1
Channel 2
VDD
PGND1
PGNDW2
PGNDUV2
UI2
VI2
WI2
PWM2
FI1
H-Bridge
Control
RI1
Channel 1
RO2
FO2
VDD
OE
OE
PGND2
H-Bridge
Control
FI2
Channel 2
RI2
GND1
GND
GND2
Figure 2. 17559 Simplified Internal Block Diagram
17559
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
TERMINAL CONNECTIONS
CPVO2
CPUO2
PWM2
UI2
44
43
CPWO2
47
45
OE
48
46
GND1
49
CPWO1
52
VG
CPV1
53
VDD
CPUO1
54
50
PWM1
55
51
UI1
56
TERMINAL CONNECTIONS
VI1
1
42
VI2
WI1
2
41
WI2
PGNDW1
3
40
PGNDW2
WO1
4
39
WO2
VMVW1
5
38
VMVW2
VO1
6
37
VO2
PGNDUV1
7
36
PGNDUV2
UO1
8
35
UO2
VMU1
9
34
VMU2
VMR1
10
33
VMR2
RO1
11
32
RO2
PGND1
12
31
PGND2
FO1
13
30
FO2
VMF1
14
29
VMF2
15
16
17
18
19
20
21
22
23
24
25
26
27
28
FI1
RI1
COM1
CPUI1
CPVI1
CPWI1
GND2
NC
CPWI2
CPVI2
CPUI2
COM2
RI2
FI2
MPC17559
Figure 3. 17559 Terminal Connections
Table 1. 17559 Terminal Definitions
A functional description of each terminal can be found in the Functional Terminal Description section beginning on page 10.
Terminal
Number
Terminal
Name
Terminal
Function
Formal Name
1
VI1
Input
Three-Phase Input VI1
Three-phase driver channel 1 V input terminal.
2
WI1
Input
Three-Phase Input WI1
Three-phase driver channel 1 W input terminal.
3
PGNDW1
Ground
Power Ground w1
4
WO1
Output
Three-Phase Output WO1
5
VMVW1
Power
Motor Driver Power Supply vw1
6
VO1
Output
Three-Phase Output VO1
7
PGNDUV1
Ground
Power Ground uv1
Three-phase driver channel 1 UV phase power ground
terminal.
8
UO1
Output
Three-Phase Output UO1
Three-phase driver channel 1 U phase output terminal.
9
VMU1
Power
Motor Driver Power Supply u1
Three-phase driver channel 1 U phase power supply terminal.
10
VMR1
Power
Motor Driver Power Supply R2
H-Bridge driver channel 1 power supply terminal R.
11
RO1
Output
H-Bridge Output RO1
H-Bridge driver channel 1 reverse output terminal.
12
PGND1
Ground
Power Ground 1
H-Bridge driver channel 1 power ground terminal.
13
FO1
Output
H-Bridge Output FO1
H-Bridge driver channel 1 forward output terminal.
14
VMF1
Power
Motor Driver Power Supply F1
H-Bridge driver channel 1 power supply terminal F.
15
FI1
Input
Logic Input Control FI1
H-Bridge driver channel 1 forward input terminal.
16
RI1
Input
Logic Input Control RI1
H-Bridge driver channel 1 reverse input terminal.
Definition
Three-phase driver channel 1 W phase power ground terminal.
Three-phase driver channel 1 W output terminal.
Three-phase driver channel 1 VW phase power supply
terminal.
Three-phase driver channel 1 phase output terminal.
17559
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
TERMINAL CONNECTIONS
Table 1. 17559 Terminal Definitions (continued)
A functional description of each terminal can be found in the Functional Terminal Description section beginning on page 10.
Terminal
Number
Terminal
Name
Terminal
Function
Formal Name
17
COM1
Input
Forward Input UVW1
18
CPUI1
Input
Reverse Input UI1
Comparator channel 1 U reverse input terminal.
19
CPVI1
Input
Reverse Input VI1
Comparator channel 1 V reverse input terminal.
20
CPWI1
Input
Reverse Input WI1
Comparator channel 1 W reverse input terminal.
21
GND2
Ground
Ground 2
22
NC
23
CPWI2
Input
Reverse Input WI2
Comparator channel 2 W reverse input terminal.
24
CPVI2
Input
Reverse Input VI2
Comparator channel 2 V reverse input terminal.
25
CPUI2
Input
Reverse Input UI2
Comparator channel 2 U reverse input terminal.
26
COM2
Input
Forward Input UVW2
27
RI2
Input
Logic Input Control RI2
H-Bridge driver channel 2 reverse input terminal.
28
FI2
Input
Logic Input Control FI2
H-Bridge driver channel 2 forward input terminal.
29
VMF2
Power
Motor Driver Power Supply F2
H-Bridge driver channel 2 power supply terminal F.
30
FO2
Output
H-Bridge Output FO2
H-Bridge driver channel 2 forward output terminal.
31
PGND2
Ground
Power Ground 2
H-Bridge driver channel 2 power ground terminal.
32
RO2
Output
H-Bridge Output RO2
H-Bridge driver channel 2 reverse output terminal.
33
VMR2
Power
Motor Driver Power Supply R2
H-Bridge driver channel 2 power supply terminal R.
34
VMu2
Power
Motor Driver Power Suppy u2
Three-phase driver channel 2 U phase power supply terminal.
35
UO2
Output
Three-Phase Output UO2
Three-phase driver channel 2 U phase output terminal.
36
PGNDu2
Ground
Power Ground u2
Three-phase driver channel 2 UV phase power ground
terminal.
37
VO2
Output
Three-Phase Output VO2
Three-phase driver channel 2 V phase output terminal.
38
VMvw2
Power
Motor Driver Power Supply vw2
Three-phase driver channel 2 VW phase power supply
terminal.
39
WO2
Output
Three-Phase Output WO2
Three-phase driver channel 2 W phase output terminal.
40
PGNDw2
Ground
Power Ground w2
41
WI2
Input
Three-Phase Input WI2
Three-phase driver channel 2 W input terminal.
42
VI2
Input
Three-Phase Input VI2
Three-phase driver channel 2 V input terminal.
43
UI2
Input
Three-Phase Input UI2
Three-phase driver channel 2 U input terminal.
44
PWM2
Input
PWM Input 2
45
CPUO2
Output
Comparator Output UO2
Comparator channel 2 U output terminal.
46
CPVO2
Output
Comparator Output VO2
Comparator channel 2 V output terminal.
47
CPWO2
Output
Comparator Output WO2
Comparator channel 2 W output terminal.
48
OE
Output
Output Enable
49
GND1
Ground
Ground 1
50
VDD
Power
Logic Supply
51
VG
52
CPWO1
Output
Comparator Output WO1
Comparator channel 1 W output terminal.
53
CPVO1
Output
Comparator Output VO1
Comparator channel 1 V output terminal.
54
17559
CPUO1
Output
Comparator Output UO1
Comparator channel 1 U output terminal.
4
No Connect
Gate Boost Voltage
Definition
Comparator channel 1 UVW forward input terminal.
Control circuit ground terminal 2.
This terminal is not used.
Comparator channel 2 UVW forward input terminal.
Three-phase driver channel 2 W phase power ground terminal.
Three-phase driver channel 2 PWI input terminal.
Output enable input terminal.
Control circuit ground terminal.
Control circuit power supply terminal.
Gate drive boost voltage.
Analog Integrated Circuit Device Data
Freescale Semiconductor
TERMINAL CONNECTIONS
Table 1. 17559 Terminal Definitions (continued)
A functional description of each terminal can be found in the Functional Terminal Description section beginning on page 10.
Terminal
Number
Terminal
Name
Terminal
Function
Formal Name
55
PWM1
Input
PWM Input 1
56
UI1
Input
Three-Phase Input UI1
Definition
Three-phase driver channel 1 PWM input terminal.
Three-phase driver channel 1 U input terminal.
17559
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Ratings
Symbol
Value
Unit
Motor Supply Voltage (1)
VM
- 0.5 to 5.0
V
Logic Supply Voltage
VDD
- 0.5 to 4.0
V
VG
VDD - 0.5 to 11
V
VIL
- 0.5 to VDD + 0.5
V
VIA
- 0.5 to VM + 0.5
IO
300
IOPK
600
ELECTRICAL RATINGS
Gate Drive Boost Voltage
Logic Signal Input Voltage
(2)
Analog Signal Input Voltage (3)
Driver Output Current (4)
mA
DC
Peak (5)
ESD Voltage
V
(6)
VESD1
± 1000
VESD2
± 200
Control Circuit Output Current (8)
IOV
10
mA
Power Dissipation (TA = 25°C)
PD
1650
mW
Operating Junction Temperature
TJ
150
°C
Operating Ambient Temperature
TA
- 20 to 65
°C
RθJA
TBD
°C/W
TSTG
- 65 to 150
°C
TSOLDER
240
°C
Human Body Model
Machine Model
(7)
THERMAL RATINGS
Thermal Resistance
Storage Temperature
Terminal Soldering Temperature
Notes
1.
2.
3.
4.
5.
6.
(9)
VMu1, VMu2, VMvw1, VMvw2, VMF1, VMR1, VMF1, and VMR2 terminals.
OE, UI1, VI1, WI1, PWM1, UI2, VI2, WI2, PWM2, FI1, RI1, FI2, and RI2 terminals.
COM1, CPUI1, CPVI1, CPWI1, COM2, CPUI2, CPVI2, and CPWI2 terminals.
FO1, RO1, FO2, RO2, UO1, VO1, WO1, UO2, VO2, and WO2 terminals.
TA = 25°C, 0.2 sec cycle, 10 ms max.
ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 Ω).
7.
ESD2 testing is performed in accordance with the Machine Model (CZAP = 200 pF, RZAP = 0 Ω).
8.
9.
CPUO1, CPVO1, CPWO1, CPUO2, CPVO2, and CPWO2 terminals.
Soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
17559
6
Analog Integrated Circuit Device Data
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions VM = 1.2 V, VDD = 2.4 V, VCRES = 6.8 V, 7.0 V ≤ VG ≤ 18 V, - 20°C ≤ TA ≤ 65°C,
GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal
conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
Motor Supply Voltage (10)
VM
0.9
1.2
3.5
V
Logic Supply Voltage
VDD
1.8
2.4
3.5
V
VG
VM + 5.0
–
9.0
V
POWER
Gate Drive Boost Voltage
Standby Power Supply Current
(11)
Motor Supply Standby Current
IV
I MSTBY
VDDSTBY
I
VGSTBY
µA
–
–
1.0
–
–
1.0
–
–
1.0
VDDN
I
VGN
–
30
60
–
75
120
Logic Supply Current
IV
Gate Drive Boost Voltage
I
Logic Supply Standby Current
Gate Drive Boost Voltage
No Signal Input Supply Current
(12)
Logic Supply Current
Gate Drive Boost Voltage
I
µA
Active Supply Current (13)
–
50
100
µA
VG
–
0.54
0.65
mA
Three-Phase Drivers
RDS(ON)3p
–
1.30
1.70
H-Bridge Drivers
RDS(ON)hb
–
0.87
1.30
Circuit Disable Voltage
VLOon
0.75
1.07
1.60
Circuit Enable Voltage
VLOoff
0.75
1.13
1.60
DD
Driver Output ON Resistance (14)
Ω
Low-Voltage Detector Voltage
V
Notes
10. VMU1, VMU2, VMVW1, VMVW2, VMF1, VMR1, VMF2, and VMR2 terminals.
11. UI1, VI1, WI1, PWM1, UI2, VI2, WI2, PWM2, FI1, RI1, FI2, and RI2 are “L” (low) or “H” (high) when OE = “L” (low).
12.
UI1, VI1, WI1, PWM1, UI2, VI2, WI2, PWM2, FI1, RI1, FI2, and RI2 are “L” (low) or “H” (high) when OE = “H” (high).
13.
OE = ”H” (high), fPWM = 176.4 kHz, fUVM = 100 Hz, fIN = 88.2 kHz.
14.
Summary of top and bottom when IO = 100 mA.
17559
Analog Integrated Circuit Device Data
Freescale Semiconductor
7
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics (continued)
Characteristics noted under conditions VM = 1.2 V, VDD = 2.4 V, VCRES = 6.8 V, 7.0 V ≤ VG ≤ 18 V, - 20°C ≤ TA ≤ 65°C,
GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal
conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
High-Level Input Voltage (15)
VIH
VDD x 0.7
–
–
V
Low-Level Input Voltage (15)
VIL
–
–
VDD x 0.3
V
IIH
–
–
1.0
µA
IIL
-1.0
–
–
µA
Analog Signal Input Voltage (17)
VIA
0
–
VM
V
OE Terminal Pull-Down Resistance
ROE
330
660
1000
kΩ
Offset Voltage
VOS
-5.0
–
5.0
mV
Input Current
ICP
-1.0
–
1.0
µA
High-Level Output Voltage (20)
VOH
VDD x 0.85
–
–
Low-Level Output Voltage (21)
VOL
–
–
VDD x 0.15
CONTROL LOGIC
Logic Input
High-Level Input Current (16)
Low-Level Input Current (15)
Comparator Input
(18)
Comparator Output
Notes
15.
16.
17.
18.
19.
20.
21.
(19)
V
OE, UI1, VI1, WI1, PWM1, UI2, VI2, WI2, PWM2, FI1, RI1, FI2, and RI2 terminals.
UI1, VI1, WI1, PWM1, UI2, VI2, WI2, PWM2, FI1, RI1, FI2, and RI2 terminals.
COM1, CPUI1, CPVI1, CPWI1, COM2, CPUI2, CPVI2, and CPWI2 terminals.
CPUI1, CPVI1, CPWI1, CPUI2, CPVI2, and CPWI2 terminals.
CPUO1, CPVO1, CPWO1, CPUO2, CPVO2, and CPWO2 terminals.
ISOURCE = 500 µA.
ISINK = 500 µA.
17559
8
Analog Integrated Circuit Device Data
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics
Characteristics noted under conditions VM = 1.2 V, VDD = 2.4 V, VCRES = 6.8 V, 7.0 V ≤ VG ≤ 18 V, - 40°C ≤ TA ≤ 125°C,
GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal
conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
PWM1, PWM2
fPWM
–
176.4
–
kHz
UI1, VI1, WI1, UI2, VI2, WI2
fUVW
–
100
–
Hz
fIN
–
88.2
–
kHz
INPUT
Input Signal Frequency
FI1, RI1, FI2, RI2
17559
Analog Integrated Circuit Device Data
Freescale Semiconductor
9
FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 17559 is a monolithic dual 3-phase plus dual H-Bridge
multiple motor driver IC ideal for portable electronic
applications containing two brushless DC motors plus two DC
brush motors (or plus one bipolar step motor). The control
logic translates the input signals to the gate-driver circuitry
while providing cross-conduction suppression.
The drivers are designed to be PWM’ed at high
frequencies for efficient and noise-free motor control. The
17559 is designed for portable audio and video applications
such as camcorders, but it may be used in any application
requiring highly efficient control of micromotors.Authors’
Note:
FUNCTIONAL DESCRIPTION
THREE-PHASE DRIVER CHANNEL 1 INPUT
(UI1, VI1, AND WI1)
THREE-PHASE DRIVER CHANNEL 2 OUTPUT
(UO2, VO2, AND WO2)
The three-phase driver channel 1 input terminals (UI1, VI1,
and VI1) set the driver states (UO1, VO1, and WO1) in
accordance with the logic set force defined in Table 7,
page 11. Typically these inputs are supplied from an MCU or
a digital signal processor (DSP) to provide the phasing of the
currents applied to a brushless DC motor.
The three-phase driver channel 2 output terminals (UO2,
VO2, and WO2) drive a three-phase motor, as well as supply
the peak currents with applied ON resistance (RDS(ON)hb).
THREE-PHASE DRIVER CHANNEL 2 PHASE
POWER GROUND (PGNDW2 AND PGNDUV2)
The three-phase driver channel 1 output terminals (UO1,
VO1, and WO1) drive a three-phase motor, as well as supply
the peak currents with applied ON resistance (RDS(ON)hb).
The three-phase driver channel 2 phase power ground
terminals (PGNDw2 and PGNDuv2) are ground terminals for
three-phase driver channel 2. PGNDw2 is a ground for W
phase driver, and PGNDuv2 is a ground for U and V phase
driver. PGNDw2 and PGNDuv2 are physically connected in
the IC in order to reduce internal resistance.
THREE-PHASE DRIVER CHANNEL 1 PHASE
POWER GROUND (PGNDW1 AND PGNDUV1)
THREE-PHASE DRIVER CHANNEL 2 PHASE
POWER SUPPLY (VMVW2 AND VMU2)
The three-phase driver channel 1 phase power ground
terminals (PGNDw1 and PGNDuv1) are ground terminals for
three-phase driver channel 1. PGNDw1 is a ground for W
phase driver, and PGNDuv1 is a ground for U and V phase
driver. PGNDw1 and PGNDuv1 are physically connected in
the IC in order to reduce internal resistance.
The three-phase driver channel 2 phase power supply
terminals (VMvw2 and VMu2) are power supply terminals for
three-hase driver channel 2. VMvw2 is a power supply for V
and W phase driver, and VMu2 is a power supply for U phase
driver. VMvw2 and VMu2 are phyically connected in the IC in
order to reduce internal resistance.
THREE-PHASE DRIVER CHANNEL 1 PHASE
POWER SUPPLY (VMVW1 AND VMU1)
LOGIC INPUT (OE, FI1, RI1, FI2, AND RI2)
THREE-PHASE DRIVER CHANNEL 1 OUTPUT
(UO1, VO1, AND WO1)
The three-phase driver channel 1 phase power supply
terminals (VMvw1 and VMu1) are power supply terminals for
three-phase driver channel 1. VMvw1 is a power supply for V
and W phase driver, and VMu1 is a power supply for U phase
driver. VMvw1 and VMu1 are phyically connected in the IC in
order to reduce internal resistance.
THREE-PHASE DRIVER CHANNEL 2 INPUT
(UI2, VI2, AND WI2)
The three-phase driver channel 2 input terminals (UI2, VI2,
and WI2) set the driver states (UO2, VO2, and WO2) in
accordance with the logic set force in Table 7. Typically these
inputs are supplied from an MCU or DSP to provide the
phasing of the current applied to a brushless DC motor.
These logic input terminals control each H-Bridge output.
OE = 1 is an output enable for each H-Bridge control and for
each three-phase comparator (refer to Table 6, page 11).
H-BRIDGE OUTPUTS (RO1, FO1, RO2, AND FO2)
These terminals provide connection to the outputs of each
internal H-Bridge (see Figure 1, 17559 Simplified Application
Diagram, page 1).
POWER SUPPLY (VMR1, VMF1, VMR2, AND VMF2)
These VM terminals carry the main power supply voltage
and current into the H-Bridge power section of the 17559.
The supply voltage then becomes controlled and/or
modulated by the IC as it delivers the power to the loads
attached between the output terminals. All VM terminals are
connected internally for VMR1 and VMF1, and VMR2 and
17559
10
Analog Integrated Circuit Device Data
Freescale Semiconductor
FUNCTIONAL DESCRIPTION
LOGIC COMMAND REGISTERS
GROUND (GND1 AND GND2)
VMF2, but they must be connected together on the printed
circuit board.
The GND1 and GND2 are main ground terminals for
internal logic. They are connected internally.
SUPPLY VOLTAGE (VDD)
POWER INPUT (PWM)
The VDD terminal carries the logic supply voltage and
current into the logic sections of the 17559. The VDD has an
undervoltage threshold. If the supply voltage drops between
the undervoltage threshold, the output power stage switches
to a tri-state condition. When the supply voltage returns to a
level that is above the threshold, the power stage
automatically resumes normal operation according to the
established condition of the input terminals.
The pulse width modulation input provides a single input
terminal to accomplish PWM modulation of the output pairs in
accordance with the states of input conditions described in
Table 7.
LOGIC COMMAND REGISTERS
Table 5. Operating Function
OE
Bias Circuit
H Bridge Driver
3 Phase Driver
Comparator
L
Stop
Output “L”
Output “L”
1*
H
Operation
Operation
Operation
Operation
L = Low.
H = High.
*1: CPUO1, CPVO1, CPWO1 Output = L, CPUO2, CPVO2, CPWO2 Output = H.
Table 6. H-Bridge Driver
Input
Output
OE
FIn
RIn
FOn
ROn
L
X
X
L
L
H
L
L
L
L
H
L
H
L
H
H
H
L
H
L
H
H
H
L
L
L = Low.
H = High.
X = Don’t care.
Z = High impedance.
Table 7. Three-Phase Driver
Input
Output
OE
UIn
VIn
WIn
UOn
VOn
WOn
L
X
X
X
L
L
L
H
L
L
L
L
L
L
H
L
L
H
Z
L
PWM
H
L
H
L
L
PWM
Z
17559
Analog Integrated Circuit Device Data
Freescale Semiconductor
11
FUNCTIONAL DESCRIPTION
LOGIC COMMAND REGISTERS
Table 7. Three-Phase Driver
H
L
H
H
L
Z
PWM
H
H
L
L
PWM
Z
L
H
H
L
H
PWM
L
Z
H
H
H
L
Z
PWM
L
H
H
H
H
L
L
L
L = Low.
H = High.
X = Don’t care.
Z = High impedance.
PWM = Duty pulse same as PWM terminal input.
17559
12
Analog Integrated Circuit Device Data
Freescale Semiconductor
TYPICAL APPLICATIONS
INTRODUCTION
TYPICAL APPLICATIONS
INTRODUCTION
Figure 4 shows a typical application for the 17559.
VG
VDD
VDD
VG
VDD
BIAS
VDD Low-Voltage
Detector
OE
CPUO1
CPUO2
ROE
VG VDD
VG VDD
CPUI1
CPUI2
U
OE
CPVO1
U
OE
CPVO2
VG VDD
VG VDD
CPVI1
CPWO1
CPVI2
V
V
CPWO2
VG VDD
VG VDD
CPWI1
CPWI2
W
W
COM1
VMu1
COM2
VG VDD
VG VDD
VMu2
VMvw2
VMvw1
UO1
VO1
WO1
3-Phase
Predriver
Channel 1
3-Phase
Predriver
Channel 2
3-Phase Motor
PGNDw1
PGNDuv1
UI1
VI1
WI1
PWM1
VMR1
OE
Channel 1
VO2
WO2
3-Phase Motor
PGNDw2
PGNDuv2
VDD
VDD
3-Phase
Control
UO2
OE
UI2
VI2
WI2
PWM2
3-Phase
Control
Channel 2
VG VDD
VMR2
VG VDD
VMF1
RO1
FO1
VMF2
H-Bridge
Predriver
H-Bridge
Predriver
RO2
Channel 1
Channel 2
FO2
VDD
PGND1
FI1
RI1
VG
H-Bridge
Control
Channel 1
VDD
OE
OE
PGND2
H-Bridge
Control
FI2
RI2
Channel 2
GND1
GND
GND2
Figure 4. 17559 Typical Application Diagram
17559
Analog Integrated Circuit Device Data
Freescale Semiconductor
13
TYPICAL APPLICATIONS
INTRODUCTION
CEMF SNUBBING TECHNIQUES
PCB LAYOUT
Care must be taken to protect the IC from potentially
damaging CEMF spikes induced when commutating currents
in inductive loads. Typical practice is to provide snubbing of
voltage transients by placing a capacitor or zener at the motor
supply voltage terminal (VM).
When designing the printed circuit board (PCB), connect
sufficient capacitance between power supply and ground
terminals to ensure proper filtering against transients. For all
high-current paths, use wide copper traces and the shortest
possible distances.
17559
14
Analog Integrated Circuit Device Data
Freescale Semiconductor
PACKAGING
PACKAGE DIMENSIONS
PACKAGING
PACKAGE DIMENSIONS
For the most current package revision, visit www.freescale.com and perform a “keyword” search using the 98ARH99036A
listed.
EP SUFFIX
56-LEAD QFN
PLASTIC PACKAGE
98ARH99036A
ISSUE B
17559
Analog Integrated Circuit Device Data
Freescale Semiconductor
15
PACKAGING
PACKAGE DIMENSIONS
EP SUFFIX
56-LEAD QFN
PLASTIC PACKAGE
98ARH99036A
ISSUE B
17559
16
Analog Integrated Circuit Device Data
Freescale Semiconductor
PACKAGING
PACKAGE DIMENSIONS
EP SUFFIX
56-LEAD QFN
PLASTIC PACKAGE
98ARH99036A
ISSUE B
17559
Analog Integrated Circuit Device Data
Freescale Semiconductor
17
REVISION HISTORY
REVISION HISTORY
REVISION
Rev. 1.0
DATE
8/2006
DESCRIPTION OF CHANGES
• Initial Release
17559
18
Analog Integrated Circuit Device Data
Freescale Semiconductor
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MPC17559
Rev. 1.0
8/2006
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