PCA EPA3368-25 14 pin dip and smd 5 tap low-profile fast logic ttl compatible active delay line Datasheet

14 Pin DIP and SMD 5 Tap Low-Profile Fast Logic TTL
Compatible Active Delay Lines
Compatible with standard auto-insertable equipment and can be used in either infrared or vapor phase process.
Delays are ±5% or ±2 nS†
Total
Tap
5, 10, 15, 20
6, 12, 18, 24
7, 14, 21, 28
8, 16, 24, 32
9, 18, 27, 36
10, 20, 30, 40
12, 24, 36, 48
15, 30, 45, 60
20, 40, 60, 80
25, 50, 75, 100
30, 60, 90, 120
35, 70, 105, 140
25
30
35
40
45
50
60
75
100
125
150
175
DIP Part
Number
SMD Part
Number
Delays are ±5% or ±2 nS†
Total
Tap
EPA3368-25
EPA3368-30
EPA3368-35
EPA3368-40
EPA3368-45
EPA3368-50
EPA3368-60
EPA3368-75
EPA3368-100
EPA3368-125
EPA3368-150
EPA3368-175
EPA3368G-25
EPA3368G-30
EPA3368G-35
EPA3368G-40
EPA3368G-45
EPA3368G-50
EPA3368G-60
EPA3368G-75
EPA3368G-100
EPA3368G-125
EPA3368G-150
EPA3368G-175
40, 80, 120, 160
45, 90, 135, 180
50, 100, 150, 200
60, 120, 180, 240
70, 140, 210, 280
80, 160, 240, 320
84, 168, 252, 336
88, 176, 264, 352
90, 180, 270, 360
84, 188, 282, 376
100, 200, 300, 400
DC Electrical Characteristics
Parameter
Test Conditions
EPA3368-200
EPA3368-225
EPA3368-250
EPA3368-300
EPA3368-350
EPA3368-400
EPA3368-420
EPA3368-440
EPA3368-450
EPA3368-470
EPA3368-500
EPA3368G-200
EPA3368G-225
EPA3368G-250
EPA3368G-300
EPA3368G-350
EPA3368G-400
EPA3368G-420
EPA3368G-440
EPA3368G-450
EPA3368G-470
EPA3368G-500
Schematic
Min. Max. Unit
VOH
VOL
VIK
IIH
High-Level Output Voltage
Low-Level Output Voltage
Input Clamp Voltage
High-Level Input Current
VCC = Min. V IL = Max. I OH = Max. 2.7
VCC = Min. VIH = Min. I OL= Max.
VCC = Min. II = IIK
VCC = Max. V IN = 2.7V
IIL
IOS
Low-Level Input Current
Short Circuit Output Current
VCC = Max. V IN = 0.5V
VCC = Max. V OUT = 0.
(One output at a time)
VCC = Max. V IN = OPEN
VCC = Max. V IN = 0
Td ≤ 500 nS (0.75 to 2.4 Volts)
Td > 500 nS
VCC = Max. V OH = 2.7V
VCC = Max. V OL = 0.5V
ICCH High-Level Supply Current
ICCL Low-Level Supply Current
TRO Output Rise Time
Fanout High-Level Output
Fanout Low-Level Output
-80
0.5
-1.2
20
V
V
V
µA
-0.6
-150
mA
mA
14
12
VCC
4
10
6
8
OUTPUT
INPUT 1
25
mA
40
mA
4
nS
5
nS
20 TTL LOAD
10 TTL LOAD
7 GROUND
Input Pulse Test Conditions @ 25° C
Recommended
Operating Conditions
VCC
VIH
VIL
IIK
IOH
IOL
PW*
d*
TA
SMD Part
Number
Delay times referenced from input to leading edges at 25°C, 5.0V, with no load.
†Whichever is greater.
NH
NL
200
225
250
300
350
400
420
440
450
470
500
DIP Part
Number
Min. Max.
Supply Voltage
High-Level Input Voltage
Low-Level Input Voltage
Input Clamp Current
High-Level Output Current
Low-Level Output Current
Pulse Width of Total Delay
Duty Cycle
Operating Free-Air Temperature
4.75
2.0
5.25
0.8
-18
-1.0
20
20
50
+70
0
Unit
V
V
V
mA
mA
mA
%
%
°C
EIN
PW
TRI
PRR
VCC
Pulse Input Voltage
Pulse Width % of Total Delay
Pulse Rise Time (0.75 - 2.4 Volts)
Pulse Repetition Rate @ Td ≤ 200 nS
Pulse Repetition Rate @ Td > 200 nS
Supply Voltage
Unit
3.2
110
2.0
1.0
100
5.0
Volts
%
nS
MHz
KHz
Volts
*These two values are inter-dependent.
SMD Package
Pin 1
I.D.
PCA
EPA3368G-XX
Date Code
.300
Typ.
.019
± .002
.270
Suggested Solder
Pad Layout
Pin 1
I.D.
.200
PCA
EPA3368-XX
Date Code
.300
.300
.280
Max.
.100
.030
.780 Max.
.010
± .005
.010
Typ.
0°-8°
.100
Typ.
DSA3368G-XX & DSA3368-XX
.055
.420
.200
Typ.
.770
.155
DIP Package
.200
.085
Typ.
.035
.380
.020
Min.
.200
Max.
.020
Typ.
.125 ± .01
Rev. - 3/18/97
Unless Otherwise Noted Dimensions in Inches
Tolerances:
Fractional = ± 1/32
.XX = ± .030
.XXX = ± .010
.365
Max.
.010
Typ.
QAF-CSO1 Rev. B 8/25/94
ELECTRONICS
INC.
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
TEL: (818) 892-0761
FAX: (818) 894-5791
Similar pages