IFX24401 Low Dropout Voltage Regulator IFX24401TEV50 IFX24401ELV50 Data Sheet Rev. 1.02, 2009-12-10 Standard Power Low Dropout Voltage Regulator 1 IFX24401 Overview Features • • • • • • • • • • • Output voltage 5 V ±2% Ultra low current consumption: 20 µA (typ.) 300 mA current capability Enable input Very low-drop voltage Short circuit protection Overtemperature protection Low Dropout Voltage, 250mV (typ.) High Input Voltage 45 V Temperature Range -40 °C ≤ Tj ≤ 125 °C Green Product (RoHS compliant) PG-TO252-5 Applications • • • • • Battery powered devices (e.g. Handheld GPS) Portable Radios HDTV Televisions Game Consoles Network Routers PG-SSOP-14 For automotive and transportation applications, please refer to the Infineon TLE and TLF voltage regulator series. Functional Description The IFX24401 is a monolithic integrated low-drop voltage regulator for load currents up to 300 mA. The output voltage is regulated to VQ,nom = 5.0 V with an accuracy of ±2%. A sophisticated design allows stable operation with low ESR ceramic output capacitors down to 470 nF. The device is designed for the harsh environments. Therefore it is protected against overload, short circuit and overtemperature conditions. Due to its ultra low stand-by current consumption of 20 µA (typ.) the IFX24401 is ideal for use in battery powered applications. The regulator can be shut down via an Enable input which further reduces the current consumption to 5 µA (typ.). An integrated output sink current circuitry keeps the voltage at the Output pin Q below 5.5 V even when reverse currents are applied. Thus connected devices are protected from overvoltage damage. Type Package Marking IFX24401TEV50 PG-TO252-5 2440150 IFX24401ELV50 PG-SSOP-14 24401V50 Data Sheet 2 Rev. 1.02, 2009-12-10 IFX24401 Block Diagram 2 Block Diagram IFX24401 I Q Overtemperature Shutdown Bandgap Reference EN 1 Enable Charge Pump GND Figure 1 Data Sheet Block Diagram 3 Rev. 1.02, 2009-12-10 IFX24401 Pin Configuration 3 Pin Configuration I NC EN Q Figure 2 Pin Configuration PG-TO252-5 (top view) 3.1 Pin Definitions and Functions (PG-TO252-5 ) Pin Symbol Function 1 I Input Connect ceramic capcitor between I and GND 2 N.C. No Connect May be open or connected to GND 3 GND Ground Internally connected to heat slug 4 EN Enable Input Low signal level disables the regulator. Pull-down resistor is integrated. 5 Q Output Place capacitor between Q pin and GND. Capacitor placement should be close to pin. Refer to capacitance and ESR requirements in “Functional Range” on Page 6 Heat Slug -- Heat Slug Connect to board GND and heatsink Data Sheet 4 Rev. 1.02, 2009-12-10 IFX24401 Pin Configuration 1& 1& 1& , 1& 1& *1' 1& 1& 1& (1 4 1& 1& 3,1&21),*B662369* Figure 3 Pin Configuration PG-SSOP-14 (top view) 3.2 Pin Definitions and Functions (PG-SSOP-14 ) Pin Symbol Function 1,2,3,5,7 N.C. No Connect May be open or connected to GND 4 GND Ground 6 EN Enable Input Low signal level disables the regulator. Pull-down resistor is integrated. 8,10,11,1 2,14 N.C. No Connect May be open or connected to GND 9 Q Output Place capacitor between Q pin and GND. Capacitor placement should be close to pin. Refer to capacitance and ESR requirements in “Functional Range” on Page 6 13 I Input Connect ceramic capcitor between I and GND Pad Data Sheet Exposed Pad Connect to board GND and heatsink 5 Rev. 1.02, 2009-12-10 IFX24401 General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Absolute Maximum Ratings1) Tj = -40 °C to 150 °C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Limit Values Min. Unit Test Condition Max. Input I Voltage Current VI II -0.3 45 V – -1 – mA – VEN -0.3 45 V Observe current limit IEN -1 1 mA – VQ VQ IQ -0.3 5.5 V – -0.3 6.2 V t < 10 s3) -1 – mA – Tj Tstg -40 150 °C – -50 150 °C – Enable EN Voltage Current IEN,max2) Output Q Voltage Voltage Current Temperature Junction temperature Storage temperature 1) Not subject to production test, specified by design. 2) External resistor required to keep current below absolute maximum rating when voltages ≥ 5.5 V are applied. 3) Exposure to these absolute maximum ratings for extended periods (t > 10 s) may affect device reliability. Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. 4.2 Functional Range Parameter Input voltage Junction temperature Output Capacitor Symbol Limit Values Min. Max. VI Tj CQ 5.5 42 ESR (CQ) Unit Remarks V – -40 125 °C – 470 – nF 1) – 10 Ω f = 10 kHz 1) The minimum output capacitance requirement is applicable for a worst case capacitor tolerance of 30% Note: In the operating range, the functions given in the circuit description are fulfilled. Data Sheet 6 Rev. 1.02, 2009-12-10 IFX24401 General Product Characteristics 4.3 Pos. Thermal Resistance Parameter Symbol Limit Value Min. Typ. Unit Conditions Max. IFX24401TEV50 (PG-TO252-5, ) 4.3.1 Junction to Case1) RthJC RthJA – 4 – K/W measured to pin 5 – 115 – K/W Footprint only2) 4.3.3 – 57 – K/W 300mm2 heatsink area on PCB2) 4.3.4 – 42 – K/W 600mm2 heatsink area on PCB2) – 7 – K/W measured to pin 5 – 120 – K/W Footprint only2) 4.3.7 – 59 – K/W 300mm2 heatsink area on PCB2) 4.3.8 – 49 – K/W 600mm2 heatsink area on PCB2) 4.3.2 Junction to Ambient 1) IFX24401ELV50 (PG-SSOP-14) 4.3.5 4.3.6 Junction to Case1) Junction to Ambient 1) RthJC RthJA 1) not subject to production test, specified by design 2) EIA/JESD 52_2, FR4, 80 × 80 × 1.5 mm; 35µ Cu, 5µ Sn Data Sheet 7 Rev. 1.02, 2009-12-10 IFX24401 General Product Characteristics Table 1 Electrical Characteristics VI = 13.5 V; VEN = 5 V; -40 °C < Tj < 125 °C (unless otherwise specified) Parameter Symbol Limit Values Min. Typ. Max. Unit Measuring Condition Output Q Output voltage VQ 4.9 5.0 5.1 V 0.1 mA < IQ < 300 mA; 6 V < VI < 16 V Output voltage VQ 4.9 5.0 5.1 V 0.1 mA < IQ < 100 mA; 6 V < VI < 40 V Output current limit IQ,LIM IQ,LIM Iq 320 – – mA 1) – – 800 mA – 20 30 µA Current consumption; Iq = II - IQ Iq – – 40 µA Quiescent current; Disabled Iq – 5 9 µA Drop voltage Vdr – 250 500 mV VQ = 0V IQ = 0.1 mA; Tj = 25 °C IQ = 0.1 mA; Tj ≤ 80 °C VEN = 0 V; Tj < 80 °C IQ = 200 mA; Vdr = VI - VQ1) IQ = 5 mA to 250 mA Vl = 10V to 32 V; IQ = 5 mA fr = 100 Hz; Vr = 0.5 Vpp Output current limit Current consumption; Iq = II - IQ Load regulation ∆VQ, lo -40 15 40 mV Line regulation ∆VQ, li -20 5 20 mV Power supply ripple rejection PSRR – 60 – dB Temperature output voltage drift dVQ/dT – 0.5 – mV/K – VEN ON VEN OFF IEN ON IEN OFF 3.1 – – V VQ ≥ 4.9 V – – 0.8 V VQ ≤ 0.3 V – 3 4 µA – 0.5 1 µA VEN = 5 V VEN = 0 V; Tj < 80 °C Enable Input EN Turn-on Voltage Turn-off Voltage H-input current L-input current 1) Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V. Data Sheet 8 Rev. 1.02, 2009-12-10 IFX24401 Typical Performance Characteristics 5 Typical Performance Characteristics Current Consumption Iq versus Junction Temperature TJ Current Consumption Iq versus Input Voltage VQ 1_Iq -Tj .v s d 3_IQ -V I.V S D Iq [µA ] T J = 25 °C Iq [µA] VI = 13.5V 100 40 IQ = 100 µA 10 IQ = 50mA 30 IQ = 10mA 20 1 I Q = 0.2mA 10 0.01 -40 -20 0 20 40 60 80 100 120 140 0 10 20 30 T J [°C] 40 VI [V ] Current Consumption Iq versus Output Current IQ Output Voltage VQ versus Junction Temperature TJ 5A_VQ-TJ.VSD 2_IQ-IQ.VSD 30 Iq [µA] VI = 13.5 V VQ [V] VI = 13.5 V Tj = 25 °C Tj = -40 °C 20 5.05 15 5.00 10 4.95 5 4.90 0 Data Sheet 20 40 60 100 -40 -20 IQ [mA] IQ =100µA...100mA 0 20 40 60 80 100 120 140 Tj [°C] 9 Rev. 1.02, 2009-12-10 IFX24401 Typical Performance Characteristics Dropout Voltage Vdr versus Output Current IQ Maximum Output Current IQ versus Junction Temperature Tj 6_V DR-IQ .V S D 600 8_IQMA X -TJ . V S D 620 Vdr [mV ] VI = 13.5 V IQ [mA ] T J = 150 °C 400 580 TJj = 25 °C 300 560 200 540 TJ = -40 °C 100 520 0 100 200 500 -40 -20 300 0 20 40 60 80 100 120 140 IQ [mA] Dropout Voltage Vdr versus Junction Temperature TJ [°C] Maximum Output Current IQ versus Input Voltage VI 7_V DR-TJ . V S D 600 9_S OA. V S D 600 IQ,L IM T j = 125 °C [mA] Vdr [mV] T j = 25 °C IQ = 250 mA 400 400 300 300 IQ = 150mA 200 200 100 100 IQ = 10 mA -40 -20 0 20 40 60 0 80 100 120 140 20 30 40 VI [V] TJ [°C] Data Sheet 10 10 Rev. 1.02, 2009-12-10 IFX24401 Typical Performance Characteristics Output Voltage VQ Start-up behavior Region of Stability 14_V Itime _s tartup. v s d 12_ESR-IQ.VSD 100 CQ = 10nF ...10 µF Tj = 25 °C ESRCQ [Ω] VQ [V] EN = HIGH 10 5.05 1 IQ = 5mA 5.00 Stable Region 4.90 0.1 4.80 0.01 0 50 100 150 200 2 1 3 Power Supply Ripple Rejection PSRR versus Frequency f t [ms] Load Regulation ∆VQ versus Output Current Change ∆IQ 13_P S RR. V S D 80 [dB ] [mV ] IQ = 100 mA 60 -10 50 -15 40 -20 10 VRIPPLE = 0.5 V PP VI = 13 .5 V CQ = 10 µF Tantalum TJ = 25 °C 100 1k T j = -40 °C Tj = 25 °C T j = 150 °C -25 10k -30 100 k f [Hz] Data Sheet VI = 6V ∆VQ I Q = 30 mA 30 18a_dV Q-dIQ _V i6V. vs d 0 IQ = 0.1 mA PSRR 5 4 IQ [mA] 0 50 100 150 250 IQ [mA] 11 Rev. 1.02, 2009-12-10 IFX24401 Typical Performance Characteristics Load Regulation ∆VQ versus Output Current Change dIQ Line Regulation ∆VQ versus Input Voltage Changed VI 18b_dV Q-dIQ_V i135V. vs d 0 V I = 13 .5V ∆VQ 19_dV Q-dV I__150C. v sd 0 TJ = 150 °C ∆VQ [mV ] [mV ] IQ = 1mA -10 IQ = 10 mA IQ = 100 mA -2 T J = -40 °C -15 -3 T J = 25 °C -20 -4 -25 -5 IQ = 200mA T J = 150 °C -30 0 50 100 150 -6 250 0 5 15 20 25 10 30 35 40 45 IQ [mA] Load Regulation ∆VQ versus Output Current Change ∆IQ VI [V] Line Regulation ∆VQ versus Input Voltage Changed VI 18c _dV Q-dIQ_V i28V. vs d 0 VI = 28 ∆VQ 19_dV Q-dV I_25C. v sd 0 T J = 25 °C ∆VQ [mV ] [mV ] I Q = 1mA IQ = 10mA -2 -10 T J = -40 °C -15 -3 I Q = 100 mA IQ = 200 mA -4 -20 TJ = 25 °C -5 -25 T J = 150 °C -30 0 50 100 150 -6 250 5 10 15 20 25 30 35 40 45 VI [V] IQ [mA] Data Sheet 0 12 Rev. 1.02, 2009-12-10 IFX24401 Typical Performance Characteristics Line Regulation ∆VQ versus Input Voltage Change VI Load Transient Response Peak Voltage ∆VQ 19_dV Q-dV I_-40C. v sd 0 20_Load Tranc ient v s time 125. vs d T J =40 °C ∆VQ IQ ∆IQ =100mA [mV ] IQ = 1mA T J = 125 °C V I = 13.5 V IQ = 10 mA -2 I Q = 100mA -3 I Q = 200 mA -4 VQ VQ = 100 mV/DIV -5 -6 t = 40 µs/DIV 0 5 10 15 20 25 30 35 40 45 VI [V] Load Transient Response Peak Voltage ∆VQ Line Transient Response Peak Voltage ∆VQ 21_Line Tranc ient v s time 25. vs d 20_Load Tranc ient v s time 25.v sd IQ ∆I Q = 100mA T J = 25 °C V I = 13.5 V VI ∆VI = 2V T J = 25 °C VI = 13.5 V VQ VQ = 50 mV/DIV VQ VQ = 100 mV/DIV t = 40 µs/DIV Data Sheet t = 400 µs/DIV 13 Rev. 1.02, 2009-12-10 IFX24401 Typical Performance Characteristics Line Transient Response Peak Voltage ∆VQ I Enabled Input Current IEN versus Input Voltage VI , EN=Off 25_IINH v s V IN INH _off . v s d 21_Line Tranc ient vs time 125. vs d T J = 125 °C VI = 13.5 V VI ∆VI = 2 V IEN [µA ] 1.0 EN = L (i.e. IC OFF) T J = 150 °C T J = 25 °C 0.8 TJ = -40°C 0.6 VQ 0.4 VQ = 50 mV/DIV 0.2 t = 400 µs/DIV 10 20 30 40 V I [V] Enabled Input Current IEN versus Enabled Input Voltage VEN Thermal Resistance Junction-Ambient RTHJA versus Power Dissipation PV 24_IINH v s V INH. v s d 32_RTH V S P V TO252.V S D 75 IEN [µA ] A = 300mm RTH-JA T J = 150 °C 2 Cooling Area single sided PCB [K /W] 50 T J = 25°C 40 65 T J = -40 °C 30 60 20 55 10 50 TO252-5 10 20 30 40 3 V EN [V] Data Sheet 6 9 12 PV [W] 14 Rev. 1.02, 2009-12-10 IFX24401 Application Information 6 Application Information V Bat IFX24401 100 nF Overtemperature Shutdown Bandgap Reference e. g. Ignition 2 EN V CC Q 5 1 I 470 nF + 4.7 µF 1 Enable Charge Pump GND 3, Tab Figure 4 Application Diagram Input, Output An input capacitor is necessary for damping line influences. A resistor of approx. 1 Ω in series with CI, can damp the LC of the input inductivity and the input capacitor. The IFX24401 requires a ceramic output capacitor of at least 470 nF. In order to damp influences resulting from load current surges it is recommended to add an additional electrolytic capacitor of 4.7 µF to 47 µF at the output as shown in Figure 4. Additionally a buffer capacitor CB of > 10µF should be used for the output to suppress influences from load surges to the voltage levels. This one can either be an aluminum electrolytic capacitor or a tantalum capacitor following the application requirements. A general recommendation is to keep the drop over the equivalent serial resistor (ESR) together with the discharge of the blocking capacitor below the allowed Headroom of the Application to be supplied (e.g. typ. dVQ = 350mV). Since the regulator output current roughly rises linearly with time the discharge of the capacitor can be calculated as follows: dVCB = dIQ*dt/CB The drop across the ESR calculates as: dVESR = dI*ESR To prevent a reset the following relationship must be fullfilled: dVC + dVESR < VRH = 350mV Example: Assuming a load current change of dIQ = 100mA, a blocking capacitor of CB = 22µF and a typical regulator reaction time under normal operating conditions of dt ~ 25µs and for special dynamic load conditions, such as load step from very low base load, a reaction time of dt ~ 75µs. dVC = dIQ*dt/CB = 100mA * 25µs/22µF = 113mV So for the ESR we can allow dVESR = VRH2 - dVC = 350mV - 113mV = 236mV The permissible ESR becomes: ESR = dVESR / dIQ = 236mV/100mA = 2.36Ohm Data Sheet 15 Rev. 1.02, 2009-12-10 IFX24401 Package Outlines 7 Package Outlines 6.5 +0.15 -0.05 A 1) 2.3 +0.05 -0.10 0.9 +0.20 -0.01 0...0.15 0.51 MIN. 0.8 ±0.15 0.15 MAX. per side 0.5 +0.08 -0.04 B (5) (4.24) 1 ±0.1 9.98 ±0.5 6.22 -0.2 5.7 MAX. 0.5 +0.08 -0.04 5 x 0.6 ±0.1 1.14 0.1 B 4.56 0.25 M A B GPT09527 1) Includes mold flashes on each side. All metal surfaces tin plated, except area of cut. Figure 5 PG-TO252-5 0.15 M C A-B D 14x 0.64 ±0.25 1 8 1 7 0.2 M D 8x Bottom View 3 ±0.2 A 14 6 ±0.2 D Exposed Diepad B 0.1 C A-B 2x 14 7 8 2.65 ±0.2 0.25 ±0.05 2) 0.08 C 8˚ MAX. C 0.65 0.1 C D 0.19 +0.06 1.7 MAX. Stand Off (1.45) 0 ... 0.1 0.35 x 45˚ 3.9 ±0.11) 4.9 ±0.11) Index Marking GPT09113 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion PG-SSOP-14-1,-2,-3-PO V02 Figure 6 Data Sheet PG-SSOP-14 16 Rev. 1.02, 2009-12-10 IFX24401 Revision History 8 Revision History Revision Date Changes 1.02 2009-12-10 Corrections to pin assignment 1.01 2009-10-19 Coverpage changed Overview page: Inserted reference statement to TLE/TLF series. 1.0 2009-04-28 Initial Release Data Sheet 17 Rev. 1.02, 2009-12-10 Edition 2009-12-10 Published by Infineon Technologies AG 81726 Munich, Germany © 2009 Infineon Technologies AG All Rights Reserved. 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