3-Channel Laser Diode Driver with Oscillator AD9662 FEATURES FUNCTIONAL BLOCK DIAGRAM Current-controlled current source with 3 input channels Output current for Channel 3—315 mA Output current for other channels—210 mA Rise time/fall time of 0.8 ns On-chip oscillator Single 5 V power supply (±10%) Low output overshoot Low power consumption IN3 OUTEN3 CHANNEL 3 IN2 OUTEN2 CHANNEL 2 APPLICATIONS INR OUTENR OUTPUT IOUT ENABLE READ CHANNEL CD-RW drives DVD-RW, DVD+RW, MO drives Laser diode current switching OSCILLATOR GENERAL DESCRIPTION RF The AD9662 is a laser diode driver for high performance CD and DVD recordable drives. It includes three channels for three different optical power levels: the read channel generates a continuous output power level, whereas Channel 2 and Channel 3 are used as write channels having 0.8 ns rise/fall times. All channel currents are summed at the IOUT pin. Each channel’s output current is established by multiplying the channel’s gain by the channel’s input current. The input current for each of the input channels—INR, IN2, and IN3—can be set either by using an external resistor that converts an input voltage to a current or by directly using a current source. RS 04389-0-001 OSCEN Figure 1. AD9662 3-Channel Laser Diode Driver An on-chip oscillator is provided to allow output current modulation (to reduce laser mode hopping). Two external resistors control the frequency and the amplitude swing of the oscillator. The push-pull oscillator can swing up to 100 mA p-p and has a frequency range of 200 MHz to 500 MHz. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. AD9662 TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configuration and Function Descriptions..............................6 Applications....................................................................................... 1 Typical Performance Characteristics ..............................................7 General Description ......................................................................... 1 Applications..................................................................................... 10 Functional Block Diagram .............................................................. 1 Temperature Considerations .................................................... 10 Revision History ............................................................................... 2 Evaluation Board ............................................................................ 12 Specifications..................................................................................... 3 Outline Dimensions ....................................................................... 13 Absolute Maximum Ratings............................................................ 5 Ordering Guide .......................................................................... 13 ESD Caution.................................................................................. 5 REVISION HISTORY 11/05—Rev. SpB to Rev. C Changes to Format .............................................................Universal 7/04—Rev. Sp0 to Rev. SpB Changes to Note 2 in Specifications............................................... 4 Changes to Absolute Maximum Ratings ....................................... 5 Changes to Figure 17...................................................................... 12 12/03—Rev. SpA: Initial 2-Page Web Version 12/03—Rev. Sp0: Initial Full Version Rev. C | Page 2 of 16 AD9662 SPECIFICATIONS At TAMB, VCC = 5 V, ENABLE = 1, OSCEN = 0, OUTENx = 1, unless otherwise stated. Table 1. Parameter LASER AMPLIFIER Output Current Read Channel Output Current Channel 2 Output Current Channel 3 Total Output Current Output Current Linearity 1 Output Current Linearity1 Output Current Linearity1 Best-Fit Current Gain1 Best-Fit Current Gain1 Best-Fit Current Gain1 Best-Fit Current Offset1 Best-Fit Current Offset1 Best-Fit Current Offset1 IOUT Series Resistance Input Impedance (RIN), Channel R, Channel 2 Input Impedance (RIN), Channel 3 IOUT Supply Sensitivity (PSRR) Read Mode IOUT Supply Sensitivity (PSRR) Write Mode Output Current Noise IOUT Temperature Sensitivity Read Mode IOUT Temperature Sensitivity Write Mode Channel 2 IOUT Temperature Sensitivity Write Mode Channel 3 LASER AMPLIFIER AC SPECIFICATIONS Write Rise Time 2 Write Fall Time2 Output Current Overshoot IOUT ON Propagation Delay IOUT OFF Propagation Delay Disable Time Enable Time OSCILLATOR SPECIFICATIONS Oscillator Frequency Oscillator Frequency Temperature Coefficient Disable Time Oscillator Enable Time Oscillator Conditions Min Typ Output is sourcing, OUTENR = 0 Output is sourcing, OUTEN2 = 0 Output is sourcing, OUTEN3 = 0 Output is sourcing, OUTEN3 = 0 and (OUTENR = 0 and/or OUTEN2 = 0) Read Channel, OUTENR = 0 Write2 Channel, OUTEN2 = 0 Write3 Channel, OUTEN3 = 0 Read Channel, OUTENR = 0 Write2 Channel, OUTEN2 = 0 Write3 Channel, OUTEN3 = 0 Read Channel, OUTENR = 0 Write2 Channel, OUTEN2 = 0 Write3 Channel, OUTEN3 = 0 Total ROUT to VCC rail RIN to GND RIN to GND IOUT = 50 mA (read-only), VCC = 5 V ± 10% OUTENR = 0 IOUT = 100 mA (50 mA read, 50 mA write) VCC = 5 V ± 10%, OUTENR = 0 and (OUTEN2 = 0 or OUTEN3 = 0) IOUT = 50 mA (Read), OUTENR = 0, f = 300 MHz IOUT = 50 mA (read-only) OUTENR = 0 IOUT = 100 mA (50 mA Read, 50 mA Write2) OUTENR = 0, OUTEN2 = 0 IOUT = 100 mA (50 mA Read, 50 mA Write3) OUTENR = 0, OUTEN3 = 0 210 210 315 235 235 340 >550 −4 −4 −4 125 120 240 −7 −7 −30 ±0.6 ±0.6 ±0.1 135 130 260 ±0.6 ±0.6 −2 6.5 200 100 10 +4 +4 +4 145 140 280 +7 +7 +15 10 240 120 15 % % % mA/mA mA/mA mA/mA mA mA mA Ω Ω Ω %/V 10 15 %/V IOUT = 50 mA dc (Read), 50 mA pulse W2 or W3 OUTENR = 0 and ( OUTEN2 = 0 or OUTEN3 = 0) IOUT = 50 mA dc (Read), 50 mA pulse W2 or W3 OUTENR = 0 IOUT = 50 mA dc (Read), 50 mA pulse W2 or W3 OUTENR = 0 and ( OUTEN2 = 0 or OUTEN3 = 0) OUTENx 50% H-L to IOUT at 50% of final value OUTENx 50% L-H to IOUT at 50% of initial value ENABLE 50% H-L to IOUT at 50% of initial value ENABLE 50% L-H to IOUT at 50% of final value OUTENR = 0 RF = 9.53 kΩ, RS = 23.7 kΩ RF = 9.53 kΩ, RS = 23.7 kΩ OSCEN 50% H-L to amplitude at 50% of initial value OSCEN 50% L-H to amplitude at 50% of final value Rev. C | Page 3 of 16 160 80 265 Max Unit mA mA mA mA 150 100 pA/√Hz ppm/°C 100 ppm/°C 100 ppm/°C 0.8 1.8 ns 0.6 1.8 ns 13 % 2.7 2.7 5.4 13.5 ns ns ns ns 300 600 4 6 325 MHz ppm/°C ns ns AD9662 Parameter LOGIC SPECIFICATIONS Logic HI Threshold Logic LO Threshold Input Impedance Input Leakage Current Conditions Min Typ Max SUPPLY CURRENT ENABLE OSCEN OUTENR OUTEN2 OUTEN3 Power-Down Power-Up Inputs Disabled Inputs Disabled, OSC Enabled Read Mode, OSC Enabled 3 IOUT = 50 mA Write Mode3 IOUT = 100 mA (50 mA W2, 50 mA W3) OPERATING CONDITIONS Supply Voltage Range Operating Temperature Range 0 0 1 1 1 8.5 10 mA 1 1 1 0 1 1 1 1 0 1 1 1 1 1 1 18 52 55 22 62 65 mA mA mA 1 0 1 0 0 29 35 mA 5.5 85 V °C 2.0 0.8 >10 <1 OUTENx, ENABLE, OSCEN OUTENx, ENABLE, OSCEN 4.5 0 1 Unit V V MΩ μA Output linearity, offset current, and gain are calculated using a best-fit method at 30 mA, 45 mA, 60 mA, 75 mA, and 90 mA for the Read and Write2 Channels and 90 mA, 105 mA, 120 mA, 135 mA, and 150 mA for Write Channel 3. Each channel’s output current is given by IOUT = (IIN × Gain) + IOS. 2 This parameter is guaranteed by design and characterization using six sigma. Rise and fall times are measured electrically from the 10% to 90% points using a Sharp GH0781JA2C diode as a load. 3 The values specified do not include the output current. Rev. C | Page 4 of 16 AD9662 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage +VS Pin 9, Pin 15, and Pin 16 Input Pins Pin 1 and Pin 2 Pin 5 Pin 6, Pin 7, Pin 8, Pin 10, and Pin 11 Internal Power Dissipation 1 16-Lead QSOP Operating Temperature Range Storage Temperature Range Lead Temperature, Soldering 60 sec 1 Range Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 5.5 V 2.2 mA 1.6 mA −0.8 V to +5.5 V 620 mW 0°C to +85°C −65°C to +150°C 300°C Power dissipation is specified on SEMI standard 4-layer board. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. C | Page 5 of 16 AD9662 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INR 1 16 VCC IN2 2 15 VCC GND 3 14 IOUT IN3 5 AD9662 13 GND 12 RS OUTENR 6 11 ENABLE OUTEN2 7 10 OSCEN OUTEN3 8 9 VCC 04389-0-002 RF 4 Figure 2. Pin Configuration Table 3. Pin Function Descriptions Pin No. 1 2 3, 13 4 5 6 7 8 9, 15, 16 10 11 12 14 Mnemonic INR IN2 GND RF IN3 OUTENR OUTEN2 OUTEN3 VCC OSCEN ENABLE RS IOUT Description Input Current Pin for the Read Channel. Has a typical input impedance of 200 Ω. Input Current Pin for Write Channel 2. Has a typical input impedance of 200 Ω. Common External Ground Reference. Pin Used to Set Oscillator Frequency by Connecting a Resistor from This Pin to Ground. Input Current Pin for Write Channel 3. Has a typical input impedance of 100 Ω. TTL-Compatible Enable for the Read Channel. Logic low active. TTL-Compatible Enable for Write Channel 2. Logic low active. TTL-Compatible Enable for Write Channel 3. Logic low active. Power Supply Pins for the AD9662. Each pin needs to be decoupled with a 0.1 μF capacitor to ground. TTL-Compatible Enable for the Oscillator. Logic high active. TTL-Compatible Enable for the Device. Logic high active. Pin Used to Set Oscillator Amplitude by Connecting a Resistor from This Pin to Ground. Output Current Pin. This pin is connected to the anode of a laser diode. Rev. C | Page 6 of 16 AD9662 TYPICAL PERFORMANCE CHARACTERISTICS RS = 23.7 kΩ, RF = 9.53 kΩ, and read channel output current is 50 mA, unless otherwise noted. 150 500 140 OSCILLATOR AMPLITUDE (mA p-p) OSCILLATOR FREQUENCY (MHz) 130 400 300 200 100 120 110 100 90 80 70 60 50 40 30 20 5 10 RF RESISTANCE (kΩ) 15 20 0 0 130 60 120 50 110 SUPPLY CURRENT (mA) 70 40 30 20 60 80 100 RS RESISTANCE (kΩ) 120 140 160 100 90 80 70 10 0 200 400 300 FREQUENCY (MHz) 500 60 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 OSCILLATOR AMPLITUDE (mA p-p) Figure 4. Oscillator Amplitude vs. Frequency Figure 7. Supply Current vs. Oscillator Amplitude –20 1.40 1.20 –30 THIRD HARMONIC DISTORTION (dBc) 1.00 0.80 0.60 –40 –50 SECOND HARMONIC –60 0.40 FOURTH HARMONIC 0.00 0.1 1 10 FREQUENCY (MHz) 100 1000 FIFTH HARMONIC –80 200 250 300 350 400 OSCILLATOR FREQUENCY (MHz) 04389-0-008 –70 0.20 04389-0-005 CURRENT NOISE (nA/ Hz) 40 Figure 6. Oscillator Amplitude vs. RS 04389-0-004 OSCILLATOR AMPLITUDE (mA p-p) Figure 3. Oscillator Frequency vs. RF 20 04389-0-007 0 04389-0-006 04389-0-003 10 0 450 Figure 8. Oscillator Harmonic Distortion vs. Frequency Figure 5. IOUT Current Noise Rev. C | Page 7 of 16 500 AD9662 50 45 40 35 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) 300 295 290 285 280 275 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) 04389-0-012 OSCILLATOR FREQUENCY (MHz) 305 04389-0-009 OSCILLATOR AMPLITUDE (mA p-p) 55 Figure 12. Oscillator Frequency vs. Temperature 04389-0-013 04389-0-010 μW μW Figure 9. Oscillator Amplitude vs. Temperature 10ns/DIV 10ns/DIV Figure 10. Optical Response 50 mA Read, 50 mA Write2, Sharp GH0781JA2C Diode Figure 13. Optical Response 50 mA Read, 200 mA Write3, Sharp GH0781JA2C Diode 225 200 175 OUTPUT WAVEFORM T 125 WRITE PULSE 100 ZERO LEVEL Pw BIAS LEVEL Pb ERASE LEVEL Pe 75 OUTEN3 50 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 (VCC – V (IOUT)) (Volts) 4.0 4.5 5.0 OUTEN2 04389-0-017 25 04389-0-011 IOUT (mA) 150 OUTENR Figure 14. Typical Waveform Figure 11. Output Current vs. Voltage Compliance Rev. C | Page 8 of 16 AD9662 Table 4. IOUT Control ENABLE OUTENR OUTEN2 OUTEN3 IOUT 0 1 1 1 1 X 1 0 1 1 X 1 1 0 1 X 1 1 1 0 Off Off (IINR × GainR) + IOSR (IIN2 × Gain2) + IOS2 (IIN3 × Gain3) + IOS3 Table 5. Oscillator Control ENABLE OSCEN OUTENR OUTEN2 OUTEN3 OSCILLATOR 0 1 1 1 1 1 X 0 1 1 1 1 X X 1 0 X X X X 1 X 0 X X X 1 X X 0 Off Off On On On On Rev. C | Page 9 of 16 AD9662 APPLICATIONS The AD9662 uses the current at one or more of its three inputs—IINR, IIN2, and IIN3—and generates an output current proportional to the input currents. Channel R has a typical gain of 135 mA/mA, Channel 2 has a typical gain of 130 mA/mA, and Channel 3 has a typical gain of 260 mA/mA. The input impedance of Channel R and Channel 2 is typically 200 Ω, and the input impedance of Channel 3 is typically 100 Ω. In most cases, a voltage output DAC is used to set the dc current of these channels. A series resistor should be placed between each DAC’s output and its respective input channel. These resistors should be chosen to properly scale the input current while not excessively loading the output of the DAC. Channel R is used to provide bias current to the laser diode, and Channel 2 and Channel 3 are used to set the amplitudes of the current pulses that are required to write or erase the media. The output pulses are created by applying TTL level pulses to the channel enable pins while dc current is flowing into the input pins. Channel 2 and Channel 3 are turned on and off according to a predetermined write strategy (see Figure 14). Due to the fast rise and fall time (<1 ns) required for the operation of higher speed drives, trace lengths carrying high speed signals, such as ENR, EN2, EN3, and the output current, should be kept as short as possible to minimize series inductance. A decoupling capacitor should be located near each VCC pin, and the ground return for the cathode of the laser diode should be kept as short as possible. Rise time, tr, is defined as the time a pulse requires to transition from 10% of its final value to 90% of its final value. Appropriately, fall time, tf, is defined as the time a pulse requires to go from 90% of its initial value to 10% of its initial value. Propagation delay is defined as the time when a transitioning logic signal reaches 50% of its amplitude to when the output current, IOUT, reaches 50% of its amplitude. TEMPERATURE CONSIDERATIONS The AD9662 is in a 16-lead QSOP. JEDEC methods were used to determine the θJA of the QSOP when mounted on a highly efficient thermally conductive test board (or 4-layer board). This board is made of FR4, is 1.60 mm thick, and consists of four copper layers. The two internal layers are solid copper (1 ounce/in2 or 0.35 mm thick). The two surface layers (containing the component and back side traces) use 2 ounces/in2 (0.70 mm thick) copper. This method of construction yields a θJA for the AD9662 of approximately 105°C/W. An integrated circuit dissipating 500 mW and packaged in a QSOP, while operating in an ambient environment of 85°C, has an internal junction temperature of approximately 138°C. This junction temperature is within the maximum recommended operating junction temperature of 150°C. Of course, this is not a realistic method for mounting a laser diode driver in an optical storage device. In an actual application, the laser diode driver would most likely be mounted to a flexible circuit board. The θJA of a system is highly dependent on board layout and material. The user must consider these conditions carefully. Some of the circuitry of the AD9662 can be used to monitor the internal junction temperature. The AD9662 uses diodes to protect it from electrostatic discharge (ESD). Every input pin has a diode between it and ground, with the anode connected to ground and the cathode connected to the particular input pin. The base-emitter junction of a PNP transistor is used for ESD protection from each pin to VCC. The collector is electrically connected to the substrate of the die (see Figure 15). The baseemitter junction of this transistor can be used to monitor the internal die temperature of the IC. Using a 10 V source at the enable pin to forward-bias the base-emitter junction and a 1 MΩ resistor to limit the current, a 2-point measurement can be used to calculate the junction temperature of the IC. Because the enable pin (ENABLE) needs to be a logic high for normal operation, the AD9662 can be operated with the 10 V applied through the 1 MΩ resistor. The first point is obtained by measuring the voltage, V1, with IOUT = 0 immediately after the AD9662 is turned on. The case temperature, T1, can be measured using a thermocouple. The temperature of the case is measured immediately after the IC is turned on, and that temperature is the temperature of the transistor junction and of the die itself. Through characterization of the AD9662, it was determined that the forward-bias voltage of the base-emitter junction of the transistor decreases by 1.9 mV for every 1°C rise in junction temperature. The second point of the 2-point measurement is obtained when the AD9662 is operated under load. IOUT is adjusted until the increase in supply current is 200 mA. The AD9662 is allowed to reach thermal equilibrium, and then the voltage, V2, is measured. The voltage measurements taken with the IC running are lower than the actual base-emitter drop across the transistor due to the voltage drops across the internal resistance that is in series with the supply current (see Figure 15). This finite resistance was calculated to be approximately 120 mΩ. Therefore, for a supply current change of 200 mA, the ΔVBE calculation is 24 mV too low. Therefore, 24 mV must be added to the difference in measured voltages. The change in the baseemitter voltage is then calculated. 85°C + 0.500 W × 105°C/W = 138°C Rev. C | Page 10 of 16 ΔVBE = (V2 + 24 mV – V1) AD9662 The change in junction temperature can then be determined. TJ = T1 + ΔVBE/(1.9 mV/°C) AD9662 ICC 5V RS – V1, V2 + (244 mA – 27 mA) × 120 mΩ = 26 mV IBE 1MΩ ENR This 26 mV internal voltage drop was then added to the measured voltage reduction to determine the actual ΔVBE. ΔVBE = (593 mV – 412 mV + 26 mV) = 207 mV 04389-0-015 GND 10V Figure 15. Junction Temperature Measurement Circuit This 2-point measurement allows the rise in die temperature to be calculated for any given power dissipation. The θJA of the system can be calculated using the power dissipation of the LDD. The die temperature change measured 82.4°C. The output of the AD9662 was at a voltage of 2 V. The part dissipated an additional 600 mW of power (3 V × 200 mA). The θJA for the AD9962 mounted on its 2-layer board was calculated to be: 600 mW/82.4°C = 137°C/W. PD = VCC × ICC – VDIODE × IDIODE 0.7 θJA = (TJ – T1)/PD 0.6 0.5 VENR – VCC (V) Figure 16 shows a graph of the measured voltage between ENR and VCC (VENR − VCC) vs. the die temperature. This graph was constructed using a 2-layer evaluation board for the AD9662 (see Figure 17). 0.4 0.3 0.2 0.1 0 20 40 60 80 100 120 TEMPERATURE (°C) 140 Figure 16. VENR − VCC vs. Internal Temperature Rev. C | Page 11 of 16 160 04389-0-014 VCC Using the preceding method, actual data was taken to determine the θJA of the AD9662 in the evaluation board. Immediately after power-up, V1 was measured to be 593 mV. The supply current was 27 mA. The AD9662 was adjusted to deliver 200 mA into a 10 Ω load. This resulted in a total supply current of 244 mA. After allowing the part to reach thermal equilibrium, V2 measured 412 mV. The voltage drop across the 120 mΩ internal resistor due to the change in supply current was then calculated. AD9662 EVALUATION BOARD VINR C3 0.1μF R2 VINR 4.32kΩ VS VINW2 C2 0.1μF R3 DUT1 VIN2 4.32kΩ 1 VINW3 C4 0.1μF R5 VIN3 4.32kΩ R4 9.53kΩ ENR R8 50Ω W1 DNI 5V EN2 C1 INR 2 IN2 VCC 16 VCC 15 3 GND IOUT 14 4 RF GND 13 5 IN3 6 OUTENR ENABLE 11 7 OUTEN2 OSCEN 10 8 OUTEN3 VCC 9 RS 12 R7 50Ω W2 DNI DNI C8 DNI R9 R12 V_OUT 46.4Ω R1 3.1Ω 23.7kΩ CHIP_EN C5 0.1μF AD9662 D1 R17 DNI 0.1μF 5V W5 R10 DNI 5V OSCEN EN3 R6 50Ω W3 DNI 5V 5V 5V VD VS GND W4 DNI R11 50Ω R13 5kΩ C7 10μF 04389-0-016 C9 0.1μF Figure 17. AD9662 QSOP-16 Evaluation Board Schematic Note: If dc logic levels are desired on the enable pins, then Jumper W1 through Jumper W5 should be used, and Resistor R6 through Resistor R11 should not be installed. If the enable pins are driven from external signal sources, then these resistors should be installed, and the jumpers are not necessary. Rev. C | Page 12 of 16 AD9662 OUTLINE DIMENSIONS 0.197 0.193 0.189 9 16 0.158 0.154 0.150 1 8 0.244 0.236 0.228 PIN 1 0.069 0.053 0.065 0.049 0.010 0.025 0.004 BSC COPLANARITY 0.004 0.012 0.008 SEATING PLANE 0.010 0.006 8° 0° 0.050 0.016 COMPLIANT TO JEDEC STANDARDS MO-137-AB Figure 18.16-Lead Shrink Small Outline Package [QSOP] (RQ-16) Dimensions shown in inches ORDERING GUIDE Model AD9662ARQZ 1 AD9662ARQZ-REEL1 AD9662ARQZ-REEL71 1 Temperature Range 0°C to 85°C 0°C to 85°C 0°C to 85°C Package Description 16-Lead QSOP 16-Lead QSOP 16-Lead QSOP Z = Pb-free part. Rev. C | Page 13 of 16 Package Option RQ-16 RQ-16 RQ-16 AD9662 NOTES Rev. C | Page 14 of 16 AD9662 NOTES Rev. C | Page 15 of 16 AD9662 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C04389-0-11/05(C) Rev. C | Page 16 of 16