LM124AQML, LM124QML www.ti.com SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 LM124AQML LM124QML Low Power Quad Operational Amplifiers Check for Samples: LM124AQML, LM124QML FEATURES 1 • 2 • • • • • • • • • Available with Radiation Specification – High Dose Rate 100 krad(Si) – ELDRS Free 100 krad(Si) Internally Frequency Compensated for Unity Gain Large DC Voltage Gain 100 dB Wide Bandwidth (Unity Gain) 1 MHz (Temperature Compensated) Wide Power Supply Range: – Single Supply 3V to 32V – Or Dual Supplies ±1.5V to ±16V Very Low Supply Current Drain (700 μA) — Essentially Independent of Supply Voltage Low Input Biasing Current 45 nA (Temperature Compensated) Low Input Offset Voltage 2 mV and Offset Current: 5 nA Input Common-Mode Voltage Range Includes Ground Differential Input Voltage Range Equal to the • Power Supply Voltage Large Output Voltage Swing 0V to V+ − 1.5V DESCRIPTION The LM124/124A consists of four independent, high gain, internally frequency compensated operational amplifiers which were designed specifically to operate from a single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. Application areas include transducer amplifiers, DC gain blocks and all the conventional op amp circuits which now can be more easily implemented in single power supply systems. For example, the LM124/124A can be directly operated off of the standard +5Vdc power supply voltage which is used in digital systems and will easily provide the required interface electronics without requiring the additional +15Vdc power supplies. Unique Characteristics • • • In the Linear Mode, the Input Common-Mode Voltage Rrange Includes Ground and the Output Voltage can also Swing to Ground, even though Operated from Only a Single Power Supply Voltage The Unity Gain Cross Frequency is Temperature Compensated The Input Bias Current is also Temperature Compensated Advantages • • • • • Eliminates Need for Dual Supplies Four Internally Compensated Op Amps in a Single Package Allows Directly Sensing near GND and VOUT also Goes to GND Compatible with all Forms of Logic Power Drain Suitable for Battery Operation 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2013, Texas Instruments Incorporated LM124AQML, LM124QML SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. IN- 1 OUT 1 N/C OUT 4 IN- 4 LCCC Package 3 2 1 20 19 17 N/C V+ 6 16 GND N/C 7 15 N/C IN+ 2 8 14 IN+ 3 IN- 2 9 10 11 12 13 IN- 3 IN+ 4 5 OUT 3 18 N/C N/C 4 OUT 2 IN+ 1 Figure 1. Package Number NAJ0020A CDIP Package Figure 2. Top View Package Number J0014A Figure 3. Package Number NAD0014B or NAC0014A 2 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML LM124AQML, LM124QML www.ti.com SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 Schematic Diagram (Each Amplifier) Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML Submit Documentation Feedback 3 LM124AQML, LM124QML SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 Absolute Maximum Ratings www.ti.com (1) Supply Voltage, V+ 32Vdc or ±16Vdc Differential Input Voltage 32Vdc −0.3Vdc to +32Vdc Input Voltage Input Current (VIN < −0.3Vdc) (2) Power Dissipation (3) 50 mA CDIP 1260mW CLGA 700mW LCCC 1350mW CLGA 700mW Output Short-Circuit to GND (One Amplifier) (4) V+ ≤ 15Vdc and TA = 25°C Continuous Operating Temperature Range −55°C ≤ TA ≤ +125°C Maximum Junction Temperature 150°C −65°C ≤ TA ≤ +150°C Storage Temperature Range Lead Temperature (Soldering, 10 seconds) 260°C Thermal Resistance ThetaJA CDIP (Still Air) 103°C/W (500LF/Min Air flow) 51°C/W CLGA (Still Air) 176°C/W (500LF/Min Air flow) 116°C/W LCCC (Still Air) 91°C/W (500LF/Min Air flow) 66°C/W CLGA (Still Air) 176°C/W (500LF/Min Air flow) 116°C/W ThetaJC CDIP 19°C/W CLGA 18°C/W LCCC 24°C/W CLGA 18°C/W Package Weight (Typical) CDIP 2200mg CLGA 460mg LCCC 470mg CLGA 410mg ESD Tolerance (1) (2) (3) (4) (5) 4 (5) 250V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the op amps to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than -0.3VDC (at 25°C). The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 40mA independent of the magnitude of V+. At values of supply voltage in excess of +15VDC, continuous short-circuits can exceed the power dissipation ratings and cause eventual destruction. Destructive dissipation can result from simultaneous shorts on all amplifiers. Human body model, 1.5 kΩ in series with 100 pF. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML LM124AQML, LM124QML www.ti.com SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 Quality Conformance Inspection MIL-STD-883, Method 5005 - Group A Subgroup Description Temp ( °C) 1 Static tests at +25 2 Static tests at +125 3 Static tests at -55 4 Dynamic tests at +25 5 Dynamic tests at +125 6 Dynamic tests at -55 7 Functional tests at +25 8A Functional tests at +125 8B Functional tests at -55 9 Switching tests at +25 10 Switching tests at +125 11 Switching tests at -55 Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML Submit Documentation Feedback 5 LM124AQML, LM124QML SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 www.ti.com LM124/883 Electrical Characteristics SMD: 77043 DC Parameters (The following conditions apply to all the following parameters, unless otherwise specified.) All voltages referenced to device ground. Symbol Parameter Conditions Notes Min V+ = 5V ICC Power Supply Current ISINK Output Sink Current V+ = 30V 1 V+ = 30V, VCM = 28V Common Mode Rejection Ratio V+ = 30V, VIN = 0V to 28.5V (1) +IIB Input Bias Current V+ = 5V, VCM = 0V (2) IIO Input Offset Current V+ = 5V, VCM = 0V PSRR Power Supply Rejection V+ = 5V to 30V, VCM = 0V Ratio VCM Common Mode Voltage V+ = 30V Range AVS Large Signal Gain -20 mA 1 -10 mA 2, 3 -60 CMRR mA 1 -5 5 mV 1 -7 7 mV 2, 3 -5 5 mV 1 -7 7 mV 2, 3 -5 5 mV 1 -7 7 mV 2, 3 -5 5 mV 1 dB 1 70 -150 10 nA 1 -300 10 nA 2, 3 -30 30 nA 1 -100 100 nA 2, 3 dB 1 65 (3) (1) 28.5 V 1 28 V 2, 3 4 V+ = 15V, RL = 2K Ω, VO = 1V to 11V 50 V/mV 25 V/mV 5, 6 V+ = 30V, RL = 2K Ω 26 V 4, 5, 6 V+ = 30V, RL = 10K Ω 27 V 4, 5, 6 40 mV 4, 5, 6 40 mV 4 100 mV 5, 6 20 mV 4, 5, 6 dB 4 V+ = 30V, RL = 10K Ω V+ = 30V, ISINK = 1uA V+ = 5V, RL= 10K Ω Channel Separation 1KHz, 20KHz (Amp to Amp Coupling) 6 1 2, 3 V+ = 30V, VCM = 28.5V (3) (4) (5) 2, 3 mA V+ = 5V, VCM = 0V (2) mA mA V+ = 30V, VCM = 0V (1) 1 4.0 5 V+ = 5V, VOUT = 0V Output Voltage Low 1, 2, 3 mA 10 Short Circuit Current VOL mA 3.0 V+ = 15V, VOUT = 2V, +VIN = 0mV, -VIN = +65mV IOS Output Voltage High 1.2 uA V+ = 15V, VOUT = 2V, +VIN = 0mV, -VIN = -65mV VOH SubGroups 12 Output Source Current Input Offset Voltage Unit V+ = 15V, VOUT = 200mV, +VIN = 0mV, -VIN = +65mV ISOURCE VIO Max (4) (5) 80 The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V (at 25°C). The upper end of the common-mode voltage range is V+ −1.5V (at 25°C), but either or both inputs can go to +32V without damage independent of the magnitude of V+. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the input lines. Specified by VIO tests. Ensured, not tested Due to proximity of external components, insure that coupling is not originating via stray capacitance between these external parts. This typically can be detected as this type of capacitance increases at higher frequencies. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML LM124AQML, LM124QML www.ti.com SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 LM124A/883 Electrical Characteristics SMD: 77043 DC Parameters (The following conditions apply to all the following parameters, unless otherwise specified.) All voltages referenced to device ground. Symbol Parameter Conditions Notes Max Unit SubGroups 1.2 mA 1, 2, 3 3.0 mA 1 4.0 mA 2, 3 12 uA 1 10 mA 1 5 mA 2, 3 Min V+ = 5V ICC Power Supply Current V+ = 30V V+ = 15V, VOUT = 200mV, +VIN = 0mV, -VIN = +65mV ISINK Output Sink Current V+ = 15V, VOUT = 2V, +VIN = 0mV, -VIN = +65mV ISOURCE Output Source Current V+ = 15V, VOUT = 2V, +VIN = 0mV, -VIN = -65mV IOS Short Circuit Current V+ = 5V, VOUT = 0V Input Offset Voltage mA 1 -2 2 mV 1 2, 3 4 mV -2 2 mV 1 V+ = 30V, VCM = 28V -4 4 mV 2, 3 -2 2 mV 1 -4 4 mV 2, 3 dB 1 Common Mode Rejection Ratio V+ = 30V, VIN = 0V to 28.5V (1) ±IIB Input Bias Current V+ = 5V, VCM = 0V (2) IIO Input Offset Current V+ = 5V, VCM = 0V PSRR Power Supply Rejection Ratio V+ = 5V to 30V, VCM = 0V VCM Common Mode Voltage V+ = 30V Range AVS Large Signal Gain VOH Output Voltage High V+ = 15V, RL = 2K Ω, VO = 1V to 11V 70 -50 10 nA 1 -100 10 nA 2, 3 -10 10 nA 1 -30 30 nA 2, 3 dB 1 65 (3) (1) (2) (3) (4) (5) (6) V 1 28 V 2, 3 V/mV 4 25 V/mV 5, 6 V+ = 30V, RL = 2K Ω 26 V 4, 5, 6 V+ = 30V, RL = 10K Ω 27 V 4, 5, 6 40 mV 4, 5, 6 V+ = 30V, ISINK = 1uA V+ = 5V, RL = 10K Ω (1) 28.5 50 (4) V+ = 30V, RL = 10K Ω Channel Separation Amp to Amp Coupling 2, 3 -4 CMRR Output Voltage Low 1 mA V+ = 30V, VCM = 28.5V V+ = 5V, VCM = 0V VOL mA -10 -60 V+ = 30V, VCM = 0V VIO -20 1KHz, 20KHz (5) (6) 80 40 mV 4 100 mV 5, 6 20 mV 4, 5, 6 dB 4 The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V (at 25°C). The upper end of the common-mode voltage range is V+ −1.5V (at 25°C), but either or both inputs can go to +32V without damage independent of the magnitude of V+. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the input lines. Specified by VIO tests. Datalog reading in K=V/mV Ensured, not tested Due to proximity of external components, insure that coupling is not originating via stray capacitance between these external parts. This typically can be detected as this type of capacitance increases at higher frequencies. Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML Submit Documentation Feedback 7 LM124AQML, LM124QML SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 www.ti.com LM124A RAD HARD Electrical Characteristics SMD: 5962R99504 DC Parameters (1) (2) (The following conditions apply to all the following parameters, unless otherwise specified.) All voltages referenced to device ground. Symbol VIO Parameter Input Offset Voltage IIO Input Offset Current Conditions Notes Max Unit VCC+ = 30V, VCC- = Gnd, VCM = +15V -2 2 mV 1 -4 4 mV 2, 3 VCC+ = 2V, VCC- = -28V, VCM = -13V -2 2 mV 1 -4 4 mV 2, 3 VCC+ = 5V, VCC- = Gnd, VCM = +1.4V -2 2 mV 1 -4 4 mV 2, 3 VCC+ = 2.5V, VCC- = -2.5, VCM = -1.1V -2 2 mV 1 -4 4 mV 2, 3 VCC+ = 30V, VCC- = Gnd, VCM = +15V -10 10 nA 1, 2 -30 30 nA 3 VCC+ = 2V, VCC- = -28V, VCM = -13V -10 10 nA 1, 2 -30 30 nA 3 VCC+ = 5V, VCC- = Gnd, VCM = +1.4V -10 10 nA 1, 2 -30 30 nA 3 VCC+ = 2.5V, VCC- = -2.5, VCM = -1.1V -10 10 nA 1, 2 -30 30 nA 3 VCC+ = 30V, VCC- = Gnd, VCM = +15V -50 +0.1 nA 1, 2 -100 +0.1 nA 3 -50 +0.1 nA 1, 2 -100 +0.1 nA 3 1, 2 VCC+ = 2V, VCC- = -28V, VCM = -13V ±IIB Input Bias Current (3) VCC+ = 5V, VCC- = Gnd, VCM = +1.4V VCC+ = 2.5V, VCC- = -2.5, VCM = -1.1V +PSRR Power Supply Rejection Ratio CMRR Common Mode Rejection Ratio IOS+ Output Short Circiut Current VCC+ = 30V, VCC- = Gnd, VO = 25V ICC Power Supply Current VCC+ = 30V, VCC- = Gnd ΔVIO/ ΔT (1) (2) (3) (4) (5) 8 Input Offset Voltage Temperature Sensitivity SubGroups Min VCC- = Gnd, VCM = +1.4V, 5V ≤ VCC ≤ 30V (4) +25°C ≤ TA ≤ +125°C, +VCC = 5V, -VCC = 0V, VCM = +1.4V -50 +0.1 nA -100 +0.1 nA 3 -50 +0.1 nA 1, 2 -100 +0.1 nA 3 -100 100 uV/V 1, 2, 3 76 dB 1, 2, 3 -70 mA 1, 2,3 3 mA 1, 2 4 mA 3 -30 30 uV/ °C 2 -30 30 uV/ °C 3 (5) -55°C ≤ TA ≤ +25°C, +VCC = 5V, -VCC = 0V, VCM = +1.4V Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are ensured only for the conditions as specified in MIL-STD-883, Method 1019 Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no enhanced low dose rate sensitivity (ELDRS) effect. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the input lines. The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V (at 25°C). The upper end of the common-mode voltage range is V+ −1.5V (at 25°C), but either or both inputs can go to +32V without damage independent of the magnitude of V+. Calculated parameters Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML LM124AQML, LM124QML www.ti.com SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 LM124A RAD HARD Electrical Characteristics SMD: 5962R99504 DC Parameters(1) (2) (continued) (The following conditions apply to all the following parameters, unless otherwise specified.) All voltages referenced to device ground. Symbol ΔIO/ ΔT Min Max Unit SubGroups -400 400 pA/° C 2 -700 700 pA/ °C 3 Max UniT SubG roups VCC+ = 30V, VCC- = Gnd, RL = 10K Ω 35 mV 4, 5, 6 VCC+ = 30V, VCC- = Gnd, IOI = 5mA 1.5 V 4, 5, 6 VCC+ = 4.5V, VCC- = Gnd, IOI = 2uA 0.4 V 4, 5, 6 Parameter Input Offset Current Temperature Sensitivity Conditions +25°C ≤ TA ≤ +125°C, +VCC = 5V, -VCC = 0V, VCM = +1.4V Notes (5) -55°C ≤ TA ≤ +25°C, +VCC = 5V, -VCC = 0V, VCM = +1.4V LM124A RAD HARD SMD: 5962R99504 AC/DC Parameters (1) (2) (The following conditions apply to all the following parameters, unless otherwise specified.) All voltages referenced to device ground. Symbol Parameter Logical "0" Output Voltage VOL Logical "1" Output Voltage VOH AVS+ AVS Voltage Gain Voltage Gain +VOP Maximum Output Voltage Swing Conditions Notes Min VCC+ = 30V, VCC- = Gnd, IOH = -10mA 27 V 4, 5, 6 VCC+ = 4.5V, VCC- = Gnd, IOH = -10mA 2.4 V 4, 5, 6 VCC+ = 30V, VCC- = Gnd, 1V ≤ VO ≤ 26V, RL = 10K Ω 50 V/mV 4 25 V/mV 5, 6 VCC+ = 30V, VCC- = Gnd, 5V ≤ VO ≤ 20V, RL = 2K Ω 50 V/mV 4 25 V/mV 5, 6 VCC+ = 5V, VCC- = Gnd, 1V ≤ VO ≤ 2.5V, RL = 10K Ω 10 V/mV 4, 5, 6 VCC+ = 5V, VCC- = Gnd, 1V ≤ VO ≤ 2.5V, RL = 2K Ω 10 V/mV 4, 5, 6 VCC+ = 30V, VCC- = Gnd, VO = +30V, RL = 10K Ω 27 V 4, 5, 6 VCC+ = 30V, VCC- = Gnd, VO = +30V, RL = 2K Ω 26 V 4, 5, 6 TR(TR) Transient Response: Rise Time VCC+ = 30V, VCC- = Gnd 1 uS 7, 8A, 8B TR(OS) Transient Response: Overshoot VCC+ = 30V, VCC- = Gnd 50 % 7, 8A, 8B Slew Rate: Rise VCC+ = 30V, VCC- = Gnd 0.1 V/uS 7, 8A, 8B Slew Rate: Fall VCC+ = 30V, VCC- = Gnd 0.1 V/uS 7, 8A, 8B ±SR (1) (2) Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are ensured only for the conditions as specified in MIL-STD-883, Method 1019 Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no enhanced low dose rate sensitivity (ELDRS) effect. Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML Submit Documentation Feedback 9 LM124AQML, LM124QML SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 www.ti.com LM124A RAD HARD SMD: 5962R99504 AC Parameters (1) (2) (The following conditions apply to all the following parameters, unless otherwise specified.) AC: +VCC = 30V, -VCC = 0V Symbol Parameter Conditions Notes Min Max Unit SubGroups NIBB Noise Broadband +VCC = 15V, -VCC = -15V, BW = 10Hz to 5KHz 15 uVrm s 7 NIPC Noise Popcorn +VCC = 15V, -VCC = -15V, RS = 20K Ω, BW = 10Hz to 5KHz 50 uVpK 7 CS (1) Channel Separation +VCC = 30V, -VCC = Gnd, RL = 2K Ω 80 dB 7 RL = 2K Ω, VIN = 1V and 16V, A to B 80 dB 7 RL = 2K Ω, VIN = 1V and 16V, A to C 80 dB 7 RL = 2K Ω, VIN = 1V and 16V, A to D 80 dB 7 RL = 2K Ω, VIN = 1V and 16V, B to A 80 dB 7 RL = 2K Ω, VIN = 1V and 16V, B to C 80 dB 7 80 dB 7 RL = 2K Ω, VIN = 1V and 16V, C to A 80 dB 7 RL = 2K Ω, VIN = 1V and 16V, C to B 80 dB 7 RL = 2K Ω, Vin = 1V and 16V, C to D 80 dB 7 RL = 2K Ω, VIN = 1V and 16V, D to A 80 dB 7 RL = 2K Ohms, VIN = 1V and 16V, D to B 80 dB 7 RL = 2K Ω, Vin = 1V and 16V, D to C 80 dB 7 RL = 2K Ω, VIN = 1V and 16V, B to D (3) Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are ensured only for the conditions as specified in MIL-STD-883, Method 1019 Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no enhanced low dose rate sensitivity (ELDRS) effect. Due to proximity of external components, insure that coupling is not originating via stray capacitance between these external parts. This typically can be detected as this type of capacitance increases at higher frequencies. (2) (3) LM124A RAD HARD - DC Drift Values SMD: 5962R99504 (1) (2) (The following conditions apply to all the following parameters, unless otherwise specified.) DC: "Delta calculations performed on QMLV devices at group B, subgroup 5 only" Symbol Parameter Conditions Notes Min Max Unit SubGroups VIO Input Offset Voltage VCC+ = 30V, VCC- = Gnd, VCM = +15V -0.5 0.5 mV 1 ±IIB Input Bias Current VCC+ = 30V, VCC- = Gnd, VCM = +15V -10 10 nA 1 (1) (2) 10 Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are ensured only for the conditions as specified in MIL-STD-883, Method 1019 Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no enhanced low dose rate sensitivity (ELDRS) effect. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML LM124AQML, LM124QML www.ti.com SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 LM124A - POST RADIATION LIMITS +25°C SMD: 5962R99504 (1) (2) (The following conditions apply to all the following parameters, unless otherwise specified.) All voltages referenced to device ground. Symbol Min Max Unit SubGroups -2.5 2.5 mV 1 -2.5 2.5 mV 1 VCC+ = 5V, VCC- = Gnd, VCM = +1.4V -2.5 2.5 mV 1 VCC+ = 2.5V, VCC- = -2.5, VCM = -1.1V -2.5 2.5 mV 1 VCC+ = 30V, VCC- = Gnd, VCM = +15V -15 15 nA 1 -15 15 nA 1 VCC+ = 5V, VCC- = Gnd, VCM = +1.4V -15 15 nA 1 VCC+ = 2.5V, VCC- = -2.5V, VCM = -1.1V -15 15 nA 1 VCC+ = 30V, VCC- = Gnd, VCM = +15V -75 +0.1 nA 1 -75 +0.1 nA 1 VCC+ = 5V, VCC- = Gnd, VCM = +1.4V -75 +0.1 nA 1 VCC+ = 2.5V, VCC- = -2.5V, VCM = -1.1V -75 +0.1 nA 1 40 V/mV 4 40 V/mV 4 Parameter Conditions Notes VCC+ = 30V, VCC- = Gnd, VCM = +15V VIO Input Offset Voltage IIO Input Offset Current ±IIB Input Bias Current AVS+ (1) (2) Voltage Gain VCC+ = 2V, VCC- = -28V, VCM = -13V VCC+ = 2V, VCC- = -28V, VCM = -13V VCC+ = 2V, VCC- = -28V, VCM = -13V VCC+ = 30V, VCC- = Gnd, 1V ≤ VO ≤ 26V, RL = 10K Ω (1) (1) (1) (1) VCC+ = 30V, VCC- = Gnd, 5V ≤ VO ≤ 20V, RL = 2K Ω Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are ensured only for the conditions as specified in MIL-STD-883, Method 1019 Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no enhanced low dose rate sensitivity (ELDRS) effect. Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML Submit Documentation Feedback 11 LM124AQML, LM124QML SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics 12 Input Voltage Range Input Current Supply Current Voltage Gain Open Loop Frequency Response Common Mode Rejection Ratio Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML LM124AQML, LM124QML www.ti.com SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Voltage Follower Pulse Response Voltage Follower Pulse Response (Small Signal) Large Signal Frequency Response Output Characteristics Current Sourcing Output Characteristics Current Sinking Current Limiting Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML Submit Documentation Feedback 13 LM124AQML, LM124QML SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 www.ti.com APPLICATION INFORMATION LM124 Series Operational Amplifiers The LM124 series are op amps which operate with only a single power supply voltage, have true-differential inputs, and remain in the linear mode with an input common-mode voltage of 0 VDC. These amplifiers operate over a wide range of power supply voltage with little change in performance characteristics. At 25°C amplifier operation is possible down to a minimum supply voltage of 2.3 VDC. The pinouts of the package have been designed to simplify PC board layouts. Inverting inputs are adjacent to outputs for all of the amplifiers and the outputs have also been placed at the corners of the package (pins 1, 7, 8, and 14). Precautions should be taken to insure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a test socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit. Large differential input voltages can be easily accommodated and, as input differential voltage protection diodes are not needed, no large input currents result from large differential input voltages. The differential input voltage may be larger than V+ without damaging the device. Protection should be provided to prevent the input voltages from going negative more than −0.3 VDC (at 25°C). An input clamp diode with a resistor to the IC input terminal can be used. To reduce the power supply drain, the amplifiers have a class A output stage for small signal levels which converts to class B in a large signal mode. This allows the amplifiers to both source and sink large output currents. Therefore both NPN and PNP external current boost transistors can be used to extend the power capability of the basic amplifiers. The output voltage needs to raise approximately 1 diode drop above ground to bias the on-chip vertical PNP transistor for output current sinking applications. For ac applications, where the load is capacitively coupled to the output of the amplifier, a resistor should be used, from the output of the amplifier to ground to increase the class A bias current and prevent crossover distortion. Where the load is directly coupled, as in dc applications, there is no crossover distortion. Capacitive loads which are applied directly to the output of the amplifier reduce the loop stability margin. Values of 50 pF can be accommodated using the worst-case non-inverting unity gain connection. Large closed loop gains or resistive isolation should be used if larger load capacitance must be driven by the amplifier. The bias network of the LM124 establishes a drain current which is independent of the magnitude of the power supply voltage over the range of from 3 VDC to 30 VDC. Output short circuits either to ground or to the positive power supply should be of short time duration. Units can be destroyed, not as a result of the short circuit current causing metal fusing, but rather due to the large increase in IC chip dissipation which will cause eventual failure due to excessive junction temperatures. Putting direct short-circuits on more than one amplifier at a time will increase the total IC power dissipation to destructive levels, if not properly protected with external dissipation limiting resistors in series with the output leads of the amplifiers. The larger value of output source current which is available at 25°C provides a larger output current capability at elevated temperatures (see typical performance characteristics) than a standard IC op amp. The circuits presented in the section on typical applications emphasize operation on only a single power supply voltage. If complementary power supplies are available, all of the standard op amp circuits can be used. In general, introducing a pseudo-ground (a bias voltage reference of V+/2) will allow operation above and below this value in single power supply systems. Many application circuits are shown which take advantage of the wide input common-mode voltage range which includes ground. In most cases, input biasing is not required and input voltages which range to ground can easily be accommodated. 14 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML LM124AQML, LM124QML www.ti.com SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 Typical Single-Supply Applications (V+ = 5.0 VDC) Non-Inverting DC Gain (0V Input = 0V Output) *R not needed due to temperature independent IIN DC Summing Amplifier (VIN'S ≥ 0 VDC and VO ≥ VDC) Where: V0 = V1 + V2 − V3 − V4 (V1 + V2) ≥ (V3 + V4) to keep VO > 0 VDC LED Driver Power Amplifier V0 = 0 VDC for VIN = 0 VDC AV = 10 “BI-QUAD” RC Active Bandpass Filter fo = 1 kHz Q = 50 AV = 100 (40 dB) Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML Submit Documentation Feedback 15 LM124AQML, LM124QML SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 www.ti.com (V+ = 5.0 VDC) Fixed Current Sources Lamp Driver Current Monitor Pulse Generator Driving TTL Squarewave Oscillator *(Increase R1 for IL small) 16 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML LM124AQML, LM124QML www.ti.com SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 (V+ = 5.0 VDC) Voltage Follower Pulse Generator High Compliance Current Sink IO = 1 amp/volt VIN (Increase RE for Io small) Low Drift Peak Detector Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML Submit Documentation Feedback 17 LM124AQML, LM124QML SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 www.ti.com (V+ = 5.0 VDC) Comparator with Hysteresis Ground Referencing a Differential Input Signal VO = VR Voltage Controlled Oscillator Circuit *Wide control voltage range: 0 VDC ≤ VC ≤ 2 (V+ −1.5 VDC) Photo Voltaic-Cell Amplifier 18 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML LM124AQML, LM124QML www.ti.com SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 (V+ = 5.0 VDC) AC Coupled Inverting Amplifier AC Coupled Non-Inverting Amplifier DC Coupled Low-Pass RC Active Filter fO = 1 kHz Q=1 AV = 2 Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML Submit Documentation Feedback 19 LM124AQML, LM124QML SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 www.ti.com (V+ = 5.0 VDC) High Input Z, DC Differential Amplifier High Input Z Adjustable-Gain DC Instrumentation Amplifier 20 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML LM124AQML, LM124QML www.ti.com SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 (V+ = 5.0 VDC) Using Symmetrical Amplifiers to Reduce Input Current (General Concept) Bridge Current Amplifier Bandpass Active Filter fO = 1 kHz Q = 25 Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML Submit Documentation Feedback 21 LM124AQML, LM124QML SNOSAE0K – AUGUST 2004 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Date Released Revision Section Changes 9/2/04 A New Release, Corporate format 3 MDS data sheets converted into one Corp. data sheet format. MNLM124-X, Rev. 1A2, MNLM124A-X, Rev. 1A3 and MRLM124A-X-RH, Rev. 5A0. MDS data sheets will be archived. 01/27/05 B Connection Diagrams, Quality Conformance Inspection Section, and Physical Dimensions drawings Added E package Connection Diagram. Changed verbiage under Quality Conformance Title, and Updated Revisions for the Marketing Drawings. 04/18/05 C Update Absolute Maximum Ratings Section Corrected typo for Supply Voltage limit From: 32Vdc or +16Vdc TO: 32Vdc or ±16Vdc. Added cerpack, cerdip, LCC package weight. 06/16/06 D Features, Ordering Information Table, Rad Hard Electrical Section and Notes Added Available with Radiation Specification, Low Dose NSID's to table 5962R9950402VCA LM124AJRLQMLV, 5962R9950402VDA LM124AWRLQMLV, 5962R9950402VZA LM124AWGRLQMLV, and reference to Note 10 and 11. Deleted code K NSID's LM124AJLQMLV 5962L9950401VCA, LM124AWGLQMLV 5962L9950401VZA, LM124AWLQMLV 5962L9950401VDA, Note 11 to Rad Hard Electrical Heading. Note 11 to Notes. 10/07/2010 E Data sheet title, Features, Ordering table, Electrical characteristic headings, Rad Hard conditions Update with current device information and format. Revision D will be Archived 03/26/2013 K All Sections Changed layout of National Data Sheet to TI format 22 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM124AQML LM124QML PACKAGE OPTION ADDENDUM www.ti.com 20-Jul-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962R9950401V9A ACTIVE DIESALE Y 0 30 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125 5962R9950401VCA ACTIVE CDIP J 14 25 TBD Call TI Call TI -55 to 125 LM124AJRQMLV 5962R9950401VCA Q 5962R9950401VDA ACTIVE CFP NAD 14 19 TBD Call TI Call TI -55 to 125 LM124AWR (LQMLV Q ~ QMLV Q) 5962R99504 01VDA ACO 01VDA >T 5962R9950401VZA ACTIVE CFP NAC 14 42 TBD Call TI Call TI -55 to 125 LM124AWGR QMLV Q 5962R99504 01VZA ACO 01VZA >T 5962R9950402V9A ACTIVE DIESALE Y 0 30 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125 5962R9950402VCA ACTIVE CDIP J 14 25 TBD Call TI Call TI -55 to 125 LM124AJRLQMLV 5962R9950402VCA Q 5962R9950402VDA ACTIVE CFP NAD 14 19 TBD Call TI Call TI -55 to 125 LM124AWR LQMLV Q 5962R99504 02VDA ACO (02VDA >T ~ 02VDA ACO) 5962R9950402VZA ACTIVE CFP NAC 14 42 TBD Call TI Call TI -55 to 125 LM124AWGR LQMLV Q 5962R99504 02VZA ACO 02VZA >T 7704302XA ACTIVE CFP NAC 14 42 TBD Call TI Call TI -55 to 125 LM124AWG /883 Q 5962-77043 02XA ACO 02XA >T LM124 MD8 ACTIVE DIESALE Y 0 100 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 20-Jul-2016 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM124 MDE ACTIVE DIESALE Y 0 30 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125 LM124 MDR ACTIVE DIESALE Y 0 30 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125 LM124AE/883 ACTIVE LCCC NAJ 20 50 TBD Call TI Call TI -55 to 125 LM124AE /883 Q 5962-77043 022A ACO 022A >T LM124AJ/883 ACTIVE CDIP J 14 25 TBD Call TI Call TI -55 to 125 LM124AJ/883 (5962-7704302CA Q ~ 5962-7704302 CA Q ) LM124AJRLQMLV ACTIVE CDIP J 14 25 TBD Call TI Call TI -55 to 125 LM124AJRLQMLV 5962R9950402VCA Q LM124AJRQMLV ACTIVE CDIP J 14 25 TBD Call TI Call TI -55 to 125 LM124AJRQMLV 5962R9950401VCA Q LM124AW/883 ACTIVE CFP NAD 14 19 TBD Call TI Call TI -55 to 125 LM124AW /883 Q ACO /883 Q >T LM124AWG/883 ACTIVE CFP NAC 14 42 TBD Call TI Call TI -55 to 125 LM124AWG /883 Q 5962-77043 02XA ACO 02XA >T LM124AWGRLQMLV ACTIVE CFP NAC 14 42 TBD Call TI Call TI -55 to 125 LM124AWGR LQMLV Q 5962R99504 02VZA ACO 02VZA >T LM124AWGRQMLV ACTIVE CFP NAC 14 42 TBD Call TI Call TI -55 to 125 LM124AWGR QMLV Q 5962R99504 01VZA ACO 01VZA >T LM124AWRLQMLV ACTIVE CFP NAD 14 19 TBD Call TI Call TI -55 to 125 LM124AWR LQMLV Q 5962R99504 02VDA ACO Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 20-Jul-2016 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) (02VDA >T ~ 02VDA ACO) LM124AWRQMLV ACTIVE CFP NAD 14 19 TBD Call TI Call TI -55 to 125 LM124AWR (LQMLV Q ~ QMLV Q) 5962R99504 01VDA ACO 01VDA >T LM124J/883 ACTIVE CDIP J 14 25 TBD Call TI Call TI -55 to 125 LM124J/883 (5962-7704301CA Q ~ 5962-7704301 CA Q ) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 3 Samples PACKAGE OPTION ADDENDUM www.ti.com 20-Jul-2016 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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OTHER QUALIFIED VERSIONS OF LM124AQML, LM124AQML-SP : • Military: LM124AQML • Space: LM124AQML-SP NOTE: Qualified Version Definitions: • Military - QML certified for Military and Defense Applications • Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 4 MECHANICAL DATA NAJ0020A E20A (Rev F) www.ti.com MECHANICAL DATA NAC0014A WG14A (RevF) www.ti.com MECHANICAL DATA NAD0014B W14B (Rev P) www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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