IRFR420, IRFU420, SiHFR420, SiHFU420 FEATURES PRODUCT SUMMARY VDS (V) • Dynamic dV/dt Rating 500 RDS(on) (Ω) Available VGS = 10 V • Repetitive Avalanche Rated 3.0 RoHS* Qg (Max.) (nC) 19 • Surface Mount (IRFR420/SiHFR420) Qgs (nC) 3.3 • Straight Lead (IRFU420/SiHFU420) Qgd (nC) 13 • Available in Tape and Reel Configuration Single • Fast Switching D DPAK (TO-252) COMPLIANT • Ease of Paralleling • Lead (Pb)-free Available IPAK (TO-251) DESCRIPTION G Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effictiveness. The DPAK is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU/SiHFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 W are possible in typical surcace mount applications. S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free SnPb DPAK (TO-252) DPAK (TO-252) DPAK (TO-252) IPAK (TO-251) IRFR420PbF IRFR420TRPbFa IRFR120TRLPbFa IRFU420PbF SiHFR420-E3 SiHFR420T-E3a SiHFR120TL-E3a SiHFU420-E3 IRFR420 IRFR420TRa IRFR120TRLa IRFU420 SiHFR420 SiHFR420Ta SiHFR120TLa SiHFU420 Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 500 Gate-Source Voltage VGS ± 20 Continuous Drain Current Pulsed Drain VGS at 10 V TC = 25 °C TC = 100 °C Currenta ID IDM UNIT V 2.4 1.5 A 8.0 Linear Derating Factor 0.33 Linear Derating Factor (PCB Mount)e 0.020 W/°C Single Pulse Avalanche Energyb EAS 400 Repetitive Avalanche Currenta IAR 2.4 A Repetitive Avalanche Energya EAR 4.2 mJ Maximum Power Dissipation TC = 25 °C Maximum Power Dissipation (PCB Mount)e TA = 25 °C Peak Diode Recovery dV/dtc PD dV/dt 42 2.5 3.5 mJ W V/ns www.kersemi.com 1 IRFR420, IRFU420, SiHFR420, SiHFU420 ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Operating Junction and Storage Temperature Range SYMBOL LIMIT TJ, Tstg - 55 to + 150 UNIT °C 260d Soldering Recommendations (Peak Temperature) for 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 124 mH, RG = 25 Ω, IAS = 2.4 A (see fig. 12). c. ISD ≤ 2.4 A, dI/dt ≤ 50 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. e. When mounted on 1” square PCB (FR-4 or G-10 material). THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 110 Maximum Junction-to-Ambient (PCB Mount)a RthJA - 50 Maximum Junction-to-Case (Drain) RthJC - 3.0 UNIT °C/W Note a. When mounted on 1” square PCB (FR-4 or G-10 material). SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage VDS VGS = 0 V, ID = 250 µA 500 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.59 - V/°C VGS(th) VDS = VGS, ID = 250 µA 2.0 - 4.0 V Gate-Source Leakage IGSS VGS = ± 20 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 500 V, VGS = 0 V - - 25 VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 250 - - 3.0 Ω VDS = 50 V, ID = 1.4 A 1.5 - - S VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 360 - - 92 - - 37 - - - 19 - - 3.3 Drain-Source On-State Resistance Forward Transconductance RDS(on) gfs ID =1.4 Ab VGS = 10 V µA Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd - - 13 Turn-On Delay Time td(on) - 8.0 - - 8.6 - - 33 - - 16 - - 4.5 - - 7.5 - Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance tr td(off) VGS = 10 V ID = 2.1 A, VDS = 400 V, see fig. 6 and 13b VDD = 250 V, ID = 2.1 A, RG = 18 Ω, RD = 120 Ω, see fig. 10b tf LD LS Between lead, 6 mm (0.25") from package and center of die contact D pF nC ns nH G S www.kersemi.com 2 IRFR420, IRFU420, SiHFR420, SiHFU420 SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT - - 2.4 - - 8.0 - - 1.6 - 260 520 ns - 0.70 1.4 µC Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 2.4 A, VGS = 0 Vb TJ = 25 °C, IF = 2.1 A, dI/dt = 100 A/µsb V Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 2 -Typical Output Characteristics, TC = 150 °C Fig. 3 - Typical Transfer Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature www.kersemi.com 3 IRFR420, IRFU420, SiHFR420, SiHFU420 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage 4 Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating Area www.kersemi.com IRFR420, IRFU420, SiHFR420, SiHFU420 RD VDS VGS D.U.T. RG + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T. RG + - IAS V DD VDS 10 V tp 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit IAS Fig. 12b - Unclamped Inductive Waveforms www.kersemi.com 5 IRFR420, IRFU420, SiHFR420, SiHFU420 Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG 10 V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit www.kersemi.com 6 IRFR420, IRFU420, SiHFR420, SiHFU420 Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - + • dV/dt controlled by RG • ISD controlled by duty factor "D" • D.U.T. - device under test RG Driver gate drive P.W. Period D= + - VDD P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Body diode VDD forward drop Inductor current Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices and 3 V drive devices Fig. 14 -For N-Channel www.kersemi.com 7